r /O PHYSICAL CONSTANTS Quantity Symbol Magnitude Angstrom Unit A 1 A = 10- 4 fan - lO" 8 cm = 10" 10 m Avogadro's Number N Ayo 6.025 x 10 23 molecules/g-mole Bohr Radius a B 0.53A Boltzmann's Constant k 1.380 x 10" 23 joule/°K = 8.62 x 10" 5 eV/°K Electron Charge q 1.602 x 10- 19 coul Electron Volt eV 1 eV = 1.602 x 10- 19 joule = 23.1 kcal Free Electron Mass m 9.108 x 10- 31 kg Micron jttm 10- 6 m=10- 4 cm Permittivity of Free Space £o / 10 9 \ 8.854 x 10- 14 farad/cm 1 — — ^ 1 Permeability of Free Space H<o 1.257 x 10- 8 henry/cm (4tt x 10~ 9 ) Planck's Constant h 6.625 x 10 ~ 34 joule-sec Reduced Planck's Constant h hlltr = 1.054 x 10- 34 joule-sec Standard Atmosphere 1.033 x 10 4 kg/m 2 = 760 mm Hg (torr) Thermal Voltage (T = 300°K) kT/q 0.0259 volt Velocity of Light in Free Space c 2.998 x 10 10 cm/sec Wavelength Associated with 1 eV A 1.239 fim Physics of Semiconductor Devices Physics of Semiconductor Devices S. M. SZE Member of the Technical Staff Bell Telephone Laboratories, Incorporated Murray Hill, New Jersey WILEY-INTERSCIENCE A Division of John Wiley & Sons New York • London • Sydney • Toronto PRESTON PGLYT£< HM1C 57825 m G^n'Mi 33 Copyright © 1969 by John Wiley & Sons, Inc. All rights reserved. No part of this book may be reproduced by any means, nor transmitted, nor translated into a machine language without the written permission of the publisher. 10 9 8 7 Library of Congress CataloeCjwtt Number: 69-16132 SBN 471 84290 7 y^^"^ Printed in the United States of America To My Wife and Our Parents ■ -:k->' v-*r-~r Preface This book is concerned specifically with physical principles and opera- tional characteristics of semiconductor devices. It is intended as a textbook for first-year graduate students in electrical engineering or applied physics and as a reference for scientists actively involved in solid-state device re- search and development. It is assumed that the reader has already acquired an introductory understanding of solid-state physics and transistor theory such as is given in the standard texts Solid-State Physics by Dekker, Intro- duction to Solid-State Physics by Kittel (Wiley, 1966), Physics of Semicon- ductors by Moll, Introduction to Semiconductor Physics by Adler et al. (Wiley, 1964), Semiconductors by Smith, and Physics and Technology of Semiconductor Devices by Grove (Wiley, 1967). With this as a basis, the present book elaborates on device theory in more detail. A semiconductor device is defined herein as a unit which consists, partially or wholly, of semiconducting materials and which can perform useful func- tions in electronic apparatus and solid-state research. Since the invention of the transistor in 1948 the number and variety of semiconductor devices have increased tremendously as advanced technology, new materials, and broad- ened comprehension have been applied to the creation of new devices. In a book of this length it is not possible to give a complete account of all of them. An attempt, however, has been made to include most of the important de- vices, in particular, the microwave, interface, and optoelectronic devices; and to present them in a unified and coherent fashion. It is hoped that this book can serve as a basis for the understanding of other devices not included here and perhaps not even conceived of at the present time. viii Preface This text began as a set of lecture notes for an out-of-hours course in " Semiconductor Device Physics " given at Bell Laboratories and later pre- sented as a graduate course in "Selected Topics on Solid-State Devices" at Stevens Institute of Technology. For numerical data on semiconductor properties the principal source was the Data Sheets compiled by the Electronic Properties Information Center of Hughes Aircraft Company. More than two thousand papers on semiconductor devices, cataloged at the Murray Hill Library of Bell Laboratories, have provided background. For each chapter a brief historical review, as well as a general outline, is given in its introduction. The physics of the device and its mathematical formulation are then presented in subsequent sections and are generally arranged in logical sequence without heavy reliance on the original papers. The literature and many illustrations used in the book are acknowledged in the reference lists at the close of each chapter. In Chapter 2 extensive data have been compiled and presented for the three most important semiconductors: germanium, silicon, and gallium arsenide. These data are used in analyzing device characteristics throughout this book. In Chapters 3 through 14 each considers a specific device or a group of closely related devices and each is presented in such a way that it is self- contained and essentially independent of the others ; for example, if one is interested in bulk-effect devices, he can refer directly to the last chapter with- out consulting any of those between Chapters 3 and 13. During the course of the writing I have been deeply grateful to many of my colleagues at Bell Laboratories ; without their help this book could not have been written. I wish to express, in particular, my gratitude to Dr. R. M. Ryder for his constant encouragement and constructive criticism and to Drs. W. S. Boyle and F. M. Smits for providing a stimulating and challenging environ- ment in which I have been welcomed, inspired, and abundantly assisted. I am also indebted to Drs. J. M. Andrews, H. J. Boll, J. R. Brews, C. Y. Chang, B. C. DeLoach, J. C. Dyment, R. Edwards, A. Goetzberger, H. K. Gummel, F. Harper, J. E. Iwersen, D. Kahng, S. Knight, M. Kuhn, H. S. Lee, T. P. Lee, M. P. Lepselter, W. T. Lynch, H. Melchior, T. Misawa, E. H. Nicollian, T. Paoli, H. C. Poon, R. J. Powell, J. E. Ripper, W. Rosenzweig, D. L. Schar- fetter, L. S. Senhouse, J. Sevick, H. Thim, and T. H. Zachos for their helpful suggestions and discussions on one or more chapters of the book. I am especially indebted to Mrs. E. S. Blair for her lucid technical editing of the entire manuscript. Thanks are due also to Professor G. J. Herskowitz of Stevens Institute of Technology, who provided the opportunity for me to teach the course on which this text is based, and to Mrs. M. Neuberger of the Electronic Properties Information Center, Hughes Aircraft Company, who provided the up-to-date compilation of data sheets and kindly checked the tables used in Chapter 2. It is a pleasure to acknowledge Mr. G. P. Carey and Mr. A. Loya, who did most of the literature searching on semiconductor Preface ix devices, and my students at Stevens Institute, in particular Mr. P. P. Bohn and Mr. H. A. Kruegle, who helped to correct many errors in the original class notes. I wish to thank Miss D. A. Williams who typed the final manu- script, Mrs. J. Hendricks, Miss J. McCarthy, and Mrs. E. H. Nevitt who typed various sections of the book in its revision stage, and the members of the Murray Hill Drafting Department of Bell Laboratories who furnished the more than five hundred technical drawings used in this book. The support of C. Y. Tung's Chair Professorship grant and the hospitality of the National Chiao Tung University provided the environment in which to read the proofs of the book. Finally, I wish especially to thank my wife Therese Ling-yi for her assistance in many ways, including the typing of the entire first draft. S. M. Sze Contents Chapter 1 Introduction 1 1. General Outline 1 2. Classification of Semiconductor Devices 3 3. Specific Remarks 5 PART I SEMICONDUCTOR PHYSICS Chapter 2 Physics and Properties of Semiconductors — A Resume 11 1. Introduction 11 2. Crystal Structure 12 3. Energy Bands 17 4. Carrier Concentration at Thermal Equilibrium 25 5. Carrier Transport Phenomena 38 6. Phonon Spectra and Optical, Thermal, and High-Field Properties of Semiconductors 50 7. Basic Equations for Semiconductor Device Operation .... 65 PART II p-n JUNCTION DEVICES ^ Chapter 3 p-n Junction Diodes 77 1. Introduction 77 2. Basic Device Technology . . . 78 xi xii Contents 3. Depletion Region and Depletion Capacitance 84 4. Current-Voltage Characteristics 96 5. Junction Breakdown 109 6. Transient Behavior and Noise 127 7. Terminal Functions 131 8. Heterojunction 140 Chapter 4 Tunnel Diode and Backward Diode 150 1. Introduction 150 2. Effects of High Doping 151 3. Tunneling Processes 156 4. Excess Current 169 5. Current- Voltage Characteristics Due to Effects of Doping, Temperature, Electron Bombardment, and Pressure .... 172 6. Equivalent Circuit 190 7. Backward Diode 193 Chapter 5 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) 200 1. Introduction 200 2. Static Characteristics 202 3. Basic Dynamic Characteristics 215 4. Generalized Small-Signal Analysis 221 5. Large-Signal Analysis 234 6. Noise 240 7. Experiments 244 Chapter 6 Junction Transistors 261 1. Introduction 261 2. Static Characteristics 262 3. Microwave Transistor 279 4. Power Transistor 295 5. Switching Transistor 302 6. Unijunction Transistor 310 Chapter 7 p-n-p-n and Junction Field-Effect Devices 319 1. Introduction 319 2. Shockley Diode and Semiconductor-Controlled Rectifier . . . 320 3. Junction Field-Effect Transistor and Current Limiter .... 340 Contents xiii PART III INTERFACE AND THIN-FILM DEVICES Chapter 8 Metal-Semiconductor Devices 363 1. Introduction 363 2. Schottky Effect 364 3. Energy Band Relation at Metal-Semiconductor Contact ... 368 4. Current Transport Theory in Schottky Barriers 378 5. Measurement of Schottky Barrier Height 393 6. Clamped Transistor, Schottky Gate FET, and Metal-Semicondutor IMPATT Diode 410 7. Mott Barrier, Point-Contact Rectifier, and Ohmic Contact . . 414 8. Space-Charge-Limited Diode 417 Chapter 9 Metal-Insulator-Semiconductor (MIS) Diodes . . . 425 1. Introduction 425 2. Ideal Metal-Insulator-Semiconductor (MIS) Diode 426 3. Surface States, Surface Charges, and Space Charges 444 4. Effects of Metal Work Function, Crystal Orientation, Temperature, Illumination, and Radiation on MIS Characteristics 467 5. Surface Varactor, Avalanche, Tunneling, and Electroluminescent MIS Diodes 479 6. Carrier Transport in Insulating Films 492 Chapter 10 IGFET and Related Surface Field Effects 505 1. Introduction 505 2. Surface-Space-Charge Region Under Nonequilibrium Condition 506 3. Channel Conductance 512 4. Basic Device Characteristics 515 5. General Characteristics 524 6. IGFET with Schottky Barrier Contacts for Source and Drain . 546 7. IGFET with a Floating Gate — A Memory Device 550 8. Surface Field Effects on p-n Junctions and Metal- Semiconductor Devices 555 Chapter 11 Thin-Film Devices 567 1. Introduction 567 2. Insulated-Gate Thin-Film Transistors (TFT) 568 xiv Contents 3. Hot-Electron Transistors 587 4. Metal-Insulator-Metal Structure 614 PART IV OPTOELECTRONIC DEVICES [f- Chapter 12 Optoelectronic Devices 625 1. Introduction 625 2. Electroluminescent Devices 626 3. Solar Cell 640 4. Photodetectors 653 Chapter 13 Semiconductor Lasers 687 1. Introduction 687 2. Semiconductor Laser Physics 688 3. Junction Lasers 699 4. Heterostructure and Continuous Room-Temperature Operation 723 5. Other Pumping Methods and Laser Materials 725 PART V BULK-EFFECT DEVICES Chapter 14 Bulk-Effect Devices 731 1. Introduction 731 2. Bulk Differential Negative Resistance 732 3. Ridley- Watkins-Hilsum (RWH) Mechanism 741 4. Gunn Oscillator and Various Modes of Operation 749 5. Associated Bulk-Effect Devices 778 Author Index 789 Subject Index 799 Physics of Semiconductor Devices ■ GENERAL OUTLINE ■ CLASSIFICATION OF SEMICONDUCTOR DEVICES ■ SPECIFIC REMARKS Introduction I GENERAL OUTLINE The contents of this book can be divided into five parts : Part 1 : resume of physics and properties of semiconductors, Part 2 : p-n junction devices, Part 3 : interface and thin-film devices, Part 4 : optoelectronic devices, and Part 5 : bulk-effect devices. Part 1 in Chapter 2 is intended as a summary of materials properties, to be used throughout the book as a basis for understanding and calculating device characteristics. Carrier distribution and transport properties are briefly surveyed, with emphasis on the three most important materials: Ge, Si, and GaAs. A compilation of the most recent and most accurate information on these semiconductors is given in the tables and illustrations of Chapter 2. Part 2, Chapters 3 through 7, treats of devices with one or more interacting p-n junctions. The classic moderate-field p-n junction of Chapter 3 is basic both for itself and as a component of more involved devices. When the junction is doped heavily enough on both sides so that the field becomes high enough for tunneling, one obtains the new features of tunnel diode behavior (Chapter 4). When the junction is operated in avalanche breakdown, under proper conditions one obtains an IMPATT diode which can generate micro- 2 Introduction wave radiation (Chapter 5). Chapter 6 treats of the junction transistor, that is, the interaction between two closely-coupled junctions, which is the single most important semiconductor device. Other junction devices are in Chapter 7; among these are the p-n-p-n triple-junction devices, and the junction field-effect transistor which utilizes the junction field to control a current flow which is parallel to the junction rather than perpendicular to it. Part 3, Chapters 8 through 11, deals with interfaces, or surfaces between semiconductors and other materials. Interfaces with metals, in particular the Schottky barrier, are in Chapter 8. The Schottky diode behavior is electrically similar to a one-sided abrupt p-n junction, and yet it can be operated as a majority-carrier device with inherent fast response. Metal-insulator-semi- conductor devices and the related surface physics of the insulator-semicon- ductor interface are considered in Chapters 9 and 10. This knowledge of "surface states" is important not only because of the devices themselves but also because of the relevance to stability and reliability of all other semi- conductor devices. Chapter 11 considers some thin-film and hot-electron devices which also belong to the interface-device family. Part 4, Chapters 12 and 13, considers optoelectronic devices which can detect, generate, and convert optical energy to electric energy or vice versa. We shall consider various photodetectors and the solar cell in Chapter 12. Chapter 13 is devoted to one of the most important optoelectronic devices: the semiconductor laser. Part 5, Chapter 14, considers some so-called "bulk property" devices, primarily those concerned with the intervalley-transfer mechanism (Gunn oscillator and LSA oscillator). These devices do not depend primarily on p-n junctions or interfaces, but they do operate at reasonably high fields, so that the velocity-field relationship and various modes of operation are of prime interest in Chapter 14. In the presentation of each device chapter, the historical events concerning the invention and derivation of a particular device or a group of closely related devices are briefly reviewed. This is then followed by consideration of device characteristics and physical principles. It is intended that each chapter should be more or less independent of the other chapters, so that the instructor or the reader can select or rearrange the device chapters in accordance with his own schedule. A remark on notation : in order to keep the notations simple, it is necessary to use the simple symbols more than once, with different meanings for different devices. For example, the symbol a is used as the common-base current gain for a junction transistor, as the optical absorption coefficient for a photo- detector, and as the electron impact ionization coefficient for an IMPATT diode. This usage is considered preferable to the alternative, which would be to use alpha only once, and then be forced to find more complicated symbols 2 Classification of Semiconductor Devices 3 for the other uses. Within each chapter, however, each symbol is used with only one meaning and is defined the first time it appears. Many symbols do have the same or similar meanings consistently throughout this book; they are summarized in Table 1.1 for convenient reference. 2 CLASSIFICATION OF SEMICONDUCTOR DEVICES In the previous section we have classified semiconductor devices in ac- cordance with material combinations (such as the semiconductor alone, or a combination of metal, semiconductor, and insulator) and material properties (such as the optical property, or the intervalley transfer property). This classification is used because it permits an orderly sequence from one device to another within the book. TABLE 1.1 LIST OF BASIC SYMBOLS Symbol Name Unit a lattice spacing A 31 magnetic induction Weber/m 2 c velocity of light in free space cm/sec C capacitance farad 2> electric displacement coul/cm 2 D diffusion coefficient cm 2 /sec E energy eV E c bottom of conduction band eV E F Fermi energy level eV E g energy gap band eV Ey top of valence band eV <S electric field volt/cm $c critical field volt/cm £ m maximum field volt/cm f frequency Hz(cps) F{E) Fermi-Dirac distribution function h Planck's constant joule-sec hv photon energy eV I current amp Ic collector current amp J current density amp/cm 2 Jt threshold current density amp/cm 2 k Boltzmann's constant joule/°K kT thermal energy eV L length cm or nm m free electron mass kg m* effective mass kg TABLE I.I (Cont.) Symbol Name Unit n refractive index n density of free electrons cm -3 Hi intrinsic density cm -3 N doping concentration cm -3 N A acceptor impurity density cm -3 N c effective density of states in conduction band cm -3 N D donor impurity density cm -3 N v effective density of states in valence band cm -3 P density of free holes cm -3 P pressure dyne/cm 2 <? magnitude of electronic charge coulomb Qss surface-state density charges/cm 2 R resistance ohm t time sec T absolute temperature °K V carrier velocity cm/sec Vsl scattering-limited velocity cm/sec Vi* thermal velocity (\ / 3kT/m) cm/sec V voltage volts v bl build-in potential volts Veb emitter-base voltage volts Vb breakdown voltage volts W thickness cm or fira w B base thickness cm or /u.m X x-direction V differential operator VT temperature gradient °K/cm £o free space permittivity farad/cm Ss semiconductor permittivity farad/cm Ei insulator permittivity farad/cm e s /e or £,/e dielectric constant T lifetime or decay time second e angle radian A wavelength (Am or A V frequency of light Hz 1*0 free-space permeability henry/cm Hn electron mobility cm 2 /V-sec [Ap hole mobility cm 2 /V-sec P resistivity ohm-cm <!> barrier height or imref volts <f>Bn Schottky barrier height on n -type semiconductor volts <}>Bp Schottky barrier height on p -type semiconductor volts </>,„ metal work function volts CO angular frequency (2-rrf or 2itv) Hz a ohm ohm 3 Specific Remarks 5 A more systematic method of classifying semiconductor devices, as pro- posed by Angello, 1 will be presented in this section. This system can be used to classify all the present and future semiconductor devices, and can serve to organize creative thinking. The system starts by listing a complete set of semiconductor properties and a complete set of external influences (such as applied voltage) which can modify semiconductor attributes. Devices are then classified in the order of the progressive complication of the semiconductor attributes, with external influences applied singly, in pairs, and so on. We shall start with homogeneous semiconductors (bulk-effect without junction) and apply the external influences one at a time. The devices with the next degree of complication will be the bulk-effect with a pair of external influences, a triple, and so on. A single p-n junction will be the simplest departure from bulk-effect devices, and the external influences will be applied singly, in pairs, and so on. Finally, we shall consider multiple junction (or interface) devices, and the external influences will be applied accordingly. Table 1.2 presents some of the bulk-effect devices where the symbols for external influences are defined in Table 1.1. Table 1 .3 presents some important single-junction (or interface) devices. Table 1.4 presents some important multiple junction (or interface) devices. These lists are not intended to exhaust all the possibilities. However, by extending the list of effects and in- fluences, other semiconductor devices may be classified similarly. Table 1.5 shows all the devices that will be considered in this book. They are classified into the aforementioned three groups. We note that a chapter may include devices from all three groups. For example, in Chapter 7, we shall consider the current limiter (bulk-effect), the field-effect diode (single- junction), and the junction field effect transistor (multiple-junction); they are included in this chapter because of the similarities of these devices in configuration and characteristics. 3 SPECIFIC REMARKS It may be worthwhile to point out some interesting thoughts pertinent to this book. First of all, the electronics field in general and the semiconductor-device field in particular are so dynamic and so fast-changing that today's concepts may be obsolete tomorrow. Remember these "famous last words" 2 ? " They'll never replace the smoke signal as the fastest means of communica- tion."— Chief White Cloud, "The telegraph is the ultimate in fast communication."— Engineer, 1850's, " With the vacuum tube, we've reached the zenith in communication poten- tial."— Engineer, 1920's, Introduction TABLE 1.2 BULK-EFFECT DEVICES External Influence Number of Electrodes Features Name of Device (where applicable) No. Influence hv transmission of light over certain frequency Optical filter optical and electron-beam pumping Lasers £ 2 /= aS Resistor 1 voltage-controlled negative resistance Gunn oscillator current-controlled negative resistance Cryosar /= COnSt. for <f > threshold Current limiter vr 2 Seeback effect «? ~ \JT hv,i 2 J=a{hv)£ Photoconductor s, ze 2 j=o{3>?)g Magnetoresistor 4 Hall effect, V = f{Jf, #) Hall generator 2 S, T 2 J=a{J)S Thermistor <f, vr 2 Thomson heat, ~ VT s,p 2 peizoresistance effect Strain gauge 3 jp jp *up j , ©2) «^* 3 Suhl effect "Transistors are the final step in the search for speedy, reliable means of communication. " — Engineer, 1 9 50's, "Integrated circuits are IT! They can't possibly go beyond this revolution- ary new concept." — Engineer, 1960's, .... It is thus important for one to understand the fundamental physical processes and to equip himself with sufficient background in physics and mathematics to digest, to appreciate, and to meet the challenge of these dynamic fields. We should also be aware of the widespread use of digital computers in almost every field. A digital computer is basically a faster, more powerful, TABLE 1.3 SINGLE-JUNCTION (OR INTERFACE) DEVICES External Influence No. Influence hv VT Number of Electrodes r,VT £,hv Features photovoltaic effect regular p-n junction (p-n) p-n used as variable resistor p-n used as variable capacitor p-n used as light source p-n with very high dopings on both sides with moderately high dopings, direct band-gap, reflection surfaces limit voltage by avalanche breakdown or tunneling Name of Device (where applicable) Photocell, solar cell Diode, rectifier Varistor Varactor Electroluminescent diode Tunnel diode Injection laser microwave generation by impact-avalanche and transit-time effect unipolar device used as current limiter junction formed between semiconductors with different band gaps contacts between metal and semiconductor Seeback effect minority injection into a filament Peltier effect J = f(S,hv) Voltage regulator IMPATT diode Field-effect diode Heteroj unction (n-n, p-n, and p-p) Schottky diode, Mott diode, point-contact Thermocouple, thermoelectric generator Unijunction tran- sistor (double- base diode) Peltier refrigerator Photodiode Introduction TABLE 1.4 MULTIPLE-JUNCTION (OR INTERFACE) DEVICES External Influences Number of Electrodes Features Name of Device (where applicable) No. Influence S 2 four-layer p-n-p-n diode Shockley diode 1 2 metal-insulator-metal device MIM tunneling diode 2 metal-insulator-semi- conductor device MIS diode and/or 2 3 p-n-p and n-p-n Junction transistors 3 p-n-p-n with one gate Semiconductor con- trolled rectifier (SCR) 1 3 junction unipolar transistor JFET or 2 3 insulated-gate field-effect transistor IGFET 3 thin-film transistor with de- posited semiconductor film TFT 3 semiconductor-metal-semi- conductor structures and other related structures Hot-electron transistor £,hv 3 with incident light Optical transistor and more versatile " sliderule." With this "sliderule" we can solve many nonlinear problems, we can handle millions of computations in a short time, and we can simulate dynamic behavior and discover useful results prior to experimental investigations. In this book many theoretial results and illustra- tions have been obtained with the help of computers. The reader is thus expected to have some basic familiarity with these aids. It is important to point out that many of the devices, especially the micro- wave devices such as IMPATT diodes and Gunn oscillators, are still under intensive investigation. Their large-signal behaviors and ultimate perform- ances are by no means fully understood at the present time. The material presented in this book is intended to serve as a foundation. The reader is u r- <s m ■* ■* ■<* ■<+ X! U , , c c !D C « n (]> w <1> u c/5 u. u. > •— > O o ta T3 it: T3 > Q T3 13 T3 c (Tl JD c ITS O o 13 l-H V c '33 00 L. O Uh o L- ^! 0) o o, 60 C (J CJ O 3 o u 1> <ij (I) (Tl pq E 3 C o xj o, E 3 3 60 60 03 60 oo GO > O c U, > o . F U W5 c C T3 £ i- V, o y (J t« >-> 3 <u X! oj 3 rt 1-1 3 (Tl o X U a. J X) pq pq UJ H • • * • • • * ci &0 u U T3 o 03 GO c <L> 03 C E o E !_ 3 O <a o Ci X> £ F CO 3 crj z TD C O E O <u 1> o c x: h. t> ^ C 03 • TJ l" U — 60 *■> o v 77 <" c <e £ - 3 a 3 C «C •x. & ^ c c <u E 13 mag emp essu 4> r^ °< X *® ^ - LU 2 SiS <U 3 w CC « C o62 •J-J <L> -1-. 8 £ 'H 7- D S 10 Introduction expected to enhance his understanding by consulting the original literature with an inquiring mind that will not blindly accept all statements. He is also expected to attend technical conferences to exchange, to listen to, and to argue about technical ideas which may clarify misconcepts, inspire new ideas, and stimulate new thoughts. Integrated circuitry (IC) is not discussed in this book. This is because IC is basically a technology. We are primarily concerned with the physics and operational principles of the individual devices which form the building blocks of integrated circuits. Only by understanding individual devices can we fully use them either as discrete components or as integrated systems. REFERENCES 1. S. J. Angello, "Review of Other Semiconductor Devices," Proc. IRE, 46, 968 (1958). 2. Compiled by H. C. Spencer. PART I SEMICONDUCTOR PHYSICS Physics and Properties of Semiconductors — A Resume INTRODUCTION CRYSTAL STRUCTURE ENERGY BANDS CARRIER CONCENTRATION AT THERMAL EQUILIBRIUM CARRIER TRANSPORT PHENOMENA PHONON SPECTRA, AND OPTICAL, THERMAL, AND HIGH-FIELD PROPERTIES OF SEMICONDUCTORS BASIC EQUATIONS FOR SEMICONDUCTOR DEVICE OPERATION 2 Physics and Properties of Semiconductors — A Resume I INTRODUCTION The physics of semiconductor devices is naturally dependent on the physics of semiconductors themselves. It is the purpose of this chapter to present a summary of the physics and properties of semiconductors. The summary represents only a small cross section of the vast literature on semiconductors ; only those subjects pertinent to device operations are included here. For detailed consideration of semiconductor physics the reader should consult the standard textbooks or reference works by Dunlap, 1 Madelung, 2 Moll, 3 and Smith. 4 In order to condense a large amount of information into a single chapter, four tables and over thirty illustrations drawn from the experimental data are compiled and presented here. It is well known that, of all semiconductors, the elements germanium and silicon are the most extensively studied. In recent years^ gallium arsenide has also been intensively investigated because of its many interesting properties which differ from those of Ge and Si, particularly its direct band gap for laser application and its intervalley-carrier transport for generation of microwaves. Hence in this chapter emphasis will be placed on the above three most important semiconductors. 11 12 Physics and Properties of Semiconductors — A Resume We shall first consider the crystal structure in Section 2, since the electronic properties of solids are intimately related to their lattice structures. We shall review the Miller indices which define crystal planes in real space and desig- nate momenta in energy-momentum space. In Section 3, we shall consider energy bands, and the related parameters such as the effective mass m* and the energy band gap E g . It is found that for most semiconductors there is a close resemblance between the motion of an electron in a crystal and the free electron, particularly for an electron with energy near a minimum in energy- momentum space. Most of the electronic behaviors can be described in classical terms as though they were free electrons with an effective mass m*. The energy gap corresponds to the energy difference between the top of the valence band which is completely filled at 0°K and the bottom of the conduc- tion band which is empty at 0°K. At higher temperatures there are electrons in the conduction band and holes in the valence band. For most semi- conductors the transport processes for electrons and holes are considered to be independent of each other; and the total conduction current is simply the sum of the electron and hole current components. Carrier concentration and carrier transport phenomena, based on the energy band theory, are considered in Sections 4 and 5 respectively. Other related properties of semiconductors under various external influences are discussed in Section 6. Finally, the basic equations for semiconductor device operation are summarized in Section 7. 2 CRYSTAL STRUCTURE For a crystalline solid there exist three primitive basis vectors, a, b, c, such that the crystal structure remains invariant under translation through any vector which is the sum of integral multiples of these basis vectors. In other words, the direct lattice sites can be defined by the set 5 t }\ ,vv| l = mz + nb + pc (1) where m, n, and p are integers. Figure 1 shows some of the important unit cells (direct lattices). A great many of the important semiconductors are of diamond or zincblende lattice structures which belong to the tetrahedral phases, i.e., each atom is sur- rounded by four equidistant nearest neighbors which lie at the corners of a tetrahedron. The bond between two nearest neighbors is formed by two electrons with opposite spins. The diamond and the zincblende lattices can be considered as two interpenetrating face-centered cubic lattices. For the diamond lattice, such as silicon, all the atoms are silicon; in a zincblende lattice, such as gallium aresnide (GaAs), one of the sublattices is gallium and 2 Crystal Structure 13 SIMPLE CUBIC (P, Mn) BODY-CENTERED CUBIC PACE- (Na , W, etc ) CENTERED CUBIC (At, Au, etc) DIAMOND (C.Ge.Si.etc) a ZINCBLENDE (GaAs, GaP InSb.etc) Fig. 1 Some of the important unit cells (direct lattices) and their representative elements or compounds. the other is arsenic. Gallium arsenide is a III-V compound, since it is formed from elements of Column III and Column V in the Periodic Table. Most III-V compounds crystallize in the zincblende structure, 2 ' 6,7 however, many semiconductors (including some III-V compounds) crystallize in the wurtzite structure which also has a tetrahedral arrangement of nearest neighbors. Figure 2 shows the hexagonal close-packed lattice as well as the wurtzite lattice which can be considered as two interpenetrating hexagonal close- packed lattices. We note that, as in the zincblende lattice, each atom of the wurtzite lattice is surrounded by four equidistant nearest neighbors at the 14 Physics and Properties of Semiconductors — A Resume HEXAGONAL CLOSE-PACKED LATTICE (Cd.Li.etC) WURTZITE LATTICE (CdS.etC) Fig. 2 Hexagonal close-packed lattice and wurtzite lattice. corners of a tetrahedron. The lattice constants of some important semi- conductors are summarized in Table 2.1 along with their crystal structures. 8 It is of interest to note that some compounds, such as zinc sulfide and cad- mium sulfide, can crystallize in both zincblende and wurtzite structures. For a given set of the direct basis vectors, one can define a set of reciprocal lattice basis vectors, a*, b*, c* such that a* = 2n b x c a • b x c' b* = 2n c x a *~ axb — , c* = 2n— , (2) a-bxc a • b x c o o "3 c c o U ON 00 NO 1^ Tt 00 N v£> r- O ON no m ci oo m NO ■"* ■<*■ r<i vi iri vd OO in no I/O II m u ifi fl- ifi oo io oo m ui oo -inciooooooo m — ^mvoovin>nr^inso — ;\OinooON£>Tt-5frOOO V0wrj"\0iflirtvo , | n II <3 no ^ 1! II in ^ no -■* in ci II II in o m no ON Tf in no 3 o 3 55 "c3 co >> u Diamond Diamond Diamond Diamond c H) X) o c N U 4> U DOOUDU T3 "O XI "OT3T3T3T3T3 ccc<ucccccc OOOi-OOOOOO CCC.3CCCCCC N N N ^ N N N N N N Zincblende Wurtzite Zincblende Cubic Zincblende Wurtzite 3 3 u u u E Carbon (Diamond) Germanium Silicon Grey Tin 4> IB ca o c o o j/5 Aluminum antimonide Boron nitride Boron phosphide Gallium nitride Gallium antimonide Gallium arsenide Gallium phosphide Indium antimonide Indium arsenide Indium phosphide Cadmium sulfide Cadmium sulfide Cadmium selenide Zinc oxide Zinc sulfide Zinc sulfide CO +-» Element or Compound UOmw y 1/3 •a t3 t3 c a c U U U N N N X) X) u O 3 3 1 8 1) > > > > > 15 16 Physics and Properties of Semiconductors — A Resume so that a • a* = 2% ; a • b* = 0, etc ; and the general reciprocal lattice vector is given by g = ha* + kb* + /c* (3). where h, k, and / are integers. It can be shown that the product g • 1 = 2n x integer ; that each vector of the reciprocal lattice is normal to a set of planes in the direct lattice ; and that the volume V* of a unit cell of the reciprocal lattice is inversely pro- (100) (110) (in) Fig. 3 Miller indices of some important planes in a cubic crystal where a is the lattice constant. 3 Energy Bands 17 portional to the volume V c of a unit cell of the direct lattice, i.e., V* = (2n) 3 /V c where V c = a • b x c. A convenient method of defining the various planes in a crystal is by the use of the Miller indices which are determined by first finding the intercepts of the plane with the three basis axes in terms of the lattice constants and then taking the reciprocals of these numbers and reducing them to the smallest three integers having the same ratio. The result is enclosed in parentheses (hkl) as the Miller indices for a single plane or a set of parallel planes. The Miller indices of some important planes in a cubic crystal are shown in Fig. 3. Some other conventions are given as follows: 5 (Ekl): for a plane that intercepts the x-axis on the negative side of the origin. {hkl}: for planes of equivalent symmetry such as {100} for (100), (010), (001), (TOO), (010), and (00T) in cubic symmetry. [hkl] : for the direction of a crystal such as [100] for the x-axis. (hkl)> : for a full set of equivalent directions. [a x a 2 a 2) c] : for a hexagonal lattice. Here it is customary to use four axes (Fig. 2) with c-axis as the [0001] direction. For the two semiconductor elements, germanium and silicon, the easiest breakage, or cleavage, planes are the {111} planes. In contrast gallium arsen- ide, which has a similar lattice structure but also has a slight ionic component in the bonds, cleaves on {110} planes. The unit cell of a reciprocal lattice can be generally represented by a Wigner-Seitz cell. The Wigner-Seitz cell is constructed by drawing perpen- dicular bisector planes in the reciprocal lattice from the chosen center to the nearest equivalent reciprocal lattice sites. A typical example is shown 9> 10 in Fig. 4(a) for a face-centered cubic structure. If one first draws lines from the center point (r) to all the eight corners of the cube, then forms the bisector planes, the result is the truncated octahedron within the cube — a Wigner-Seitz cell. It can be shown that 11 a face-centered cubic (fee) direct lattice with lattice constant "a" has a body-centered cubic (bee) reciprocal lattice with spacing Anja. Thus the Wigner-Seitz cell shown in Fig. 4(a) is the unit cell of the reciprocal lattice of an fee direct lattice. Similarly we can construct the Wigner-Seitz cell for a hexagonal structure. 12 The result is shown in Fig. 4(b). The symbols used in Fig. 4 are adopted from Group Theory. Some of the symbols will be used in the next section on energy bands. 3 ENERGY BANDS The band structure of a crystalline solid, i.e., the energy-momentum (E-k) relationship is usually obtained by the solution of the Schrodinger 18 Physics and Properties of Semiconductors — A Resume (a) Fig. 4 (a) Brillouin zone for diamond and zincblende lattices. (b) Brillouin zone for wurtzite lattice. Also indicated are the most important symmetry points and symmetry lines such as: T: 277/0 (0, 0, 0), zone center L: 27r/o (£, 4> i), zone edge along <111> axes (A) X: 27r/o (0, 0, 1), zone edge along <100> axes (A) K: 2tt/o (I, |, 0), zone edge along <110> axes (2). (After Brillouin, Ref. 9; and Cohen, Ref. 12.) equation of an approximate one-electron problem. One of the most important theorems basic to band structure is the Bloch theorem which states that if a potential energy PE(r) is periodic with the periodicity of the lattice, then the solutions ^> k (r) of the Schrodinger equation n ' 13 (- 2m V 2 + P£(r) ■)] (f>k(r) = E k (f) k (r) (4) are of the form k (r) = e Jk " r U k (r) = Bloch function (5) 3 Energy Bands 19 where U k (r) is periodic in r with the periodicity of the direct lattice. From the Bloch theorem one can show that the energy £" k is periodic in the reci- procal lattice, i.e., E k = E k+g where g is given by Eq. (3). Thus to label the energy uniquely it is sufficient to use only k's in a primitive cell of the re- ciprocal lattice. The standard convention is to use the Wigner-Seitz cell in the reciprocal lattice as shown in Fig. 4. This cell is called the Brillouin zone or the first Brillouin zone. 9 It is thus evident that we can reduce any momen- tum k in the reciprocal space to a point in the Brillouin zone where any energy state can be given a label in the reduced zone schemes. The Brillouin zone for the diamond and the zincblende lattices is the same as that of the fee and is shown in Fig. 4(a). The Brillouin zone for the wurtzite lattice is shown in Fig. 4(b). Also indicated are the most important symmetry points and symmetry lines such as the center of the zone [T = 2n/a(0, 0, 0)], the < 1 1 1 > axes (A) and their intersections with the zone edge [L = 2n/a(^, \, i)], the <100> axes (A) and their intersections ]X= 2nja(0, 0, 1)], and the <110> axes (I) and their intersections [K= 2n/aQ, f, 0)]. The energy bands of solids have been studied theoretically using a variety of computer methods. For semiconductors the two methods most frequently used are the orthogonalized plane wave method 14 ' 15 and the pseudopotential method. 16 Recent results 17 of studies of the energy band structures of Ge, Si, and GaAs are shown in Fig. 5. One notices that for any semiconductor there is a forbidden energy region in which no allowed states can exist. Above and below this energy gap are permitted energy regions or energy bands. The upper bands are called the conduction bands; the lower bands, the valence bands. The separation between the energy of the lowest conduction band and that of the highest valence band is called the band gap, E g , which is the most important parameter in semiconductor physics. Before we discuss the details of the band structure, we shall first consider the simplified band picture as shown in Fig. 6. In this figure the bottom of the conduction band is designated by E c , and the top of the valence band by E v . The electron energy is conventionally defined to be positive when measured upwards, and the hole energy is positive when measured downwards. The band gaps of some important semiconductors are listed 18 in Table 2.2. The valence band in the zincblende structure consists of four subbands when spin is neglected in the Schrodinger equation, and each band is doubled when spin is taken into account. Three of the four bands are degenerate at k = (T point) and form the upper edge of the band, and the fourth one forms the bottom. Furthermore the spin-orbit interaction causes a splitting of the band at k = 0. As shown in Fig. 5 the two top valence bands can be approximately fitted by two parabolic bands with different curvatures: the heavy-hole band (the wider band with smaller d 2 E/dk 2 ) and the light-hole band (the narrower band with larger 8 2 E/dk 2 ). The effective mass, which is to 111 Z < £2 O ■!-> "C s s 5 >o oo CJ\ </-) 4> g </S VO f-4 o r- 1 u-> d o t-~ Tt Tj- ."S o rt ""^ 1—1 1—1 >— 1 -H <— ( 1—1 ^H ,— 1 Q U "* V© O co <-J Wl in m o" © o" © ^H COS <D S ii ii ll ll p ■* V) lO v~% VD ■* t tn "o II II 1 — 1 d odd d d d ffi *5 ** *£*£ 5 > * s s s s rs "S s oo r- on c o l-l vq p Ov *■* t- 00 m Slit © d II II vo co •^- VO O O v-i « <N r~ o o o CJ © d odd odd 4> * * * # W 5 S S £ + + .> •o i 3 t/5 »3 V) t/5 » n n C I <c < < < < < < «j c 3 3 <u rt C3 a a Dfl - 35 O 33 O 33 33 O O 33 ooo 5 5 * 88 o o Q O V-) o o o <o <N |§^ </-i vo in o V© ON v© rr r- tj- ^h 8 £ X * 8 ■f 00 Ct w 5 ** VI c 1? o 88 8 o o © 8 8 2 O O Q OOO O O vo 2^ (J 00 CT\ w-> <N n> i-h CO t£ oo oo rt tJ- r-~ m 53 o^ «-h >/-> v© 00 VI o es o oo <ri •?£ VO vo ■* v-> (-; *"i o ^* r~; <N •<* CO a © >/-i © — ' © co _^ o" -I r4 d ©' ^ nl * 2> c w rt PO « r-~ vo rJ CO r- m ■^■ vo m on 8 rt vq — ^ vq i/o w> vq Tt o4 — i m r» >o d co ^ I—' VO 2 r<S O* *-i <S © ©* ^ ^^ >_ J2 o ►— 1 "2 c o T3 <u 3 a TD o 5 C o o S E 5 y 33 S2 % o. Z !/3 ■< Ph rt rt rt cti 00 < Ph in u o 33 O 8 < PQ pq oooo (3 C CJ ._ e i > > J 1— 1 s 1— < 1— I 20 o O o\ oo . r- © VO O o d d © © © ^ VO fS d d VI < a crt </3 </> < < < ooo 4) a) a a o o o o o t- © O © CO 8 (N VO Q O © O vo o VO C-J in 00 t-; d d r~; en v© d d in U "5 W3 O U N C N &h Pi > > ie ** w S ctf . #. 'O VJ O (/J Ctf Q GO 4_> " 00 4) ^3 3 II 8.5 S CO w-» 00 O ^ 2 e G 2 u J3 .* GO go ,4) 3 e3 W O. Q » *\ go -S-g S3 <-> g > c a g ,2 c« * o « § M .-3 .. i> T go ■5 4 2 i° 8 eel > C 'J c •— ,s •c S to T3 -a « <2 < g S ° 3 8"H' a 3 KJ 00 G — O aj .- — ' > n || _g <u * h a s •1- ++ cos 21 22 Physics and Properties of Semiconductors — A Resume G« CONDUCTION ELECTRONS Eg LIGHT AND HEAVY HOLES VA GaAs f\\ I UPPER \ \ / / VALLEY \ \/ ~y^ \ ,/ +~^^v_/ 1 AE = 0.36 1 \ T~ E 9 1 LOWER VALLEY \ [III]. [100] [hi]*- -»-[ioo] MOMENTUM k [III]. • [100] Fig. 5 Energy band structures of Ge, Si, and GaAs where Eg is the energy band gap. (+) signs indicate holes in the valence bands and (— ) signs indicate electrons in the conduction bands. (After Cohen and Bergstresser, Ref. 17.) ELECTRON ENERGY HOLE ENERGY -»- DISTANCE Fig. 6 Simplified band diagram. 3 Energy Bands defined as 23 m = /d 2 E\ ' (6) is listed in Table 2.2 for some important semiconductors. The conduction band (Fig. 5) consists of a number of subbands. The bottom of the conduction band can appear along the <lll>-axes (A or L), along the <100>-axes (A or X), or at A: = (F). Symmetry considerations alone do not determine the location of the bottom of the conduction band. Experimental results show, however, that in Ge it is along the < 1 1 1 >-axes, in Si the <100>-axes, and in GaAs at A; = 0. The shapes of the constant energy surfaces 19 are shown in Fig. 7. For Ge there are eight ellipsoids of revolution along the <lll>-axes; the Brillouin zone boundaries are at the middle of the ellipsoids. For Si there are six along the <100>-axes with the centers of the ellipsoids located at about three quarters of the distance from the Brillouin zone center. For GaAs the constant energy surface is a sphere at the zone center. By fitting experimental results to parabolic bands, we obtain the electron effective masses ; one for GaAs, two for Ge, and two for Si: m z * along the symmetry axes and m t * transverse to the symmetry axes. These values also are given in Table 2.2. At room temperature and under normal atmosphere, the values of the band gap are 0.66 eV for Ge, 1.12 eV for Si, and 1.43 eV for GaAs. The above values are for high-purity materials. For highly-doped materials the band gaps become smaller. (The band gaps of degenerate semiconductors are considered in Chapter 4.) Experimental results show that the band gaps of most semiconductors decrease with increasing temperature. The detailed GaAs Fig. 7 Shapes of constant energy surfaces in Ge, Si, and GaAs. For Ge there are eight ellipsoids of revolution along <111> axes, and the Brillouin zone boundaries are at the middle of the ellipsoids. For Si there are six along <100> axes with the centers of the ellipsoids located at about three quarters of the distance from the Brillouin zone center. For GaAs the constant energy surface is a sphere at the zone center. (After Ziman, Ref. 19.) 24 Physics and Properties of Semiconductors — A Resume 1.2 - 0.9 - 0.7 0.6 GaAs ^\U43) Egm-EgW)-*^ Si ^(1.12) Ge ~ ^^\(0.66) MATERIAL Eg(0) a (XIO" 4 ) GaAS 1.522 5.8 300 Si 1.16 7.02 1108 Ge 0.741 4.56 210 1 t V i 1 , 1 400 T(°K) 800 Fig. 8 Energy band gaps of Ge, Si, and GaAs as a function of temperature. (after Varshni, Ref. 72; Panish and Casey, Ref. 73). variations of band gaps as a function of temperature for Ge, Si, and GaAs are shown 4 in Fig. 8. The band gap approaches 0.75, 1.16, and 1.52 eV respectively for the three semiconductors at 0°K. The variation of band gaps with temperature can be expressed by a universal function E g (T) = E g (0) - ccT 2 j(T + fi), where ^(0), a and p are given in Fig. 8. The temperature coefficient, dEJdT, is negative for the above three semiconductors. There are some semiconductors with positive dEJdT, e.g. , PbS (Table 2.2), which increases from 0.34 eV at 0°K to 0.41 eV at 300°K. Near room temperature, the band gaps of Ge and GaAs increase with pressure 20 (dEJdP = 5 x 10 ~ 6 eV/kg/cm 2 for Ge, and about 9 x 10~ 6 eV/kg/cm 2 for GaAs) and that of Si decreases with pressure (dE fdP= -2.4 x 10 -6 eV/kg/cm 2 ). 4 Carrier Concentration at Thermal Equilibrium 25 4 CARRIER CONCENTRATION AT THERMAL EQUILIBRIUM The three basic bond pictures of a semiconductor are shown in Fig. 9. Figure 9(a) shows intrinsic silicon which is very pure and contains a negligibly small amount of impurities ; each silicon atom shares its four valence electrons with the four neighboring atoms forming four covalent bonds (also see Fig. 1). Figure 9(b) shows schematically an «-type silicon where a substitutional phosphorus atom with five valence electrons has replaced a silicon atom, and a negative-charged electron is "donated" to the conduction band. The silicon is n type because of the addition of the negative charge carrier, and the phosphorus atom is called a "donor." Similarly as shown in Fig. 9(c), when a boron atom with three valence electrons substitutes for a silicon atom, an additional electron is "accepted" to form four covalent bonds around the boron, and a positive charged "hole" is created in the valence band. This is p type, and the boron is an "acceptor." : 0:©:© : (a) INTRINSIC Si (1) Intrinsic Semiconductor We now consider the intrinsic case. The number of occupied conduction-band levels is given by ■■ ©"'© = © : :• © = © : ©:■ n = f ° P N(E)F(E) dE J E C (7) where E c is the energy at the bottom of the con- duction band and E top is the energy at the top. N(E) is the density of states which for low-enough carrier densities and temperatures can be approxi- mated by the density near the bottom of the con- duction band: N(E) = M, J2(E-E c y 2 h- 0n de ) 3/2 (8) where M c is the number of equivalent minima in the conduction band, and m de is the density-of-state effective mass for electrons: 4 m de — (m 1 *m 2 *m 3 *) x/3 (9) (b)n-TYPE Si WITH DONOR ;©:■©:©*• : © : ©;,© : :©:0: : ©: : (c)p-TYPE Si WITH ACCEPTOR Fig. 9 Three basic bond pictures of a semiconductor: (a) intrinsic with negligible impurities; (b) n-type with donor (phos- phorus); and (c) p-type with acceptor (boron). 26 Physics and Properties of Semiconductors — A Resume where m t *, m 2 *, m 3 * are the effective masses along the principal axes of the ellipsoidal energy surface, e.g., in silicon m de = (raj*m,* 2 ) 1/3 . F(E) is the Fermi-Dirac distribution function given by F(E) = 1 1 + exp E-E } kT (10) where k is Boltzmann's constant, T the absolute temperature, and E F the Fermi energy which can be determined from the charge neutrality condition [see Section 4(3)]. The integral, Eq. (7), can be evaluated to be 2 /E F - E c \ en) where N c is the effective density of states in the conduction band and is given by N f 2nm, kTV 12 , _J 2nm de kT \ " \ h 2 ) M c , (12) and F 1/2 (r} f ) is the Fermi-Dirac integral which is shown 21 in Fig. 10. For the •6-4-2 2 4 6 (E c -E F )/kT = ^ f Fig. 10 Fermi-Dirac integral F 1/2 as a function of Fermi energy. (After Blackmore, Ref. 21.) 4 Carrier Concentration at Thermal Equilibrium 27 case of Boltzmann statistics, i.e., for the Fermi level several kT below E c in nondegenerate semiconductors, the integral approaches Jne~ ns \2 and Eq. (11) becomes „ = iV c exp(-^^. (13) Similarly, we can obtain the hole density near the top of the valence band : »r 2 r, {E V -E F \ P ~ N "T*4~^> (14) where N v is the effective density of states in the valence band and is given by J2nm dh kT\^ 2 Nv = 2 { h 2 ) (15) where m dh is the density-of-state effective mass of the valence band: 4 ™ dh = (m*V 2 + mt h 3/2 ) 213 (16) where the subscripts refer to "light" and "heavy" hole masses discussed before, Eq. (6). Again under nondegenerate conditions p^NyCxp^-^^y (17) For intrinsic semiconductors at finite temperatures there is continuous thermal agitation that results in excitation of electrons from the valence band to the conduction band and leaves an equal number of holes in the valence band, i.e., n=p = n t . This process is balanced by recombination of the electrons in the conduction band with holes in the valence band. The Fermi level for an intrinsic semiconductor (which by definition is nondegenerate) is obtained by equating Eqs. (13) and (17): E c + E v kT N v E c + E v 3kT (m dh \ Hence the Fermi level (£;) of an intrinsic semiconductor generally lies very close to the middle of the band gap. The intrinsic carrier concentration is obtained from Eqs. (13), (17), and (18): np = n . 2 = n c N v exp( - EJkT), ( 1 9) or «. = ^N c N v e- E ° l2kT = 4.9 x 10 15 /^^\ 3 \^ e -E g iikT (19a) 28 Physics and Properties of Semiconductors— A Resume where E g = (E c — E v ), and m is the free-electron mass. The temperature dependence 22 ' 23 of n t is shown in Fig. 11 for Ge, Si, and GaAs. As expected, the larger the band gap the smaller the intrinsic carrier concentration. (2) Donors and Acceptors When a semiconductor is doped with donor or acceptor impurities, impurity energy levels are introduced. A donor level is defined as being T <°K) 10" 10" 10 10" I to 15 co 10 Q £ io' 3 <r CO 10 10" 10' 10' 1400 800 600 500 400 300 273 r-4 -1 — — 1— V Ge \si ^aAs , _, 1 i 0.5 1.0 1.5 2.0 2.5 lOOO/TCK" 1 3.0 3.5 4.0 Fig. 11 Intrinsic carrier densities of Ge, Si, and GaAs as afunction of reciprocal temperature. (After Morin and Maita, Ref. 22; Hall and Racette, Ref. 23; and Neuberger, Ref. 18.) 4 Carrier Concentration at Thermal Equilibrium 29 neutral if filled by an electron, and positive if empty. An acceptor level is neutral if empty, and negative if filled by an electron. The simplest calculation of impurity energy levels is based on the hydrogen- atom model. The ionization energy for the hydrogen atom is where e is the free-space permittivity. The ionization energy for the donor E d , can be obtained by replacing m by the conductivity effective mass 4 of electrons ,/l 1 1 \ _1 m ce=3[ »+ - + and e by the permittivity of the semiconductor, e s , in Eq. (20) : *-ef(£K The ionization energy for donors as calculated from Eq. (21) is 0.006 eV for Ge, 0.025 eV for Si, and 0.007 eV for GaAs. The hydrogen-atom calculation for the ionization level for the acceptors is similar to that for the donors. We consider the unfilled valence band as a filled one plus an imagin- ary hole in the central force field of a negatively charged acceptor. The calculated acceptor ionization energy (measured from the valence band edge) is 0.015 eV for Ge, 0.05 eV for Si, and about 0.05 eV for GaAs. The above simple hydrogen-atom model certainly cannot account for the details of ionization energy, particularly the deep levels in semi- conductors. 24-26 However, the calculated values do predict the correct order of magnitude of the true ionization energies for shallow impurities. Figure 12 shows 27 ' 28 the measured ionization energies for various impurities in Ge, Si, and GaAs. We note that it is possible for a single atom to have many levels, e.g., gold in Ge has three acceptor levels and one donor level in the forbidden energy gap. 29 Of all the methods of introducing impurities into a host semiconductor, solid-state diffusion 30 is considered, at the present time, to be the most controllable. (The ion-implantation method 31 is still in its infancy.) The diffusion coefficient D(T) in a limited temperature range can be described by D(T) = D exp( - AE/kT) (22) where D is the diffusion cooefficient extrapolated to infinite temperature, and AE is the activation energy of diffusion. Values of D(T) for Ge, Si, and GaAs are plotted in Fig. 13 for various impurities. 32,33 The D(T) for GaAs is for the low-impurity concentration case; for larger concentrations D(T) Li sb [&0095QO096 — - GAP CENTER 0.07 0.04 ooi ooi aoi °JJ — 6~o 7~ B AC ML go in Be Ag Au 0.04 0.09 A A 0.20 0.29 A _A 0.15 <L!± OI3_ "A - 0.09 0.05 ° 05 0.31 0-30 0.35 _J_ 0.16 0.25 0.14 0.28 zn cd Mn 0.12 0.07 Ni Hg Pt cr Sb P AS Bi s Mn Ag pt Hg 0.039 00 44 0.049 0.069 GAP CENTER 0.55 53 - Q.52 - 0.37 Q.33 0.37- 0.35 D 0.40 D 0.045 " B AS. Ga in t£ co zn GAP CENTER SHALLOW LEVEL , 0.019 0_02l O023 0.52 0.51 0.37 0.24 0.143 0.15 0.023 0.023 0.63 D Mg cd Li zn Mn Co Ni si Fe cr Li Fig. 12 Measured ionization energies for various impurities in Ge, Si, and GaAs. The levels below the gap centers are measured from the top of the valence band and are acceptor levels unless indicated by D for donor level. The levels above the gap centers are measured from the bottom of the conduction band level and are donor levels unless indicated by A for acceptor level. The band gaps at 300°K are 0.66, 1.12, and 1.43 eV for Ge, Si, and GaAs respectively. (After Conwell, Ref. 27; and Sze and Irvin, Ref. 28.) 30 900 800 700 TEMPERATURE (°C) 600 1400 1200 H00 1000 1200 1100 1000 900 o I0" 10 10"" 1 1 1 1 ♦ h Ni.Cu A^ ^IHe ^Li 0\sb \Au p\\ vv\ B \ Zn \ \£«S 1 1 1 1 Li Fe ^""^n. Zn \Au \° V\ai \ \ InTi \^B \ B ^\uVV 1 \\ as\ * 1 > 1 1 1 1 Cui ^Li '"-^^Cu *>^A9 V^Au """* SMn( WITHOUT As) \Mn(WITH l\ «yS T 3»^\ ^ VSn As Ago \ Cd \V\ 1 \ \ 2"S 1 \ 0.8 0.9 1.0 I.I 1.2 0.6 0.7 Si 0.8 .65 0.7 0.8 GoAJ 0.9 1000/ T(°K) Fig. 13 Impurity diffusion coefficients as a function of temperature for Ge, Si, and GaAs. (After Burger and Donovan, Ref. 32; and Kendall, Ref. 33.) 31 32 Physics and Properties of Semiconductors — A Resume becomes increasingly concentration-dependent. In connection with the impurity diffusion coefficient there is the solid solubility of the impurity which is the maximum concentration of an impurity that can be accommo- dated in a solid at any given temperature. The solid solubilities 34 of some important impurities in Si are plotted in Fig. 14 as a function of temperature. This figure shows that arsenic or phosphorus should be used as the impurity in making highly doped n-type silicon while boron should be used for highly doped p-type silicon. (3) Calculation of Fermi Level The Fermi level for the intrinsic semiconductor is given by Eq. (18) and lies very close to the middle of the band gap. This situation is depicted in Fig. 15(a) where, from left to right, are shown schematically the simplified band diagram, the density of states N(E), the Fermi-Dirac distribution 500 600 700 800 900 1000 1100 1200 1300 1400 TEMPERATURE CO Fig. 14 Solid solubility of various elements in Si as a function of temperature. (After Trumbore, Ref. 34.) 4 Carrier Concentration at Thermal Equilibrium 33 function F(E), and the carrier concentrations. The shaded areas in the con- duction band and the valence band are the same indicating the n = p = n t for the intrinsic case. When impurity atoms are introduced as shown in Fig. 15(b) and (c), the Fermi level must adjust itself in order to preserve charge neutrality. Consider n = N c expj-(E c -E F )/kT~| (--ns) = N v expj-(E F -E v )/Kt1 ( = n.) (b) n TYPE 0.5 1.0 N(E) F(E) (c) p TYPE n AND p Fig. 15 Schematic band diagram, density of states, Fermi-Dirac distribution, and the carrier concentrations for (a) intrinsic, (b) n-type, and (c) p-type semiconductors at thermal equilibrium. Note that pn = n t 2 for all three cases. 34 Physics and Properties of Semiconductors — A Resume the case as shown in Fig. 15(b) where donor impurities with the concentra- tion JV D (crrT 3 ) are added to the crystal. To preserve electrical neutrality we must have the total negative charges (electrons and ionized acceptors) equal to the total positive charges (holes and ionized donors), or for the present case n = N D + +p (23) where n is the electron density in the conduction band, p is the hole density in the valence band, and N D + is the number of ionized donors given by 35 N D + = N D 1 1 - ., , 1 (Ed — E F 1 + - exp (24) g r \ kT where g is the ground state degeneracy of the donor impurity level which is equal to 2 because of the fact that a donor level can accept one electron with either spin or can have no electron. When acceptor impurities of con- centration N A are added to a semiconductor crystal, a similar expression can be written for the charge neutrality condition, and the expression for ionized acceptors is Nr = — (25) 1 -f- -exp 9 r \ kT where the ground state degeneracy factor g is 4 for acceptor levels. This is because in Ge, Si, and GaAs each acceptor impurity level can accept one hole of either spin and the impurity level is doubly degenerate as a result of the two degenerate valence bands at k = 0. Rewriting the neutrality condition of Eq. (23), we obtain kT (E v — E F K exp( 1 + 2 expl (26) For a set of given N c , N D , N v , E c , E D , E v , and T, the Fermi level E F can be uniquely determined from Eq. (26). An elegant graphical method 70 to determine E F is illustrated in Fig. 16. For this particular solution (with N D — 10 16 cm -3 , T = 300°K) the Fermi level is close to the conduction band edge and adjusts itself so that almost all the donors are ionized. For another temperature, one can first evaluate the values of JV C and N v which are pro- portional to r 3/2 , then obtain from Fig. 11 the value of n^T) which deter- mines the intercept of the lines n(E F ) and p(E F ); a new Fermi level is thus 4 Carrier Concentration at Thermal Equilibrium 35 Fig. 16 Graphical method to determine the Fermi energy level E, (After Shockley, Ref. 70.) obtained. As the temperature is lowered sufficiently, the Fermi level rises toward the donor level (for «-type semiconductors) and the donor level is partially filled with electrons. The approximate expression for the electron density is then 4 n x I ° 2N A )N C expi-EJkT) for a partially compensated semiconductor and for N A >±N c exp(-EJkT) (27) 36 Physics and Properties of Semiconductors— A Resume where E d = (E c — E D ), or 1 n*-j= WoNc) 1 ' 2 exp(-EJ2kT) (28) for N D > |iV c exp( — EJkT) P N A . A typical example is shown in Fig. 17 where n is plotted as a function of the reciprocal temperature. At high tem- peratures we have the intrinsic range since n « p P N D . At very low tem- peratures most impurities are frozen out and the slope is given by Eq. (27) or Eq. (28), depending on the compensation conditions. The electron density, however, remains essentially constant over a wide range of temperatures (~ 100°K to 500°K in Fig. 17). The Fermi level for silicon as a function of temperature and impurity concentration 36 is shown in Fig. 18. The dependence of the band gap on temperature (cf. Fig. 8) is also incorporated in this figure. When impurity atoms are added, the np product is still given by Eq. (19) which is called the mass-action law and the product is independent of the added impurities. At relatively elevated temperatures, most of the donors and acceptors are ionized, so the neutrality condition can be approximated by n + N A =p + N D . (29) 10 F 'e io 16 ID 10 •H io' 4 b- : | i N ° .J 5 "3 = 10 cm " INTRINSIC RANGE - 1 SLOPE = E g r 1 1 - 1 |l SATURATION RANGE : 1 ^ 1 FREEZE-OUT s^ RANGE r 1 i \ n,- -(p)) i - 1 1 , I 1 8 12 20 1000/T (° K" 1 ) Fig. 17 Electron density as a function of temperature for a Si sample with donor impurity concentration of 10 l5 cm -3 . (After Smith, Ref. 4.) 4 Carrier Concentration at Thermal Equilibrium 37 100 200 300 400 T (°K) 500 600 Fig. 18 Fermi level for Si as a function of temperature and impurity concentration. The dependence of the band gap on temperature is also incorporated in the figure. (After Grove, Ref. 36.) We can combine Eqs. (19) and (29) to give the concentration of electrons and holes in an «-type semiconductor: n no = K(N D - N A ) + J(N D - N A ) 2 + Anh *N D if \N D -N A \^fii and N D $>N A , (30) Pno = ni 2 /n no ~ n t 2 jN D , (31) and E C -E F = kT In (32) or from Eq. (18), Ep-E^kTln^. (33) 38 Physics and Properties of Semiconductors — A Resume The concentration of holes and electrons on a p-type semiconductor is given by and or P P o = KWa ~ *d) + J(N A -N D ) 2 + 4nft wN A if \N A -N D \>n t and N A >N D , (34) n po = n i 2 /p po ^n i 2 /N A , (35) E F -E v = kT\n^, (36) E t -E P = kT]n^. (37) In the above formulas the subscripts n and p refer to the type of semicon- ductors, and the subscripts "o" refer to the thermal equilibrium condition. For »-type semiconductors the electron is referred to as the majority carrier and the hole as the minority carrier, since the electron concentration is the larger of the two. The roles are reversed forp-type semiconductors. 5 CARRIER TRANSPORT PHENOMENA (1) Mobility At low electric field the drift velocity (v d ) is proportional to the electric field strength ($), and the proportionality constant is defined as the mobility (fi in cm 2 /volt-sec), or v d = nS. (38) For nonpolar semiconductors such as Ge and Si there are two scattering mechanisms which significantly affect the mobility, namely scattering due to acoustic phonons and to ionized impurities. The mobility due to acoustic phonon, fi t , is given by 37 where C x t is the average longitudinal elastic constant of the semiconductor, E ds the displacement of the edge of the band per unit dilation of the lattice, and m* the conductivity effect mass. From the above equation it is expected 5 Carrier Transport Phenomena 39 that the mobility will decrease with the temperature and with the effective mass. The mobility due to ionized impurities, /z f , is given by 38 ~{m*y ll2 N; l T Z12 (40) where N r is the ionized impurity density, and s s the permittivity. The mobility is expected to decrease with the effective mass but to increase with the tem- perature. The combined mobility which consists of the above two mechanisms is fi =(-+-) . (41) For polar semiconductors such as GaAs there is another important scattering mechanism: optical-phonon scattering. The combined mobility can be approximated by 39 ji~(/«*)- 3/2 r 1/2 . (42) In addition to the above scattering mechanisms there are other mechanisms which also contribute to the actual mobility: for example (1) the intravalley scattering in which an electron is scattered within an energy ellipsoidal (Fig. 7) and only long-wavelength phonons are involved; and (2) the inter- valley scattering in which an electron is scattered from the vicinity of one minimum to another minimum and an energetic phonon is involved. The measured mobilities of Ge, Si, and GaAs versus impurity concen- trations at room temperature are shown 2 8 > 25 > 40 in Fig. 19. We note that, in general, as the impurity concentration increases (at room temperature most impurities are ionized) the mobility decreases as predicted by Eq. (40). Also as m* increases, p decreases, thus for a given impurity concentration the electron mobilities for these semiconductors are larger than the hole mobilities (the effect masses are listed in Table 2.2). The temperature effect on mobility is shown 41 in Fig. 20 for w-type and p-type silicon samples. For lower impurity concentrations the mobility decreases with temperature as predicted by Eq. (39). The measured slopes, however, are different from (-3/2) owing to other scattering mechanisms. It is found that for pure materials near room temperature the mobility varies as T~ 166 and T~ 233 for n- and p-type Ge respectively; as T~ 25 and T~ 2J for n- and /Hype Si respectively; and as r 1 - and T~ 2A for n- and ^p-type GaAs respectively. 40 Physics and Properties of Semiconductors — A Resume Another important parameter associated with mobility is the carrier diffusion coefficient (Z>„ for electrons and D p for holes). In thermal equili- brium the relationship between D n and fi n (or D p and (i p ) is given by 4 o UJ to o > 10' I0< :::: t= 300°K=:- . MP Ge^( H-n >- ffi 1 io 2 i^4 . Mn 3 =s- rSi L-J. Mm i j:::^ /xp "^-;- 10* ( 3oAs-( Mn — zk~~~"~ : /xp : "*""*-■-. . 10 14 10 15 .16 10 17 10 18 IMPURITY CONCENTRATION (Cm ) 10 19 Fig. 19 Drift mobility of Ge and Si and Hall mobility of GaAs at 300°K vs. impurity con- centration. (After Sze and Irvin, Ref. 28; Prince, Ref. 40; and Wolfstirn, Ref. 35.) 5 Carrier Transport Phenomena 41 </> 4000 > 2000 — 1000 i 800 >-" 600 1- _l 400 ffi o ? 200 £. o at \- o 100 Si 14 -s=rN=iO '. _|6""" N= IC N = I0 I0 19 r-» — , N = -50 1000 800 600 400 200 100 80 60 40 20 10 50 50 100 (0) 150 200 ■ — y* I0 14 N=l0i r*--. Si N=I0 7 r- fir- I9 . N=l 50 100 150 TEMPERATURE CO (b) 200 Fig. 20 Electron and hole drift mobilities in Si as a function of temperature and impurity concentration. (After Gartner, Ref. 41.) where F 1/2 and F_ l/2 are Fermi-Dirac integrals. For nondegenerate semi- conductors, Eq. (43) reduces to and similarly "■-(tK f?> D p=\-rW (44a) (44b) 42 Physics and Properties of Semiconductors— A Resume The above two equations are known as the Einstein relationship. At room temperature kT/q = 0.0259 volts, and values of D's are readily obtainable from the mobility results shown in Fig. 19. The mobilities discussed above are the conductivity mobilities, which have been shown to be equal to the drift mobilities. 27 They are, however, different from the Hall mobilities to be considered in the next section. (2) Resistivity and Hall Effect The resistivity (p) is defined as the proportionality constant between the electric field and the current density (/) : & = pJ. Its reciprocal value is the conductivity, i.e., a = l/p, and J=aS. For semiconductors with both electrons and holes as carriers, we obtain 1 1 a q(fi„n + n p p) If n > p as in «-type semiconductors, 1 p~ or q\x n n <j~q\i n n. (45) (46) (47) (48) (48a) The most common method for measuring resistivity is the four-point probe method as shown 42 ' 43 in Fig. 21. A small current from a constant SEMICONDUCTOR SAMPLE Fig. 21 Schematic setup of four-point probe method to measure sample resistivity. (After Valdes, Ref. 42.) (UJO-WHO) A1IAUSIS3U iZ 43 44 Physics and Properties of Semiconductors — A Resume current source is passed through the outer two probes and the voltage is measured between the inner two probes. For a thin slice with its thickness W much smaller than its diameter, and the probe spacing S ^> W, the resistivity is given by _ I n \ V ~. 4 - 54 / F \ ~ \\n2} IW~ W \l) (49) The measured resistivity (at 300°K) as a function of the impurity con- centration 28 A4A5 is shown in Fig. 22 for Ge, Si, and GaAs. Thus we can obtain the impurity concentration of a semiconductor if its resistivity is known. The impurity concentration may be different from the carrier con- centration. For example, in a/J-type silicon with 10 17 cm -3 gallium acceptor impurities, unionized acceptors at room temperature make up about 23 % [from Eq. (25), Figs. 12 and 18]; in other words, the carrier concentration is only 7.7 x 10 16 cm -3 . To measure the carrier concentration directly, the most common method uses the Hall effect. 46 The basic setup 47 is shown in Fig. 23 where an electric field is applied along the x-axis and a magnetic field, along the z-axis. Consider a p-type sample. The Lorentz force (qv x x & x ) exerts an average downward force on the holes, and the downward-directed current will cause a piling up of holes at the bottom side of the sample, which in turn gives rise to an electric field S y . Since there is no net current along the y direction in the steady state, the electric field along the j>-axis (Hall field) should exactly balance the Lorentz force. Fig. 23 Basic setup to measure carrier concentration using the Hall effect. 5 Carrier Transport Phenomena 45 This Hall field can be measured externally and is given by £ y = {V y lW) = R H J x @ z (50) where R u is the Hall coefficient and is given by 4 1 P~b 2 n R " = r q(FTbny'> bs ^» (51) r = <t 2 >/<t> 2 . (52) The parameter x is the mean free time between carrier collisions, which depends on the carrier energy, e.g., for semiconductors with spherical constant-energy surfaces, x ~ E~ 1/2 for phonon scattering, x ~ E 312 for ionized impurity scattering, and, in general, x = aE~ s where a and s are constants. From Boltzmann's distribution for nondegenerate semiconductors the average value of the rath power of t is : <t m > = x m E 3/2 exp(-£//cT) dE E 3 ' 2 exp(-E/kT) dE (53) •'o / J o so that using the general form of x <r 2 > = a 2 (kT)- 2 T(i - 2s)/r(l) (54a) and <t> 2 = [a(/cT)-T(l - 5)/r(l)] 2 (54b) where T(«) is the gamma function defined as T(n)= x n ~ l e- x dx, {T{\) = Jn). We obtain from the above expression r = 3n/S = 1.18 for phonon scattering and 3157r/512 = 1.93 for ionized impurity scattering. The Hall mobility \i H is defined as the product of Hall coefficient and conductivity : Ii h =\Rho\. (55) The Hall mobility should be distinguished from the drift mobility ju„ (or jj, p ) as given in Eq. (48a) which does not contain the factor r. From Eq. (51), if n P p (56a) and if p > n \qnj R H = r(±±) . (56b) 46 Physics and Properties of Semiconductors — A Resume Thus the carrier concentration and carrier type (electron or hole) can be obtained directly from the Hall measurement provided that one type of carrier dominates. In the above consideration the applied magnetic field is assumed to be small enough that there is no change in the resistivity of the sample. However, under strong magnetic fields, significant increase of the resistivity is observed : the so-called magnetoresistance effect. For spherical-energy surfaces the ratio of the incremental resistivity to the bulk resistivity at zero magnetic field is given by 4 Po r 2 (i)r(i - 3 S ) fi n 3 n + n p 3 pi r 3 (f-s) T(i)T(i-2sy 2 H„n + n P P r 2 (f-s) J ln n n + n p p] p 2 n H P V (57) It is proportional to the square of the magnetic field component perpendicular to the direction of the current flow. For n > p, (Ap/p ) result can be obtained for the case p > n. /'« A similar (3) Recombination Processes Whenever the thermal-equilibrium condition of a physical system is distributed, i.e., pn ± n 2 , there are processes by means of which the system can be restored to equilibrium, i.e., pn = n t 2 . The basic recombination pro- cesses are shown in Fig. 24. Figure 24(a) illustrates the band-to-band recom- bination where an electron-hole pair recombines. This transition of the electron from the conduction band to the valence band is possible by the emission of a photon (radiative process) or by transfer of the energy to another free electron or hole (Auger process). The latter process is the inverse process to impact ionization, and the former is the inverse process to direct optical transitions, which are important for most III-V compounds with direct energy gaps. Figure 24(b) shows single-level recombination in which only one trapping energy level is present in the band gap, and Fig. 24(c) multiple-level recombi- nation in which more than one trapping level is present in the band gap. The single-level recombination consists of four steps: namely, electron capture, electron emission, hole capture, and hole emission. The recombina- tion rate, U (in unit of cm -3 sec -1 ), is given by 48 U = Vp<rnVth(pn - n 2 )N t (E t -E t \l T / E t -Ei\- n + "<• exp HH J + h p + ni exp r ~tt) _ (58) ENERGY TRANSFERRED TO FREE ELECTRON -m- OR HOLE (AUGER PROCESS) EMISSION OF * PHOTON (RADIATIVE) (Q) BAND - TO - BAND /4/ D // / /"7 / & / V / / / -*■ E, ' / / / (i) ELECTRON CAPTURE D y / / / (2) ELECTRON D / / / / /-? (3) HOLE (4) HOLE EMISSION I CAPTURE EMISSION (b) SINGLE LEVEL D / / / / / / A/ (c) MULTIPLE LEVEL ? 6 i a n I', 1 M Fig. 24 Recombination processes (a) band-to-band recombination (radiative or Auger process) (b) single-level recombination (c) multiple-level recombination. (After Sah, Noyce, and Shockley, Ref. 48.) 47 48 Physics and Properties of Semiconductors — A Resume where a p and a„ are the hole and electron capture cross section respectively, v th the carrier thermal velocity equal to ■ s /3kT/m*, N t the trap density, E t the trap energy level, E t the intrinsic Fermi level and n t the intrinsic carrier density. It is obvious that under a thermal equilibrium condition, pn = n t 2 , U = 0. Furthermore, under the simplified condition that a„ = a p — a, Eq. (58) reduces to U = av th N t — — . (59) n + p + 2n t cosh P^) The recombination rate approaches a maximum as the energy level of the recombination center approaches mid gap, i.e., E t « E t . Thus the most effec- tive recombination centers are those located near the middle of the band gap. Under low injection conditions, i.e., when the injected carriers (Am =Ap) are much fewer in number than the majority carriers, the recombination process may be characterized by the expression U = Pn ~ P»° ( 60 ) where p no is the equilibrium minority carrier concentration, p„ = Ap + p n0 , and x p is the minority carrier lifetime. In an H-type semiconductor, where n « n no =the equilibrium majority carrier concentration, and n > n { and p, Eq. (58) becomes U = a p v th N t (p n - p no ). (61) Comparison of Eqs. (60) and (61) yields the minority carrier lifetime (hole lifetime) in an H-type semiconductor, and 1 (62) P a p v th N t Similarly for a /?-type semiconductor, the electron lifetime 1 WthNt (63) For multiple-level traps it has been shown that the recombination processes have gross qualitative features that are similar to those of the single-level case. The details of behavior are, however, different, particularly in the high- injection-level condition (i.e., where An = Ap a5 majority carrier concen- tration) where the asymptotic lifetime is an average of the lifetimes associated with all the positively charged, negatively charged, and neutral trapping levels. 5 Carrier Transport Phenomena 49 The expressions, Eqs. (62) and (63), have been verified experimentally by the use of solid-state diffusion and high-energy radiation. It can be seen in Fig. 12 that many impurities have energy levels close to the middle of the band gap. These impurities may serve as efficient recombination centers. A typical example is gold in silicon. 29 It is found that the minority carrier lifetime decreases linearly with the gold concentration over the range of 10 14 to 10 17 cm -3 where t decreases from about 2 x 10~ 7 second to 2 x 10~ 10 second. This effect is important in some switching device applications when a short lifetime is a desirable feature. Another method of changing the minority carrier lifetime is by high-energy particle irradiation which causes displacement of host atoms and damage to lattices. These, in turn, introduce energy levels in the band gap. For example, 18 in silicon electron irradiation gives rise to an acceptor level at 0.4 eV above the valence band and a donor level at 0.36 eV below the conduction band; neutron irradiation creates an acceptor level at 0.56 eV; deuteron irradiation gives rise to an interstitial state with an energy level 0.25 eV above the valence band. Similar results are obtained for Ge, GaAs, and other semiconductors. Unlike the solid-state diffusion, the radiation-induced trapping centers may be annealed out at relatively low temperatures. The minority carrier lifetime has generally been measured using the photo- conduction effect 49 (PC) or the photoelectromagnetic effect 50 (PEM ). The basic equation for the PC effect is given by Jpc = q{Hn + H p )An£ (64) where J PC is the incremental current density as a result of illumination and S is the applied electric field along the sample. The quantity An is the incremental carrier density or the number of electron-hole pairs per volume created by the illumination which equals the product of the generation rate of electron-hole pairs resulting from photon (G) and the lifetime (t) or An = xG. The lifetime is thus given by An J pr G G£q(n n + u) (65) A measurement setup will be discussed in Section 7. For the PEM effect we measure the short-circuit current, which appears when a constant magnetic field @ z is applied perpendicular to the direction of incoming radiation. The current density is given by D J pem = q(M„ + H P )@ Z - (tG) (66) 50 Physics and Properties of Semiconductors — A Resume where L = J Dx is the diffusion length. The lifetime is given by T = r — *™ — i 2 „ (JpEM i@ z f. (67) MjDGq{[i n + fi p ). 6 PHONON SPECTRA AND OPTICAL, THERMAL, AND HIGH-FIELD PROPERTIES OF SEMICONDUCTORS In the previous section we have considered the effect of low to moderately high electric fields on the transport of carriers in semiconductors. In this section we shall briefly consider some other effects and properties of semi- conductors which are important to the operation of semiconductor devices. (1) Phonon Spectra It is well known that for a one-dimensional lattice with only nearest- neighbor coupling and two different masses, m t and m 2 placed alternately, the frequencies of oscillation are given by 3 1/2 I /I 1 \ , // A . L V a „■ 2, ^ V+ = ' , + = a f (— + — ) ± a f / ( — + — ) - 4 sin 2 ^)//^ m 2 (68) - |_ Wi m 2/ v \^i m if J where a f is the force constant, q the wave number, and a the lattice spacing. The frequency v_ tends to be proportional to q near q = 0. This is the acoustic branch, since it is the analogue of a long- wavelength vibration of the lattice, and since the frequency corresponds to that of sound in such a medium. The frequency v+ tends to 2a r (— + — . \m x m 2 1/2 as q approaches zero. This branch is separated considerably from the acoustic mode. This is the optical branch, since the frequency v+ is generally in the optical range. For the acoustic mode the two sublattices of the atoms with different masses move in the same direction, while for the optical mode, they move in opposite directions. For a three-dimensional lattice with one atom per unit cell such as a simple cubic, body-centered, or face-centered cubic lattice, there are only three acoustic modes. For a three-dimensional lattice with two atoms per unit cell such as Ge, Si, and GaAs, there are three acoustic modes and three optical modes. Those modes with the displacement vectors of each atom along the 6 Phonon Spectra and Properties of Semiconductors 51 direction of the wave vector are called the longitudinally polarized modes ; thus we have one longitudinal acoustic mode (LA) and one longitudinal optical mode (LO). Those modes with their atoms moving in the planes normal to the wave vector are called the transversely polarized modes. We have two transverse acoustic modes (TA) and two transverse optical modes (TO). The measured results 51 53 for Ge, Si, and GaAs are shown in Fig. 25. We note that at small #'s, with LA and TA modes, the energies are proportional to q. The Raman phonon energy is that of the longitudinal optical phonon at q = 0. Their values are 0.037 eV for Ge, 0.063 eV for Si, and 0.035 eV for GaAs. These results are listed in Table 2.3 along with other important properties of Ge, Si, and GaAs (in alphabetical order). (2) Optical Property Optical measurement constitutes the most important means of deter- mining the band structures of semiconductors. Photon-induced electronic Ge TO LO LA/ TA__ TO Si LO- LA/ TA [ioo] - [00,] - '■" REDUCED WAVE NUMBER, q/q MAX nO.05 Fig. 25 Measured phonon spectra in Ge, Si, and GaAs. TO for transverse optical modes, LO for longitudinal optical mode, TA for transverse acoustic modes, LA for longitudinal acoustic mode. (After Brockhouse and Iyengar, Ref. 51 ; Brockhouse, Ref. 52; and Waugh and Dolling, Ref. 53.) 52 Physics and Properties of Semiconductors — A Resume transitions can occur between different bands which lead to the determination of the energy band gap; or within a single band such as the free-carrier absorption. Optical measurement can also be used to study lattice vibrations. The transmission coefficient T and the reflection coefficient R are the two important quantities generally measured. For normal incidence they are given by (1 - R 2 )exp(-4nx/X) l-U 2 exp(-87tx/A) ' (69) (1 - nf + k 2 where X is the wavelength, n the refractive index, k the absorption constant, and x the thickness of the sample. The absorption coefficient per unit length a is defined as - 4nk nn « = —• (71) By analyzing the T — X or R — X data at normal incidence, or by making observations of R or T for different angles of incidence, both n and k can be obtained and related to transition energy between bands. Near the absorption edge the absorption coefficient can be expressed as 4 a ~ (Av - E g y (72) where hv is the photon energy, E g is the band gap, and y is a constant which equals 1/2 and 3/2 for allowed direct transition and forbidden direct transition respectively [with k min = k max as transitions (a) and (b) shown in Fig. 26] ; it equals 2 for indirect transition [transition (c) shown in Fig. 26] where phonons must be incorporated. In addition y equals 1/2 for allowed indirect transitions to exciton states where an exciton is a bound electron-hole pair with energy levels in the band gap and moving through the crystal lattice as a unit. Near the absorption edge where the values of (hv — E g ) become com- parable with the binding energy of an exciton, the Coulomb interaction be- tween the free hole and electron must be taken into account. For hv < E g the absorption merges continuously into that due to the higher excited states of the exciton. When hv > E g , higher energy bands will participate in the transi- tion processes, and complicated band structures will be reflected in the absorption coefficient. The experimental absorption coefficients near and above the fundamental absorption edge (band-to-band transition) for Ge, Si, and GaAs are plotted 54 " 56 in Fig. 27. The shift of the curves towards higher photon 6 Phonon Spectra and Properties of Semiconductors 53 CONDUCTION BAND Fig. 26 Optical transitions. (a) and (b) are direct transitions. (c) is indirect transition involving phonons. energies at lower temperature is obviously associated with the temperature dependence of the band gap as shown in Fig. 8. (3) Thermal Property When a temperature gradient is applied to a semiconductor in addition to an applied electric field, the total current density (in one dimension) is 4 3E F q dx ~8x) (73) where a is the conductivity, E F the Fermi energy, and & the differential thermoelectric power. For a nondegenerate semiconductor with a mean free time t ~ E ~ s as discussed previously, the thermoelectric power is given by ( k{ 4 2-5 + In| (v)]^-^- s - ln (y). PM, "Vn + PP, (74) where k is the Boltzmann constant, and A^ c and N v are the effective density of states in the conduction band and valence band respectively. This means that the thermoelectric power is negative for «-type semi- conductors, and positive for /?-type semiconductors. This fact is often used in 54 Physics and Properties of Semiconductors — A Resume determining the conduction type of a semiconductor. The thermoelectric power can also be used to determine the position of the Fermi level relative to the band edges. At room temperature the thermoelectric power ^ of/?-type silicon increases with resistivity: 1 mV/°K for a 0.1-fi-cm sample and 1.7 mV/°K for a 100-Q-cm sample. Similar results (except a change of the sign for 0>) can be obtained for n-type silicon samples. Another important quantity in thermal effect is the thermal conductivity, k, which, if t ~ E ~ s for both electrons and holes, is given by K = K L + (nn„ + pn? (75) 6 7 8 9 10 Fig. 27 Measured absorption coefficients near and above the fundamental absorption edge for pure Ge, Si, and GaAs. (After Dash and Newman, Ref. 54; Philipp and Taft, Ref. 55; and Hill, Ref. 56.) 6 Phonon Spectra and Properties of Semiconductors 55 1000 ~ 100 -" 1 s' / / y A \ \diamond VTYPE1I) / 1 / <"~f ^n\ \ / / "^ \ // Cu| Go As / / / * i I / 'Si \ v 1— 1 / I \\ \\ Si\ 1 1 1 «w 1 - V N 4Ge\ Ge/ GoAs^' \ 10 100 300 1000 T CK) Fig. 28 Measured thermal conductivity vs. temperature for pure Ge, Si, GaAs, Cu, and diamond type II. The thermal conductivity is lower than indicated here for samples with high impurity concentrations. (After Carruthers et al., Ref. 57; Holland, Ref. 58, 59; White, Ref. 60; and Berman et al Ref. 61.) The first, second, and third term on the right-hand side of the above equation represent the lattice contribution, the electronic contribution, and the contri- butions due to mixed conduction respectively. The contributions of conduc- tion carriers to the thermal conductivity are in general quite small. The third term, however, may be quite large when E g > kT. It is expected that the thermal conductivity will first increase with T at low temperatures and then decrease with temperature at higher temperatures. The measured thermal conductivity 57-59 as a function of lattice tempera- ture for Ge, Si, and GaAs is shown in Fig. 28. Their room temperature values 56 Physics and Properties of Semiconductors — A Resume are listed in Table 2.2. Also shown in Fig. 28 are the thermal conductivi- ties 60 ' 61 for Cu and for diamond type II. Copper is the most commonly used metal for thermal conduction in p-n junction devices; diamond type II has the highest room-temperature thermal conductivity known to date and is useful as the thermal sink for junction lasers and IMPATT oscillators to be discussed later. (4) High-Field Property As discussed in Section 5(1), at low electric fields, the drift velocity in a semiconductor is proportional to the electric field, and the proportionality constant is called the mobility which is independent of the electric field. When the fields are sufficiently large, however, nonlinearities in mobility and in some cases saturation of drift velocity are observed. At still larger fields, impact ionization will occur. We shall first consider the nonlinear mobility. At thermal equilibrium the carriers both emit and absorb phonons, and the net rate of exchange of energy is zero. The energy distribution at thermal equilibrium is Maxwellian. In the presence of an electric field the carriers acquire energy from the field and lose it to phonons by emitting more phonons than are absorbed. At reasonably high fields the most frequent scattering event is the emission of optical phonons. The carriers thus, on the average, acquire more energy than they have at thermal equilibrium. As the field increases, the average energy of the carriers also increases, and they acquire an effective temperature T e which is higher than the lattice tempera- ture T. From the rate equation such that the rate at which energy fed from the field to the carriers must be balanced by an equal rate of loss of energy to the lattice, we obtain for Ge and Si: 3 T 2 1 + 3tt kA : 8 \ C J l/2\ (76) and where ^ is the low-field mobility, $ the electric field, and C s the velocity of sound. When n $ <^ C s , we have the quadratic departure of mobility from con- stant value at low fields, and Eqs. (76) and (77) reduce to m 3tc/Mo*\ 2 1 32 (78) 6 Phonon Spectra and Properties of Semiconductors and —i>-mn 57 (79) When the field is increased until n g ~ SCJ3, the carrier temperature has doubled over the crystal temperature and the mobility has dropped by 30%. Finally at sufficiently high fields the drift velocities for Ge and Si approach a scattering-limited velocity: Uw = 8£ p 3ttWq 10 7 cm/sec (79a) where E p is the optical phonon energy (listed in Table 2.3). TABLE 2.3 PROPERTIES OF Ge, Si, AND GaAs (AT 300°K IN ALPHABETICAL ORDER) Properties Ge Si GaAs Atoms/cm 3 4.42 x 10 22 5.0 x 10 22 2.21 x 10 22 Atomic Weight 72.6 28.08 144.63 Breakdown Field (F/cm) ~10 5 ~3 x 10 5 ~4 x 10 5 Crystal Structure Diamond Diamond Zincblende Density (g/cm 3 ) 5.3267 2.328 5.32 Dielectric Constant 16 11.8 10.9 Effective Density of States in Conduction Band, AT c (cm- 3 ) 1.04 x 10 19 • 2.8 x 10 19 4.7 x 10 17 Effective Density of States in Valence Band, AVCcm" 3 ) 6.1 x 10 18 1.02 x 10 19 7.0 x 10 18 Effective Mass m*/m Electrons Holes w,* = 1.6 w t *= 0.082 w& = 0.04 mt h = 0.3 mf = 0.97 m t * = 0.19 mf fc =0.16 /?& = 0.5 0.068 0.12, 0.5 Electron Affinity, x(V) 4.0 4.05 4.07 Energy Gap (eV) at 300°K 0.66 1.12 1.43 58 Physics and Properties of Semiconductors — A Resume TABLE 2.3 (Cont.) Properties Ge Si GaAs Intrinsic Carrier Concentration (cm" 3 ) 2.4 x 10 13 1.6 x IO 10 1.1 x 10 7 Lattice Constant (A) 5.65748 5.43086 5.6534 Linear Coefficient of Thermal Expansion AL/LA7TC- 1 ) 5.8 x 10- 6 2.6 x 10" 6 5.9 x 10- 6 Melting Point (°C) 937 1420 1238 Minority Carrier Lifetime (sec) io- 3 2.5 x 10" 3 ~10~ 8 Mobility (Drift) (cm 2 / F-sec) jjl„ (electrons) /x p (holes) 3900 1900 1500 600 8500 400 Raman Phonon Energy (eV) 0.037 0.063 0.035 Specific Heat (Joule/g°C) 0.31 0.7 0.35 Thermal Conductivity at 300°K (watt/cm°C) 0.64 1.45 0.46 Thermal Diffusivity (cm 2 /sec) 0.36 0.9 0.44 Vapor Pressure (torr) 10" 3 at 1270°C 10- 8 at800°C 10- 3 at 1600°C 10- 8 at 930°C 1 at 1050°C 100atl220°C Work Function (V) 4.4 4.8 4.7 For GaAs the velocity-field, relationship is more complicated. We must consider the band structure of GaAs as shown in Fig. 5. There is a high- mobility valley (n « 4000 to 8000 cm 2 /V-sec) located at the Brillouin zone center, and a low-mobility satellite valley (/z « 100 cm 2 /V-sec) along the <100>-axes, about 0.36 eV higher in energy. The effective mass of the elec- trons is 0.068 m in the lower valley and about 1.2 m in the upper valley; thus the density of states of the upper valley is about 70 times that of the lower valley, from Eq. (12). As the field increases, the electrons in the lower 6 Phonon Spectra and Properties of Semiconductors 59 valley can be field-excited to the normally unoccupied upper valley, resulting in a differential negative resistance in GaAs. The intervalley transfer mechan- ism and the velocity-field relationship will be considered in more detail in Chapter 14. The experimentally deduced drift velocity is plotted 62 ' 63 in Fig. 29 for Ge, Si, and GaAs. We note that the drift velocities for the three semiconduc- tors all approach 10 7 cm/sec. For GaAs there is a region of differential negative mobility between 3 x 10 3 to 2 x 10 4 V/cm. We next consider impact ionization. When the electric field in a semi- conductor is increased above a certain value, the carriers gain enough energy that they can excite electron-hole pairs by impact ionization. The electron- hole pair generation rate (G) due to impact ionization is given by G = a n nii n + at pfi (80) ELECTRIC FIELD (V/cm) Fig. 29 Measured carrier velocity vs. electric field for high-purity Ge, Si, and GaAs. For highly-doped samples, the initial lines are lower than indicated here. In high-field region, however, the velocity is essentially independent of doping concentration. (After Seidal and Scharfetter, Ref. 62; Norris and Gibbons, Ref. 62a; Duh and Moll, Ref. 62b; and Ruch and Kino, Ref. 63.) 60 Physics and Properties of Semiconductors — A Resume 5 io' - {/ - Get°<pyy /3e(°<n) / Si («*„)/ / / V / 7 GaAs/ fVV/ j /si(« p ) / ~- f j GaP/ evvy ' i 1.5 2 3 4 5 6 ELECTRIC FIELD (x IO 5 V/cm) 8 9 10 Fig. 30 Measured ionization coefficient for avalanche multiplication vs. electric field for Ge, Si, GaAs. and GaP. (After Miller, Ref. 64; Lee et al., Ref. 65; Logan and Sze, Ref. 66; and Logan and White, Ref. 67.) where cc„ is the electron ionization rate defined as the number of electron-hole pairs generated by an electron per unit distance traveled. Similarly a p is the analogously defined ionization rate for holes. Both a„ and a p are strongly dependent on the electric field. Figure 30 shows the experimental results of the ionization rates 64-67 for Ge, Si, GaAs, and GaP. These results are all obtained by the use of photomultiplication measurements on p-n junctions. It 6 Phonon Spectra and Properties of Semiconductors 61 is clear from the figure that over a limited field range one can approximate or "'MfJ (81) where a and <? are constants, and n, in general, varies from 3 to 9. A better fit to the ionization rates over a wider range of field can be given by the following expression a = ^exp[-(Z)/(f) m ]. (82) The values of A, b, and m are given in Table 2.4. It has been shown that the dependence of the ionization rate on the electric field and on the lattice temperature can be expressed in terms of a modifica- tion of Baraff's three-parameter theory. 68,69 The parameters are: £ /? the ionization threshold energy; A, the optical phonon mean free path; and (Ep), the average energy loss per phonon scattering. The values of E t for best fit are approximately three-halves the band-gap energy, and A and (E > are given by y X = A tanh(A.) (83) <£„> = £ p tanh^) (84) and ± = <Ep> ^o E p (85) where E p is the optical phonon energy (listed in Table 2.4), and A is the high-energy low-temperature asymptotic value of the phonon mean free path. Baraff's result is shown in Fig. 31 where od is plotted against EjjqSA, with the ratio of average optical-phonon energy to ionization threshold energy, <.Ep}/Ej , as a parameter. Since for a given set of ionization measurements the values of Ej( = $E g ), ct, and its field dependence are fixed, one can thus obtain the optical-phonon mean free path, A, by fitting the ionization data to the Baraff plot. A typical result is shown in Fig. 31 for Ge at 300°K. The value of ( E p>IEi is 0.022. We obtain 64 A for the room-temperature electron-phonon mean free path, and 69 A for the hole-phonon mean free path. Similar results have been obtained for Si, GaAs, and GaP. From the room temperature data one can obtain the value of A from Eq. (84). The average value of A and A (at 300°K) are listed in Table 2.4. Once we know the value A we can predict * in in © O Oh o O in o © -H X X fS m ^r o oo Tf « <o o o V) m m O >n V) ~H 1 ' < -H -H X X (S O o" in 00 in en © f- VD O o <1> IT) in *— < "o -H -W X X DC m in in VO ■<* in ro ^O CW c o o >c V0 O o >n in o -H -H x X 4) • es VO in w V£> r- oo f- CO « « o O 1) X "o X a r- O o q 00 O -H -H -H d in in o r~ \o c O © o ■~ X X o u in v£> w in in i ? E o S S-i O ^ ^ -5" o < 3 a o o > 5 © o ■2 o <-< ^^ 's ro c ^ E C/3 ^< •2 b 1 o o 5 1— 1 ctf II 8 «© 62 6 Phonon Spectra and Properties of Semiconductors 63 2x10"'. Fig. 31 Baraff's plot— product of ionization rate and optical phonon mean free path (aA) vs. Ej/qtfA where E, = f Eg and g is the electric field. The running parameter is the ratio <Ep>\£.i where <£ p > is the average optical phonon energy. The solid curves are theoretical results. (After Baraff, Ref. 68.) The experimental data are obtained from Ge p-n junctions with A = 64A for electrons and A = 69A for holes. (After Logan and Sze, Ref. 66.) the values of A at various temperatures ; and from the temperature dependence of <£„}, Eq. (84), we can choose the correct Baraff plot. The theoretical predicted electron ionization rates in silicon as obtained from the above approach are shown in Fig. 32. Also shown are the experimental results at 64 Physics and Properties of Semiconductors — A Resume I0 : S^ ^o** - ^ ^ - \\ X - \ \ \ ^ v - \\\ f\ - \\a \\ - \ s t=ioo , k \\ V'\ - Si EXPERIMENTAL O - 100 °K n - 2I3°K A - 300°K THEORETICAL I00°K 2I3"K 400°K \ \ \ N \ \300°\ \ \ \ \ \ \ \ \ \ \ 400°^ \ | | 5xl0 6 \/e (v/cm)" Fig. 32 Electron ionization rate vs. reciprocal electric field for Si. (After Crowell and Sze, Ref. 69.) three different temperatures. The agreement is satisfactory. To facilitate numerical analysis, the curves as shown in Fig. 31 can be represented by the following approximation: 69 [(11. 5r 2 - 1.17r + 3.9 x 10~ 4 )x 2 1 od = exp + (46r 2 - 11. 9r + 1.75 x 10" 2 )x { + (-757r 2 + 75.5r- 1.92) J (86) 7 Basic Equations for Semiconductor Device Operation 45 where r = <E P >/Ej , and x = E^qSk. The errors are within +2% over the range 0.01 < r < 0.06 and 5 < x < 16. 7 BASIC EQUATIONS FOR SEMICONDUCTOR DEVICE OPERATION (1) Basic Equations 70 The basic equations for semiconductor device operation are those which describe the static and dynamic behaviors of carriers in semiconductors under the influence of external fields which cause deviation from the thermal- equilibrium conditions. The basic equations can be classified in three groups: the Maxwell equations, the current density equations, and the continuity equations. A. Maxwell Equations for Homogeneous and Isotropic Material m Vx<f=_^-. (87) "a7" + Jcond = Jtot ' ( 88 > V • S> = p(x, y, z), (89) V ' ^ = 0, (90) ® = HoJ?, (91) ^0> = f e,(* - t')S(r, O dt' (92) — ao where Eq. (92) reduces to 3) = z s g under static or very low frequency condi- tions, £ and Q) are the electric field and displacement vector respectively, jT and M are the magnetic field and induction vector respectively, e s and ^ujare the permittivity and permeability respectively, p(x, y, z) the total electric charge density, J cond the conduction current density, and J tot the total current density (including both conduction and convection current components and v - Jtot = 0)- Among the above six equations the most important is the Poisson equation, Eq. (89), which determines the properties of the p-n junc- tion depletion layer (to be discussed in the next chapter). 66 Physics and Properties of Semiconductors — A Resume B. Current Density Equations 3 H =qix H n£+qD n Vn, (93) 3 p = qH p p£-qD p Vp, (94) Jcon d = J„ + J P - (95) Where J„ and J p are the electron current density and the hole current density respectively, they consist of the drift component due to field and the diffusion component due to carrier concentration gradient. The values of the electron and hole mobilities (//„ and pc p ) have been given in Section 5(1). For non- degenerate semiconductors the carrier diffusion constants (D„ and D p ) and the mobilities are given by the Einstein relationship (D n = (kT/q)n„, etc.). For a one-dimensional case, Eqs. (93) and (94) reduce to dn I „ kT dn\ , n _ . J, = ,«. nS + lD n - = Wn {nS + — -), (93a) dp ( „ kT dp\ : nA . J, _,„,,,-, B, J! -,„,(,* -_-). (94a) The above equations do not include the effect due to externally applied magnetic field. With an applied magnetic field, another current of J„ ± tan 0„ and J pl tan 6 P should be added to Eqs. (93) and (94) respectively, where J„ x is the current component of J„ perpendicular to the magnetic field and tan 9 n =qn„nR H \Jf\ (which has negative value because the Hall coefficient R H is negative for electrons) ; similar results are obtained for the hole current. C. Continuity Equations ^ = G„-£/„ + -V.J„ (96) at q S J. t = Gp -U,-U. 3p (97) where G„ and G p are the electron and hole generation rate respectively (cm -3 sec -1 ) due to external influence such as the optical excitation with high energy photons or impact ionization under large electric fields. U n is the electron recombination rate in /?-type semiconductors. Under low injection conditions (i.e., when the injected carrier density is much less than the equili- brium majority carrier density) U„ can be approximated by the expressions (n p — n po )fr„ where n p is the minority carrier density, n po the thermal- equilibrium minority carrier density, and t„ the electron (minority) lifetime. There is a similar expression for the hole recombination rate with lifetime x p . 7 Basic Equations for Semiconductor Device Operation 67 If the electrons and holes are generated and recombined in pairs with no trapping or other effects, x n = x p . For the one-dimensional case under a low-injection condition, Eqs. (96) and (97) reduce to dn P r n p - n po di dn p n d 2 n p d Pn r Pn ~ Pno dS „ 8 Pn ^ d 2 Pn (2) Simple Examples A. Decay of Photoexcited Carriers. Consider an «-type sample, as shown in Fig. 33(a), which is illuminated with light and where the electron- hole pairs are generated uniformly throughout the sample with a generation rate G. The boundary conditions are S = 0, and dpjdx = 0. We have from Eq. (97a): ?£? r, Pn~ P dt = g - — — — . ( 98 ) At steady state, dpjdt = 0, and Pn =Pno + ? P G = constant. (99) If at an arbitrary time, say t = 0, the light is suddenly turned off, the boundary conditions are p H {0) = Pno + Xp G as given in Eq. (99) and p n (t -► oo) = p no . The differential equation is now d Pn Pn-Pno /f _ x jt= — vr~ ( io °) and the solution is Pnit) = Pno + ^ P Ge- tlx ". (101) The variation of p n with time is shown in Fig. 33(b). The above example presents the main idea of the Stevenson-Keyes method for measuring minority carrier lifetime. 49 A schematic setup is shown in Fig. 33(c). The excess carriers generated uniformly throughout the sample by the light pulses cause a momentary increase in the conductivity. The in- crease manifests itself by a drop in voltage across the sample when a constant current is passed through it. The decay of this photoconductivity can be observed on an oscilloscope and is a measure of the lifetime. (The pulse width must be much less than the lifetime.) 68 Physics and Properties of Semiconductors — A Resume hv (b) LIGHT PULSE il-UU I I > i \ 1 > '> © " K rh (c) Fig. 33 Decay of photoexcited carriers (a) n-type sample under constant illumination (b) decay of minority carriers (holes) with time (c) Stevenson-Keyes experiment. (After Stevenson and Keyes, Ref. 49.) B. Steady-State Injection From One Side. Figure 34(a) shows an- other simple example where excess carriers are injected from one side (e.g., by high-energy photons which create electron-hole pairs at the surface only). Referring to Fig. 27, we note that for hv = 3.5 eV the absorption coefficient is about 10 6 cm -1 , in other words, the light intensity decreases by l/e in a distance of 100 A. 7 Basic Equations for Semiconductor Device Operation 69 INJECTING' SURFACE \U/r ALL EXCESS CARRIERS EXTRACTED (b) Fig. 34 Steady-state carrier injection from one side. (a) semi-infinite sample (b) sample with length W At steady state there is a concentration gradient near the surface. The differential equation is, from Eq. (97a), d 2* = = - Pn ~ Pno + D 82p " dt dx' (102) The boundary conditions are p n (x = 0) = p n (0) = constant value, and p n (x -> co) = p no . The solution of p n (x) which is shown in Fig. 34(a), is Pn(x) = p no + L Pn (0) - Pno -]e- xlL " (103) where L p = ^[Dpt~ p , the diffusion length. The maximum values of L and 70 Physics and Properties of Semiconductors — A Resume L n ( = ^/D n x n ) are of the order of 1 cm in germanium and silicon, but only of the order of 10 ~ 2 cm in gallium arsenide. If the second boundary condition is changed so that all excess carriers at x = W are extracted or p n (W) =p no , then we obtain from Eq. (102) a new solution, Pnfr) = Pno + [P«(0) - Pno] sinh W -x sinh E (104) The above result is shown in Fig. 34(b). The current density at x = W is given by Eq. (94a) : J P = -4 D p n D p 1 «D>»(0) - PnoJ £ p sinh © (105) It will be shown later that the above equation is related to the current-gain in junction transistors (Chapter 6). C. Transient and Steady-State Diffusion. When localized light pulses generate excess carriers in a semiconductor, Fig. 35(a), the transport equation after the pulse is given by Eq. (97a). OPn dt Pn „ dPn , n d 2 p n (106) If there is no field applied along the sample, 8 = 0, the solution is given by P„(x, = N y/4nD p t exp 4D p t t p + Pn (107) where N is the number of electrons or holes generated per unit area. The solution is shown in Fig. 35(b), from which it can be seen that the carriers diffused away from the point of injection, and that they also recombined. If an electric field is applied along the sample, the solution is in the form of Eq. (107) but with x replaced by (x - n p £t) as shown in Fig. 35(c). This means that the whole " package " of excess carrier moves toward the negative end of the sample with the drift velocity \i p $. At the same time, the carriers diffuse outward and recombine as in the field-free case. The above example is essentially the celebrated Haynes-Shockley experi- ment 71 for the measurement of carrier drift mobility in semiconductors. With known sample length, applied field, and the time delay between the applied 7 Basic Equations for Semiconductor Device Operation 71 PULSE GENERATOR (5. hi/ n-TYPE (a) (c) Fig. 35 Transient and steady-state diffusion (a) Haynes-Shockley experiments (After Haynes and Shockley, Ref. 71.) (b) Without applied field (c) With applied field '-^ electric pulse and the detected pulse (both displayed on the oscilloscope), one can calculate the drift mobility (/i = xjSt). D. Surface Recombination. 36 When one introduces surface recom- bination at one end of a semiconductor sample (Fig. 36), the boundary condition at x = is given by ox = QSJp„(0) - p no ] (108) 72 Physics and Properties of Semiconductors — A Resume SURFACE RECOMBINATION P M p (0) n P„„ kv \\<\\\\)\„ I i i \ i i i i i ( -n-TYPE Fig. 36 Surface recombination at x = 0. The minority carrier distribution near the surface is affected by the surface recombination velocity. which states that the minority carriers which reach the surface recombine there; the constant S p which has the dimension cm/sec is defined as the surface recombination velocity. The boundary condition at x = oo is the same as that for example A. The differential equation is dt Pn~ Pn d 2 Pn ' p dx 2 (109) The solution of the equation subject to the above boundary conditions is Pn(x) = P„ + i P G _ T p S p exp(-x/L p ) -kp ~^~ T p p (110) which is plotted in Fig. 36 for a finite S p . When S p -» 0, p„(x) -> p n0 + x p G, the same as obtained previously (example A); when S p ^> co, p n (x)-^p no + x p G[l -exp(-x/L p )], and the minority carrier density at the surface approaches its thermal equilibrium value p no . Analogous to the low-injection bulk recombination process, in which the reciprocal of the minority carrier lifetime (1/r) is equal to a p v th N t , the surface recombination velocity is given by S p = o p v th N st (111) where N st is the number of surface trapping centers per unit area at the boundary region. References 73 REFERENCES 1. W. C. Dunlap, An Introduction to Semiconductors, John Wiley & Sons New York (1957). 2. O. Madelung, Physics oflll-V Compounds, John Wiley & Sons (1964). 3. J. L. Moll, Physics of Semiconductors, McGraw-Hill Book Co. (1964). 4. R. A. Smith, Semiconductors, Cambridge at the University Press (1959). 5. See for example, C. Kittel, Introduction to Solid State Physics, John Wiley & Sons New York, 2nd ed. (1956), 3rd ed. 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PART II p-n JUNCTION DEVICES p-n Junction Diodes Tunnel Diode and Backward Diode Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) Junction Transistors p-n-p-n and Junction Field-Effect Devices ■ INTRODUCTION ■ BASIC DEVICE TECHNOLOGY ■ DEPLETION REGION AND DEPLETION CAPACITANCE ■ CURRENT-VOLTAGE CHARACTERISTICS ■ JUNCTION BREAKDOWN ■ TRANSIENT BEHAVIOR AND NOISE ■ TERMINAL FUNCTIONS ■ HETEROJUNCTION 3 p-n Junction Diodes I INTRODUCTION The p-n junctions are of supreme importance both in the modern electronic applications and in the understanding of other semiconductor devices. The p-n junction theory serves as the foundation of the physics of semiconductor devices. The basic theory of current-voltage characteristics of p-n junction was established by Shockley. 1 This theory was then extended by Sah et al. 2 and by Moll. 3 In this chapter we shall first briefly discuss the basic device technology which is pertinent not only to p-n junctions but also to most semiconductor devices. Then the basic equations presented in Chapter 2 will be used to develop the ideal static and dynamic characteristics of p-n junctions. Departures from the ideal characteristics due to generation and recombination in the depletion layer, to high-injection, and to series resistance effects are then discussed. Junction breakdown (especially that due to avalanche multiplication) is considered in detail after which transient behaviors and noise performance in p-n junctions are presented. A p-n junction is a two-terminal device. Depending on doping profile, device geometry, and biasing condition, a p-n junction can perform various terminal functions which are briefly considered in Section 7. The chapter closes with attention to an interesting group of devices, the heterojunctions, which are junctions formed between dissimilar semiconductors, e.g., >7-type Ge on p-type GaAs or n-typc Ge on n-type GaAs. 77 78 p-n Junction Diodes 2 BASIC DEVICE TECHNOLOGY 4 Some of the important junction fabrication methods are shown in Fig. 1. In the alloy method, 5 Fig. 1(a), a small pellet of aluminum is placed on an «-type < 1 1 1 > oriented silicon wafer. The system is then heated to a temperature slightly higher than the eutectic temperature (~580°C for the Al-Si system) so that a small puddle of molten Al-Si mixture is formed. The temperature is then lowered and the puddle begins to solidify. A recrystallized portion, which is saturated with the acceptor impurities and with the same crystal orientation, forms the heavily doped />-type region (p + ) on the «-type sub- strate. The aluminum button on top can be used as an ohmic contact for the p-type region. For the ohmic contact on the «-type wafer, a Au-Sb alloy (with ~0.1 % Sb) can be evaporated onto the wafer and alloyed at about 400°C p-TYPE IMPURITIES H OHMIC CONTAC (a) ALLOYED JUNCTION /-P 2ZZZZ P Szzza OHMIC CONTACT (b) DIFFUSED MESA JUNCTION p-TYPE IMPURITIES T OHMIC CONTACT (c) DIFFUSED PLANAR JUNCTION T P - TYPE METAL OVERLAY IMPURITIES (0HMIC T0 P-TYPE)- io 2 - ^'- ^WillliMi sio OHMIC CONTAC (d) DIFFUSED PLANAR JUNCTION ON EPITAXIAL SUBSTRATE Fig. 1 Some important junction fabrication methods. 2 Basic Device Technology 79 to form a heavily doped n-type region (n + ). One can interchange the roles of the aluminum and the Au-Sb alloy on a ^-type wafer in order to form the n + junction on top and a/? + ohmic contact on the bottom of the wafer. The junction location obtained by the alloy method depends critically on the temperature-time alloying cycle and is difficult to control precisely. The solid-state diffusion method 6 was later developed to give precise control of the impurity profile. A diffused mesa junction method, where />-type impurities (e.g., boron in the form of BBr 3 ) are diffused into the w-type substrate, is shown in Fig. 1(b). After the diffusion, portions of the surface are protected (e.g., by wax or metal contacts) and the rest are etched out to form the mesa structures. A new degree of control over the geometry of the diffused junction is achieved by the use of an insulating layer that can prevent most donor and acceptor impurities from diffusing through it. 7 A typical example is shown in Fig. 1(c). A thin layer of silicon dioxide (~ 1 urn) is thermally grown on silicon. With the help of photoresist techniques (e.g., the KPR process- Kodak photoresist process) portions of the oxide can be removed and windows (or patterns) cut in the oxide. The impurities will diffuse only through the exposed silicon surface, and p-n junctions will form in the oxide windows. This is the celebrated planar process 8 • 54 which since 1960 has become the principal method of fabricating semiconductor devices and integrated circuits. To reduce series resistance, an epitaxial substrate 9 is generally used in the planar process, Fig. 1(d). Epitaxy, derived from the Greek word EPI— mean- ing on, and TAXIS — meaning arrangement, describes a technique of crystal growth by chemical reaction used to form, on the surface of a crystal, thin layers of semiconductor materials with lattice structures identical to those of the crystal. In this method lightly doped high-resistivity epitaxial layers are grown on and supported by a heavily doped low-resistivity substrate thus ensuring both the desired electrical properties and mechanical strength. A typical impurity distribution of an epitaxial wafer is shown in Fig. 2. The doping of the original n + substrate is about 10 19 cm -3 . The gradual transition from the n + substrate to the epitaxial n layer (~ 10 15 cm -3 ) is mainly due to the out-diffusion from the n + substrate during growth. We shall now briefly discuss the two main processes of planar technology, namely the formation of the insulating layer and the diffusion of impurities. The most important insulator for silicon is the silicon dioxide which can be formed by.a vapor-phase reaction, 10 by anodization, 11 or by a plasma reac- tion. 12 The most frequently used method is, however, by the thermal oxida- tion 13 of silicon through the chemical reaction: Si(solid) + 2 (dry oxygen) -* Si0 2 (solid) or Si(solid) + 2H 2 0(steam) -+ Si0 2 (solid) + 2H 2 . It can be shown that for short reaction times the oxide thickness increases linearly with time, and for prolonged oxidation the thickness varies as the square root of 80 p-n Junction Diodes iu- w - \d» - : 10" - 1 E o |qI7 o z 10* I0'5 - ero ° IO 14 I i I i 1 I 1 2 3 4 5 6 THICKNESS (yum) Fig. 2 Typical impurity distribution in an epitaxial layer. The substrate doping is about 2 x 10 19 cm -3 , and the expitaxial layer doping is about 6.5 X 10 14 cm -3 . the time — the so-called parabolic relationship. 14 When a silicon dioxide film of thickness W is formed, a layer of silicon of thickness 0.45 W is consumed. Figure 3 shows the experimental results of the oxide thickness as a function of the reaction time and temperature for both the dry oxygen growth and the steam growth. Unlike silicon oxide, the germanium oxides formed on germanium are water-soluble. For most germanium as well as gallium arsenide planar devices, one uses silicon oxide deposited by thermal decomposition of ethyl orthosilicate (EOS) in a nitrogen ambient. 15 The simple one-dimensional diffusion process can be given by the Fick equation 16 dC(x, t) _ d 2 C(x, t) dt dx* (1) OXIDATION TIME (SEC) la) = = ::::: Oaiuaiiun ur siLiuur IN STEAM i :,;:!: .- = :*:! SLOPE =1/2.,- ^' -::' io 4 -( = IMm) F : V^Unt Ej? < ^ = : = :::: ■•'S^ CO .'• > UJ z 1,0' 12 !00°( /* O0°C s ■*■ UJ S* Q ,•-' O /SLOP E=l in 2 1100 •C,' 10 00 °c, ::: ; 5= w — y— / > 10 tl ihr- 10 I0 : OXIDATION TIME (SEC) (b) Fig. 3 Experimental results of the oxide thickness as a function of the reaction time and temperature for (a) dry oxygen growth (b) steam growth. (After Deal and Grove, Ref. 14.) 81 82 p-n Junction Diodes where C is the impurity concentration and D the diffusion coefficient. This expression is similar to that given in Eq. (96a) of Chapter 2, without genera- tion, recombination, or electric field. The values of D are shown in Fig. 13 of Chapter 2. For a " limited source " condition, with the total amount of impurities S, the solution of Eq. (1) is given by the Gaussian function C(x,0 = ^=exp(-^-V (2 ) For the " constant surface concentration " condition with a surface concentra- tion C s , the solution of Eq. (1) is given by the error function compliment C(x,0 = C s erfc(-^=). (3) \ZjDtt The normalized concentration versus normalized distance to the above two solutions is shown in Fig. 4. The diffusion profiles of many impurities can indeed be approximated by the above expressions. There are, however, many that have more complicated profiles, e.g., Zn in GaAs with a diffusion process depending strongly on the impurity concentration. 17 In practice, most of the diffusion profiles can be approximated by the following two limiting cases: the abrupt junction and the linearly graded junction as shown in Fig. 5(a) and 5(b) respectively. The abrupt approxima- tion provides an adequate description for alloyed junctions and for shallowly diffused junctions. The linearly graded approximation is reasonable for deeply diffused junctions. In the following sections we shall study the static and dynamic characteristics of the above two limiting cases. There is another important effect resulting from the planar processes. When a p-n junction is formed by diffusion into a bulk semiconductor through a window in an insulating layer, the impurities will diffuse downward and also sideway. Hence the junction consists of a plane (or flat) region with approximately cylindrical edges, as shown in Fig. 6(a). In addition, if the diffusion mask contains sharp corners, the junction near the corner will be roughly spherical in shape, Fig. 6(b). These spherical and cylindrical regions have profound effects on the junction especially for the avalanche multi- plication process 18 which will be discussed in Section 5. At microwave frequencies, the junction size must be kept small. In the limit 19 the junction formed by diffusion through a narrow-stripe window approaches a semi- cylindrical junction if the width of the stripe approximates the junction depth, Fig. 6(c); and the junction formed by diffusion through a small circular window approaches a hemispherical junction if the radius of the window is equal to or smaller than the junction depth, Fig. 6(d). 2 Basic Device Technology 83 -\ N.6AUSSIAN - * V \1 - - E^\ in 1 E \ga 1 JSSIAN id* = \ 5? id" 3 E fc\ o Id 4 z Id 5 10* ( 2 3 X/Z-/Q1 Fig. 4 Normalized concentration versus normalized distance for Gaussian and error func- tion compliment (erfc) distributions which are plotted in both linear and semilog scales. (After Carslaw and Jaeger, Ref. 16.) 84 p-n Junction Diodes C(X) Cs (a) ABRUPT APPROXIMATION N A -N D N A -N r (b) LINEARLY GRADED APPROXIMATION Fig. 5 Approximate doping profiles (a) abrupt junction (b) linearly graded junction. 3 DEPLETION REGION AND DEPLETION CAPACITANCE (1) Abrupt Junction A. Diffusion Potential and Depletion-Layer Width. When the im- purity concentration in a semiconductor changes abruptly from acceptor impurities (N A ) to donor impurities (A^), as shown in Fig. 7(a), one obtains an abrupt junction. In particular, if N A > N D , one obtains a onesided abrupt junction or p + n junction. 3 Depletion Region and Depletion Capacitance 85 (a) CYLINDRICAL REGION (C) PLANE REGION SPHERICAL REGION (S) (c) w: Fig. 6 (a) Planar diffusion process which forms junction curvature near the edges of the diffusion mask, fj is the radius of curvature. (b) The formation of approximately cylindrical and spherical regions by diffusion through rectangular mask. (c) Diffusion through a narrow-stripe window. (d) Diffusion through a small circular window. (After Lee and Sze, Ref. 19.) 86 p-n Junction Diodes We first consider the thermal equilibrium condition, i.e., one with no applied voltage and no current flow. From Eqs. (33) and (93a) in Chapter 2 r„ = = qfi„h kT dn\ _ dE F q dx) " dx (4) .N D -N A p n © ® ® © j © © © © 1 © © © © ] |eee ,000 leee |eee AREA -DIFFUSION POTENTIAL (a) (b) (c) M^— (d) Fig. 7 Abrupt p-n junction in thermal equilibrium (a) impurity distribution (b) field distribution (c) potential variation with distance (d) energy band diagram, where V bl is the built-in potential. 3 Depletion Region and Depletion Capicitance 87 or dE F „ -S-0. (4a) Similarly, Thus the condition of zero net electron and hole currents requires that the Fermi level must be constant throughout the sample. The diffusion potential, or built-in potential V bi , as shown in Fig. 7(c) is equal to qV bi = E g -(qV n + qV p ) „n„p=J=). 4 r,„p±£). <« Since at equilibrium n noPno = n poPpo = n t 2 , n , = *r In (M ^ ln (M (7) <l \PnJ q \n po ) Equation (7) gives the relationship between the hole and electron densities on either side of the junction : Pno = P P o^-j^j (8a) n po = n no exp(-^. (8b) The approximate values of V bi for one-sided abrupt p-n junctions in Ge, Si, and GaAs are shown in Fig. 8. Since in equilibrium the electric field in the neutral regions (far from the junction at either side) of the semiconductor must be zero, the total negative charge per unit area in the/? side must be precisely equal to the total positive charge per unit area in the n side: N D x n = N A x p . (9) From Poisson's equation we obtain (for abrupt approximation): 88 p-n Junction Diodes 1.4 O 0.8 0.4 0.2 GaA s(p +r ) 1 )) _| ~~ ~v~ [III. 4 1 .._. GaAs(n + [ 1 _ J. 1 ! S'i (n'+p) : " Si(p + n) 1 :::== H* """ Ge( j + n ) "■V dVhi r- 1 E F _ p + n _t V 10' 10' 10'° N B (cm" 3 ) 10' 10" Fig. 8 Built-in potential for one-sided abrupt junctions in Ge, Si, and GaAs where p + is for heavily doped p side and n + is for heavily doped n side. The background doping N B is for the impurity concentration of the lightly doped side. d 2 V bS p(x) q ~dx~ 2 ~ to = e 7 LP(X) " H(X) + N ° (X) ~ N2ix)1 N D for < x <x„ ■N A for ■x p < x <0. (10) The electric field is then obtained by integrating Eq. (10) as shown in Fig. 7(b) to be qN A (x + x p ) and (x)=- &{X) — — 6 m + for — x p < x < qN D x (11a) qN D (x — x„) for < x < x n (lib) where i m is the maximum field which exists at x = and is given by ,- - lN D x„ qN A x p I© ml ^ = • (12) 3 Depletion Region and Depletion Capacitance 89 Integration once again of Eq. (10), Fig. 7(c), gives the potential distribution V(x) and the built-in potential V bi : V ™ = *-(*-£) V bi = ^ m W = i£ m (x n + x p ) (13) (14) where Wis the total depletion width. Elimination of S m from Eqs. (12) and (14) yields '- £(*££)* (15) for a two-sided abrupt junction. For a one-sided abrupt junction, Eq. (15) reduces to W = 2s s V bi qN B (15a) where N B = N D or N A depending on whether N A $> N D or vice versa. The values of W as a function of the impurity concentration for one-sided abrupt junctions in silicon are shown in Fig. 9 (dashed line for zero bias). =- — }fff~ — \ — — -Si ONE-SIDED ABRUPT JUNCTION ~--°--ZERO BIAS in 5 -n 144 A ^H f ^ r ^* -- m 11 ^^ _._"'. ~f rrn — TOTAL — POTENTIAL = 0.1 I E ° 4 \i Ji ¥- ~i i ' - "IT ^ St™ .■■%' ~7 IT O 1.0- M IMITED BY VALANCHE REAKDOWN 3 10 r^-< -lO A — B --H-H 4-LU 100 2 10 liooo In ^< II 10 '« )0 I5 , I6 N B (cm 3 ) 10' 10' I w io >: io' S 10 10'* Fig. 9 Depletion-layer capacitance per unit area and depletion-layer width as a function of doping for one-sided abrupt junction in Si. The dashed line is for the case of zero bias voltage. 90 p-n Junction Diodes When a voltage Kis applied to the junction, the total electrostatic potential variation across the junction is given by (V bi + V) for reverse bias (positive voltage on n region with respect to the/? region) and by (V bi — V) for forward bias. Substitution of these values of voltage in Eqs. (15) or (15a) yields the depletion layer width as a function of the applied voltage. The results for one-sided abrupt junctions in silicon are shown in Fig. 9. The values above the zero-bias line (dashed line) are for the forward-biased condition; and below, for the reverse-biased condition. These results can also be used for GaAs since both Si and GaAs have approximately the same static dielectric constants. To obtain the depletion- layer width for Ge, one must multiply the results of Si by the factor y £s (Ge)/e s (Si) = 1.17. B. Depletion-Layer Capacitance. The depletion-layer capacitance per unit area is defined as C = dQJdV where dQ c is the incremental increase in charge per unit area upon an incremental change of the applied voltage dV. For one-sided abrupt junctions the capacitance per unit area is given by H?-) C ~-dV- J q H M ^\-W-Jvy^V) Pf/Cm ' (16) or 1 2 C 2 qe s N B d(l/C 2 ) _ 2 dV ~ qe s N B (V bi ± V), (16a) (16b) where the + signs are for the reverse- and forward-bias conditions respective- ly. It is clear from Eq. (16a) that by plotting 1/C 2 versus V, a straight line should result for a one-sided abrupt junction. The slope gives the impurity concentration of the substrate (N B ), and the intercept (at 1/C 2 = 0) gives the built-in potential V bi (more accurate consideration gives V bi — 2kT/q). The results of the capacitance are also shown in Fig. 9. It should be pointed out that, for the forward bias, there is a diffusion capacitance in addition to the depletion capacitance mentioned above. The diffusion capacitance will be discussed later in Section 4(4). For the cases of cylindrical p-n junctions, Fig. 6(c), the capacitance per unit length is equivalent to the capacitance of a coaxial transmission line and is given by 19 3 Depletion Region and Depletion Capacitance C,= ln^ pf/cm 91 (17) where r^ and r 2 are the radii of inner and outer boundaries of the depletion layer respectively. The capacitance for a spherical junction, Fig. 6(d), is equivalent to that of two concentric spheres and is given by C = Am* i_ i_ pf (18) The results are shown in Fig. 10 for C c and C s versus normalized reverse voltages where K Ar = 4e. (18a) is for the cylindrical junction, with r, the radius of curvature at the metal- lurgical junction ; and v -4* ar/ y \s = 6fi. (18b) is for the spherical junction. We note that for large values of V, the slopes are less than \\ and as V decreases, the slope approaches the ideal value of \ for plane abrupt junctions. O f= v/ v , v/ V AC V AS Fig. 10 Normalized capacitance versus normalized voltage for abrupt cylindrical junction and abrupt spherical junction. (After Lee and Sze, Ref. 19.) 92 p-n Junction Diodes Exact calculation 20 shows that for one-sided or two-sided junctions the relation shown in Eq. (16b) is well obeyed. However, for one-sided abrupt junctions with large doping ratios (e.g., N A > N D ), the voltage intercept in a 1/C 2 versus Fplot is nearly independent of the doping but increases approxi- mately as In V. This results from the fact that, when one side is much more heavily doped than the other, mobile charges in the immediate neighborhood of the metallurgical junction cannot be neglected. The mobile charges result from carriers spilled over from the heavily doped side. (2) Linearly Graded Junction Consider the thermal equilibrium case first. The impurity distribution for linearly graded junctions is shown in Fig. 1 1(a). The Poisson equation for this case is d 2 V dS p(x) q r _, q W W - — -j = — = = - [p - n + ax] « - ax - — < x < — (19) dx ox e s e s e s 2 2 where a is the impurity gradient in cm -4 . By integration of Eq. (19) once, we obtain field distribution as shown in Fig. 11(b): 2 (D- (*)=—— —~ (20) £. 2 with the maximum field S m at x = 0, \i\- qaWl (20a) Integration of Eq. (19) once again gives the built-in potential as shown in Fig. 11(c). or W = ( l ^M"\ (21a) \ qa J Since the values of the impurity concentrations at the edges of the depletion region ( — W/2 and W/2) are equal to a W/2, the built-in potential for linearly graded junctions can be approximately given by an expression similar to Eq. (6): V u * — In (?)(?) q \2n-J (22) 3 Depletion Region and Depletion Capacitance 93 t N D" N A p n s^ -W/2 ^© © 1 ^® ® © 1 ! © © ©^ © ©x^ W/2 *x (a) (b) (c) Fig. 11 Linearly graded junction in thermal equilibrium (a) impurity distribution (b) field distribution (c) potential variation with distance (d) energy band diagram. (d) From Eqs. (21) and (22) we can determine both V bi and W. The values of the built-in potential V bi for Ge, Si, and GaAs are in Fig. 12. The values of W at zero bias for Si and GaAs are shown in Fig. 13 (dashed line). For Ge the silicon data should be multiplied by the factor [e s (Ge)/a s (Si)] 1/3 =1.1. 94 p-n Junction Diodes J8 m'9 22 m 23 10'" I0' 3 10'" 10" 10" 10' IMPURITY GRADIENT a (cm" 4 ) Fig. 12 Built-in potential for linearly graded junctions in Ge, Si, and GaAs. The potential is plotted against the impurity gradient "a." The depletion-layer capacitance can be obtained similarly to that for the abrupt junction case and is given by C = dQ c _ d(qaW 2 l$) _ s s _ dV ~ d(qaW*ll2e s ) W qas s 12(F M ± V) 1/3 pf/cm 2 (23) where the signs + and - are for the reverse and forward bias respectively Typical values of C versus the impurity gradient for the silicon junction are shown in Fig. 13. The above discussions are for plane junction. For cylindrical and spherical linearly graded junctions, similar results are obtained. 19 The normalized capacitances versus normalized reverse voltage are plotted in Fig. 14, where . . 9qar; 3 V L c (cylindrical junctions) = — (24a) 3 Depletion Region and Depletion Capacitance 95 ==*'?» ? — Si LINEARLY GRADED JUNCTION — °- ZERO BIAS I0 5 j gi a Tff =ij& lir Jilll "4m ;z^ ~ryf , , IUIAL ^ ^-- N E POTENTI \L »O.IV ■y-^. =^.-=- r ' ~- — ;pr J9-" ^- t5 ° 1 p-^ 1 IOO 4\_i i BY EAK I0 3 AVI BLANCHE BF DOV ITN TT ' -H- j\ 4- j I 1 h ■ io 2 II i ! | 1 10' IO 22 a (cm 4 ) Fig. 13 Depletion-layer capacitance per unit area and depletion-layer width as a function of impurity gradient for linearly graded junctions in Si. The dashed line is for the case of zero bias voltage. CONDITION OF PUNCH THROUGH TO THE SURFACE- _i — i — i i i 1 1 1 10 i ; nil 10 ' V/ Vuc' V/ v L8 Fig. 14 Normalized capacitance versus normalized voltage for linearly graded cylindrical and spherical junctions. (Ref. 19.) 96 and V LS (spherical junctions) = Sqary 81c, p-n Junction Diodes (24b) We note that over most of the voltage range, as long as the doping profiles are linearly graded, the slopes are the same (-J) independent of junction geometries. 4 CURRENT-VOLTAGE CHARACTERISTICS (1) Ideal Case — Shockley Equation 1 The ideal current-voltage characteristics are derived on the basis of the following four assumptions: (1) the abrupt depletion-layer approximation, i.e., the built-in potential and applied voltages are supported by a dipole layer with abrupt boundaries, and outside the boundaries the semiconductor is assumed to be neutral; (2) the Boltzmann approximation, i.e., throughout the depletion layer, the Boltzmann relations similar to Eqs. (33) and (37) of Chapter 2 are valid ; (3) the low injection assumption, i.e., the injected minority carrier densities are small compared with the majority-carrier densities ; and (4) the facts that no generation current exists in the depletion layer, and the electron and hole currents are constant through the depletion layer. We first consider the Boltzmann relation. At thermal equilibrium this relation is given by n = n t exp n f exp E F — E } kT Ei — E F kT n t Qxp n { exp <zOA - 40 kT kT (25a) (25b) where \{/ and (j) are the potentials corresponding to the intrinsic level and the Fermi level respectively (or i// = —EJq, (f) = —E F /q). It is obvious that at thermal equilibrium the pn product from Eqs. (25a) and (25b) is equal to n t 2 . When a voltage is applied, the minority carrier densities on both sides of a junction are changed, and the pn product is no longer given by « t 2 . We shall now define the imrefs as follows : n = n t exp p = n t exp 4(<A - <f>nT\ kT J q(<t> P ~ t/0 | kT (26a) (26b) 4 Current- Voltage Characteristics 97 where $„ and § p are the imrefs or quasi-Fermi levels for electrons and holes respectively. From Eqs. (26a) and (26b) we obtain t'^ + T^n) (27b) l(<l>P ~ 0J1 the pn product becomes pn = n 2 exp kT (28) For a forward bias, (<j> p - <£„) > 0, and pn > n t 2 ; on the other hand, for a reversed bias, (<f> p - <£„) < 0, and pn <n 2 . From Eq. (93) of Chapter 2, Eq. (26a), and the fact that S = -Vi^ we obtain (kT \ L-T mf + — Vnj = qn n n(-V\//) + qpi„ — j^W-V^J = ~qn n nV<j) n . (29) Similarly, we obtain J P = -WpPV4>p- (30) Thus the electron and hole current densities are proportional to the gradients of the electron and hole imref respectively. If 0„ = 4> p = <f> = constant (at thermal equilibrium), then J n = J p = 0. The idealized potential distributions and the carrier concentrations in a p-n junction under forward-bias and reverse-bias conditions are shown in Fig. 15. The variations of <f> n and <£ p with distance are related to the carrier concentrations as given in Eq. (27). Since the electron density n varies in the junction from the n side to the p side by many orders of magnitude, whereas the electron current J n is almost constant, it follows that <j>„ must also be almost constant over the depletion layer. The electrostatic potential differ- ence across the junction is given by V=<t>p-<l>n- (31) Equations (28) and (31) can be combined to give the electron density at the boundary of the depletion-layer region on the p side (x = -x ) v p J 2 «i (qv\ (qV\ where n po is the equilibrium electron density on the p side. Similarly, P n = P„ ^p{~j (33) 98 p-n Junction Diodes " E (ev) "^njJ ?S -q* P = 1; E„ ♦ POTENTIAL I I I I "Tv~ r ^F i i i i i I (a) FORWARD (b) REVERSE Fig. 15 Energy band diagram, intrinsic Fermi level (tfj), quasi-Fermi level also referred to as imref (<f>„ for electrons, <f> p for holes), and carrier distributions under (a) forward bias (b) reverse bias condition. (After Shockley, Ref. 1.) at x = x n for the n type boundary. The above equations serve as the most important boundary conditions for the ideal current-voltage equation. From the continuity equations we obtain for the steady-state : n„ ~n„ dn„ dS d 2 n n o, (34a) Pn ~ Pn dx ^^-M P Pn Tx + D p '-^i = 0. dx 7 (34b) 4 Current-Voltage Characteristics 99 We can eliminate the term in dSjdx from the above equations with the condi- tion that (p n - p no )/T p equals (n n - n„ )/x„ . This gives n ( d 2 n„ d 2 p„\ I + M p "i^ + n "^?)/ (p " + "" ) = (35) where D a = Z>„ D p (p n + «„)/(«„ Z>„ + p n D p ) = ambipolar diffusion coeff. (36) Ma = Vn Vp(Pn ~ «„)/("„ V„ + p n H P ) = ambipolar mobility. (37) It can be shown that from the low-injection assumption (e.g., p„<^n n x n n0 in the n-type semiconductor) Eq. (35) reduces to which is Eq. (34b) with the exception that the term \i p p n dS\dx is missing; under the low-injection assumption this term is of the same order as the neg- lected terms. In the neutral region where there is no electric field, Eq. (38) further reduces to d 2 Pn Pn ~ P no n The solution of Eq. (39) with the boundary condition Eq. (33) and p n (x = 00) = Pno , gives Pn - Pno = P„ (e qV/kT - l)e~ ix - x ^ L p (40) where L p = sjD p x p . (41) And at x = x„ J P = ~qD p dPn dx Similarly we obtain for the p side qD„n = lE£P» i( fiV/*T_ i)m (42) ^p ox ^(e« v < kT -l). (43) The minority carrier densities and the current densities for the forward-bias and reverse-bias condition are shown in Fig. 16. 100 p-n Junction Diodes Pn( x n) (a) forward n,p po | (b) REVERSE Fig. 16 Carrier distributions (linear plot) and current densities for (a) forward bias (b) reverse bias condition. (After Shockley, Ref. 1 .) The total current is given by the sum of Eqs. (42) and (43) : J = J p + J n = J s (e« v ' kT - 1), J,= qD p p no , qD„n, (44) (45) This is the celebrated Shockley equation 1 which is the ideal diode law. The ideal current- voltage relation is shown in Fig. 17(a) and (b) in the linear and semilog plots respectively. In the forward direction (positive bias on p) for V > 3kT/q, the rate of rise is constant, Fig. 17(b); at 300°K for every decade change of current there is a 59.5-mV ( = 2.3 kT/q) change in voltage. In the reverse direction the current density saturates at — J s . 4 Current-Voltage Characteristics 101 * TAL 5 qV/kT •REVERSE (a) I io 4 - io 3 - io 2 FORWARD 1 10 /-REVERSE 10° / -1 10 L 1 I 1 1 „ q|V|/kT Fig. 17 Ideal cur rent- voltage characteristics (a) linear plot (b) semilog plot. We shall now briefly consider the temperature effect on the saturation cur- rent density J s . We shall consider only the first term in Eq. (45), since the sec- ond term will behave similarly to the first one. For the one-sided p + n abrupt junction (with donor concentration N D ), p no > n p0 ,Jhe_second term also can be neglected. The quantities D p , p no , and L p (= J D p x p ) are all temperature- 102 p-n Junction Diodes dependent. If D p jx p is proportional to T y , where y is a constant, then <lD p p no n JD P n? Js ~ L p -^r p N D * 6XP (" lr)] Tyl2 = T(3 + y/2> 6XP (" w)' W The temperature dependence of the term T (3 + y/2) is not important in com- parison with the exponential term. The slope of a plot J s versus 1/Tis deter- mined by the energy gap E g . It is expected that in the reverse direction where \Jr\ ~^> the current will increase approximately as e~ Ealkr with temperature; and in the forward direction where J F ~ / s e qV,kT , the current will increase approximately as exp[— (E g — qV)lkT\ (2) Generation-Recombination Process 2 The Shockley equation adequately predicts the current-voltage character- istics of germanium p-n junctions at low-current densities. For Si and GaAs p-n junctions, however, the ideal equation can give only qualitative agreement. The departures from the ideal are mainly due to the following effects: (1) the surface effect, (2) the generation and recombination of carriers in the depletion layer, (3) the tunneling of carriers between states in the band gap (particularly for GaAs), (4) the high-injection condition which may occur even at relatively small forward bias, and (5) the series resistance effect. In addition, under sufficiently larger field in the reverse direction, the junction will break down (as a result, for example, of avalanche multiplication). The junction breakdown will be discussed in Section 5. The surface effects on p-n junctions are mainly due to the ionic charges on or outside the semiconductor surface which induce image charges in the semiconductor and thereby cause the formation of the so-called surface channels or surface depletion-layer regions. Once a channel is formed, it modi- fies the junction depletion region and gives rise to surface leakage current. The details of the surface effect will be discussed in Chapters 9 and 10 of metal-insulator-semiconductor (MIS) devices. For Si planar p-n junctions the surface leakage current is in general much smaller than the generation current in the depletion region. Consider first the generation current under the reverse-bias condition. Because of the reduction in carrier concentration under reverse bias (pn <4 n t 2 ), the dominant recombination-generation processes as discussed in Chapter 2 are those of emission. The rate of generation of electron-hole pairs can be obtained from Eq. (58) of Chapter 2 with the condition p <n t and n <n t : 4 Current-Voltage Characteristics 103 17= - <* p O n V th N t ( E t - E t \ ( E, - E t \ (47) where x e is the effective lifetime and is defined as the reciprocal of the ex- pression in the square bracket. The current due to the generation in the depletion region is thus given by w J een = f q\U\dx^q\U\W = qn x W (48) where W is the depletion-layer width. If the effective lifetime is a slowly varying function of temperature, the generation current will then have the same temperature dependence as n t . At a given temperature, J gen is propor- tional to the depletion-layer width which, in turn, is dependent on the applied reverse bias. It is thus expected that (n ( + v) 1/2 for abrupt junctions, and (V bi + V) 1 ' 3 (49a) (49b) for linearly graded junctions. The total reverse current (for p no > n po and | V\ > 3kT/q) can be approxi- mately given by the sum of the diffusion components in the neutral region and the generation current in the depletion region : D pni 2 qn t W (50) For semiconductors with large values of n t (such as Ge) the diffusion com- ponent will dominate at room temperature and the reverse current will follow the Shockley equation; but if n t is small (such as for Si), the generation current may dominate. A typical result 3 for Si is shown in Fig. 18, curve (e). At sufficiently high temperatures, however, the diffusion current will domin- ate. At forward bias, where the major recombination-generation processes in the depletion region are the capture processes, we have a recombination current J rec in addition to the diffusion current. Substitution of Eq. (28) in Eq. (58) of Chapter 2 yields U a p a n v th N tni 2 (e^ kT ~l) n + n t exp (^>: + <Tr p + Hi exp P& 5 )] (51) 104 p-n Junction Diodes Under the assumptions that E t = E t and o n = a p = a, Eq. (51) reduces to <jv th N tni 2 (e qV/kT -1) n + p + 2n { av th N tni 2 (e^ kT -l) (52a) n^exp 4(<A - 4>n) kT + exp q(<t> P - </0 /cT + 2 The maximum value of U exists in the depletion region where xjj is halfway between (j) p and </>„, or i}/ — (4> n + (j) p )/2, and the denominator of Eq. (52a) becomes 2/7,[exp(^rK/2A:r) + 1]. We obtain for V> kT/q 1 / qV\ l/^-ffy rt N f n ( expl — I, (53) and r w qW (qV\ Jrec = J qU dxK— cv th N t n t exp I — I ~ «, ^V t . (54) Similar to the generation current in reverse bias, the recombination current in forward bias is also proportional to n t . The total forward current can be approximated by the sum of Eqs. (44) and (54) (for p n0 > n po and V > kT/q): lD v n t 2 (qV\ qW I qV \ Jf = NV p W~ d Qxp \kf) + -T aVth Nt ni exp l2Tr) • (55) The experimental results in general can be represented by the following empiri- cal form j '~« p (S <56) where the factor n = 2 when the recombination current dominates, Fig. 18 curve (a), and n = 1 when the diffusion current dominates, Fig. 18, curve (b). When both currents are comparable, n has a value between 1 and 2. (3) High-Injection Condition At high current densities (under the forward-bias condition) such that the injected minority carrier density is comparable with the majority concentra- tion, both drift and diffusion current components must be considered. The individual conduction current densities can always be given by Eqs. (29) and (30) and are repeated here: 4 Current-Voltage Characteristics 105 Fig. 18 Current-voltage characteristics of a practical Si diode (a) generation-recombination current region (b) diffusion current region (c) high-injection region (d) series resistance effect (e) reverse leakage current due to generation-recombination and surface effect. (After Moll, Ref. 3.) J P = -qnppv<t>p J n = -qn H nV4> H . Since J p , q, fi p , and/? are positive, the hole imref decreases monotonically to the right as shown in Fig. 15(a). Likewise the electron imref increases mono- tonically to the left. Thus, everywhere the separation of the imrefs must be less than, or equal to, the applied voltage and therefore 21 106 p-n Junction Diodes p r»— ■ n - / P^^~- - n/ *p ^T~~~~-- (a) 10 Amp/cm 10 (b) I0 3 Amp/cm 2 (c) I0 4 Amp/cm 2 Fig. 19 Carrier concentrations, intrinsic Fermi level (</<), and imrefs for a Si p-n step junction with the following parameters: N^ = 10 18 cm -3 , N D = 10 16 cm" 3 , t„ = 3 x lO -10 sec and t p = 8.4 x 10~ 10 sec for various injection conditions (a) 10 amp/cm 2 (b) 10 3 amp/cm 2 (c) 10* amp/cm 2 . (After Gummel, Ref. 21.) pn < n t exp (g) (57) This is true even under the high-injection condition. Note also that the above argument does not depend on recombination in the depletion region. As long as recombination takes place somewhere, currents will flow. As an illustration of the high-injection case, we present in Fig. 19 plots of numerical results for intrinsic Fermi level (i/0, imrefs ((j>„ and <£ p ), and carrier concentrations for a silicon p-n step junction with the following parameters : N A = 10 18 cm" 3 , N D = 10 16 cm" 3 , t„ = 3 x 10" 10 sec, and x p = 8.4 x 1(T 10 sec. The current densities in Fig. 19(a), (b), and (c) are 10, 10 3 , and 10 4 amp/cm 2 . At 10 amp/cm 2 the diode is in the low-injection regime. Almost all of the potential drop occurs across the junction. The hole concen- tration on the «-side is small compared to the electron concentration. At 10 3 amp/cm 2 the electron concentration near the junction exceeds the donor concentration appreciably. An ohmic potential drop appears on the «-side. At 10 4 amp/cm 2 we have very high injection; the potential drop across the 4 Current- Voltage Characteristics 107 junction is insignificant in comparison to ohmic drops on both sides. Even though only the center region of the diode is shown in Fig. 19, it is apparent that the separation of the imrefs at the junction is less than or equal to the difference in the hole imref to the left of the junction and the electron imref to the right of the junction for all forward-bias levels. From Fig. 19(b) and (c) the carrier densities at the n side of the junction are comparable or n « p. Substituting this condition in Eq. (57), we obtain p n (x = x„) « n t Qxp(qV/2kT). The current then becomes roughly proportional to exp(qV/2kT) as shown in Fig. 18, curve (c). At high-injection levels we should consider another effect associated with the finite resistivity in the quasi-neutral regions of the junction. This resistance absorbs an appreciable amount of the voltage drop between the diode term- inals. This effect is shown in Fig. 18 curve (d). The series resistance effect can be substantially reduced by the use of epitaxial materials. (4) Diffusion Capacitance The depletion-layer capacitance considered previously accounts for most of the junction capacitance when the junction is reverse-biased. When forward- biased, there is in addition a significant contribution to junction capacitance from the rearrangement of minority carrier density, the so-called diffusion capacitance. When a small ac signal is applied to a junction which is forward- biased to a voltage V and current density J , the total voltage and current are defined by V{t) =V + V^e jm J(t) = J + J^"* (58) where V x and J x are the small-signal amplitude of the voltage and current density respectively. The electron and hole densities at the depletion region boundaries can be obtained from Eqs. (32) and (33) by using (V + V x e i<at ) instead of V. The small-signal ac component of the hole density is given by we obtain for V t <4 V Pn = Pno exp p n (x,t)=p nl (x)e j(0t ; (59) q(v + v ie *°y kT *■- (iKifMi^- 108 p-n Junction Diodes Similar expression is obtained for the electron density. The first term in Eq. (60) is the dc component, and the second term is the small-signal ac component at the depletion layer boundary [p„i(x n )e Ji0t ]. Substitution of p„ into the continuity equation [Eq. (97) of Chapter 2 with G = 0] yields Pn , n d 2 Pn j(op n = -- + D p —j r p P dx> or ^k h ; = 0. (61) dx 2 D p X p l(l+jCOT p ) The above equation is identical to Eq. (39) if the carrier lifetime is expressed as (62) 1 + jcot p We can then obtain the alternating current density from Eq. (44) by making the appropriate substitutions: T _ qV 1 f qD p p no , qD„n po "|_/W\ kT lL p fy/l+jo}T p LJy/l+janJ Equation (63) leads directly to the ac admittance : «PT^ • («) Y = ^ = G d +jcoC d . (64) For relatively low frequencies (wx p , cox n <^ 1), the diffusion conductance G d0 is given by G M = £ (^ + SB^y^r mho /cm 2 (65) which has exactly the same value obtained by differentiating Eq. (44). The low-frequency diffusion capacitance C do is given by C M = ^(^ + qJ ^y°>" farad/cm 2 . (66) The frequency dependence of the conductance and capacitance is shown in Fig. 20 as a function of the normalized frequency cox where only one term in Eq. (63) is considered (for example the term contains p no if p no P n p0 ). The insert shows the equivalent circuit of the ac admittance. It is clear from Fig. 20 that the diffusion capacitance decreases with increasing frequency. For 5 Junction Breakdown 109 i.o o.i 1 44--- 53 == — G d / _^ — — --A^^ — ■ ,.^ £=:::___ --W c "h^ ^^ 1.0 100.0 Fig. 20 Normalized diffusion conductance and diffusion capacitance versus cot. Insert shows the equivalent circuit of a p-n junction under forward bias. large frequencies, C d ~ (co) _1/2 . The diffusion capacitance, however, increases with the direct current level (~ e qVo/kT ). This is the reason that C d is especially important at low frequencies and under forward-bias conditions. 5 JUNCTION BREAKDOWN 22 When a sufficiently high field is applied to a p-n junction, the junction " breaks down " and conducts a very large current. There are basically three breakdown mechanisms : the thermal instability, the tunneling effect, and the avalanche multiplication. We shall consider briefly the first two mechanisms, and discuss in detail the avalanche multiplication. (1) Thermal Instability The breakdown due to thermal instability is responsible for the maximum dielectric strength in most insulators at room temperature, and is also a major effect in semiconductors with relatively small band gaps (e.g., Ge). Because of the heat dissipation which is caused by the reverse current at high reverse voltage, the junction temperature increases. This, in turn, increases the reverse current in comparison with its value at lower voltages. The temperature effect 23 on reverse current- voltage characteristics is shown 110 p-n Junction Diodes in Fig. 21 . In this figure the reverse currents, J s , are represented by a family of horizontal lines. Each line represents the current at a constant junction temp- erature, and the current varies as T 3 + y/2 exp( — EJkT), as discussed previously. The heat dissipation hyperbolas which are proportional to the IV product are shown as straight lines in the log-log plot. These lines also correspond to curves of constant junction temperature. The reverse current-voltage charact- eristic of the junction is obtained by joining the intersection points of the curves of constant junction temperature. Because of the heat dissipation at high reverse voltage, the characteristic shows a negative differential resistance. In this case the diode will be destroyed unless some special measure such as a large series-limiting resistor is used. This effect is called the thermal instability. The voltage, V v , is called the turnover voltage. For p-n junctions with rela- tively large saturation currents (e.g., Ge) the thermal instability is important at room temperature. At very low temperatures, however, the thermal instability becomes less important in comparison with other mechanisms. (2) Tunneling Effect We next consider the tunneling effect. It is well known that for a one- dimensional square energy barrier with barrier height E and thickness W, the quantum-mechanical transmission probability, T t , is given by 24 e io V Q (VOLTS) Fig. 21 Reverse current-voltage characteristics of thermal breakdown where V u is the turnover voltage. (Note : Direction of coordinate increases are opposite to usual conventions.) (After Strutt, Ref. 23.) 5 Junction Breakdown 111 with 2 „;„T,2 fliin -1 1 + E 2 sinh 2 pW 4£(£ - E) (67) where E is the energy of the carrier. The probability decreases monotonically with decreasing E. When pW> 1, the probability becomes m 16E(E -E) T, * V^ -^ exp( - 2fiW). (67a) A similar expression has been obtained for p-n junctions. The detailed mathe- matical treatment will be given in Chapter 4. The tunneling current density is given by 22 T J2m*q 3 4V I 4J2rn*E 3/2 \ J < = 4n^E^ eXP l" *q*h ) (68) where S is the electric field at the junction, E g the band gap, V the applied voltage, and m* the effective mass. When the field approaches 10 6 K/cm in Ge and Si, significant current begins to flow by means of the band-to-band tunneling process. In order to obtain such a high field, the junction must have relatively high impurity concentra- tions on both the p and n sides. The mechanism of breakdown for Si and Ge junctions with breakdown voltages less than about AEJq is found to be due to the tunneling effect. For junctions with breakdown voltages in excess of GEJq, the mechanism is caused by the avalanche multiplication. At voltages between 4 and 6 EJq the breakdown is due to a mixture of both avalanche and tunneling. Since the energy band gaps, E g , in Ge, Si, and GaAs decrease with increasing temperature (refer to Chapter 2) the breakdown voltage in these semiconductors due to the tunneling effect has a negative temperature coefficient, i.e., the voltage decreases with increasing temperature. This is because a given breakdown current, /,, can be reached at smaller reverse voltages (or fields) at higher temperatures, Eq. (68). A typical example is shown in Fig. 22. This temperature effect is generally used to distinguish the tunneling mechanism from the avalanche mechanism which has a positive temperature coefficient, i.e., the breakdown voltage increases with increasing temperature. (3) Avalanche Multiplication The avalanche multiplication (or impact ionization) is the most important mechanism in junction breakdown, since the avalanche breakdown voltage 112 p-n Junction Diodes EO 100° 20° 1 -75°C J FORWARD ^"" REVERSE \ 75 i ii / ^— 20° /— 100'C V (VOLTS) Fig. 22 Current-voltage characteristics of tunneling breakdown. Note that for a given reverse current the voltage decreases with temperature, i.e., negative temperature co- efficient for breakdown due to tunneling. (After Strutt, Ref. 23.) imposes an upper limit on the reverse voltage for most diodes and on the collector voltage of all transistors, in addition, the impact ionization mechanism can be used to generate microwave power as in IMPATT devices (Impact- Avalanche and 7ransit-rime Devices) to be discussed in Chapter 5. The electron and hole ionization rates (<x„ and <x p ) have been considered in Chapter 2. We shall first derive the basic ionization integral which determines the breakdown condition. Assume a current I p0 is incident at the left-hand side of the depletion region with width W. If the electric field in the depletion region is high enough that electron-hole pairs are generated by the impact ionization process, the hole current (I p ) will increase with distance through the depletion region and reaches a value M p I po at W. Similarly, the electron current (/„) will increase from x = W to x = 0. The total current I( = I p + I n ) is constant at steady state. The incremental hole current at x is equal to the number of electron-hole pairs generated per second in the distance dx, d(IJq) = (IJq)(<x p dx) + (IJq)(cc n dx) (69) 5 Junction Breakdown or dl p jdx - (a p - a„)I p = a n I 113 (70) The solutionf of Eq. (70) with the boundary condition that I = I p (W) = M p I po is given by I P (x) = /{— + J oc„ exp - J (a p - a„) dx' dx\ /exp - J* (a p - a„) dx' where M _ is the multiplication factor of holes and is defined as Equation (71) can be written as l c w r r x 1 - — = J a P exp - J (a p - a„) dx' dx. (71) (72) (73) The avalanche breakdown voltage is defined as the voltage where M p ap- proaches infinity. Hence the breakdown condition is given by the ionization integral r w T r x | a p exp - I (a p -a„) dx' dx = 1. (74) If the avalanche process is initiated by electrons instead of holes, the ioniza- tion integral is given by w r w \ a„exp - / (<x n -a p )dx' o L x dx = 1. (75) If the avalanche process is initiated by both electrons and holes, the break- down condition is given by the simultaneous solution of both Eqs. (74) and (75). For semiconductors with equal ionization rates (a„ = a p = a) such as GaAs and GaP, Eqs. (74) and (75) reduce to the simple expression w a dx = 1 . (76) f Equation (70) has the form y' + Py = Q where y = I p . The standard solution is where C is the constant of integration e J " dx + C \ I e J 114 p-n Junction Diodes From the above breakdown conditions and the field dependence of the ionization rates, the breakdown voltages, the maximum electric field, and the depletion layer width can be calculated. As discussed previously, the electric field and potential in the depletion layer are determined from the solutions of Poisson's equation. The depletion layer boundaries, such that Eq. (74) is satisfied, can be obtained numerically with a computer using the iteration method. With known boundaries we obtain $ W e $ 2 V B (breakdown voltage) = -=— = -f-=- (N B )~ x (77) 2 2q for one-sided abrupt junctions, and 2S W 4<f 3/2 /2s \ 1/2 F a = M = ^!L^j (fl) -i/2 (yg) for linearly graded junctions where N B is the ionized background impurity concentration of the lightly doped side, s s the semiconductor permittivity, "a" the impurity gradient, and S m the maximum field. Figure 23 shows the calculated breakdown voltage 25 as a function of N B for abrupt junctions in Ge, Si, GaAs, and GaP. Figure 24 shows the calculated voltage versus the impurity gradient for linearly graded junctions in these semiconductors. The experimental results of breakdown voltages in p-n junctions are generally in good agreement with the calculated values. 26 The dashed lines in the above figures indicate the upper limits of N B or "a" for which the avalanche breakdown calculation is valid. This limitation is based on the criteria 6EJq. Above these values the tunneling mechanism will also contribute to the breakdown process and eventually dominate. The calculated values of the maximum field S m and the depletion layer width at breakdown for the above four semiconductors are shown 25 in Fig. 25 for the abrupt junctions and in Fig. 26 for the linearly graded junctions. Because of the strong dependence of the ionization rates on the field, the maximum field varies very slowly with either N B or a. Thus, as a first approxi- mation, we can assume that, for a given semiconductor, S m has a fixed value. Then from Eqs. (77) and (78) we obtain V B ~ N B 10 for abrupt junctions and V B ~ a -0-5 for linearly graded junctions. Figures 23 and 24 show that the above patterns are generally followed. Also as expected, for a given N B or a, the breakdown voltage increases with the energy band gap, since the avalanche process requires band-to-band excitations. An approximate universal expression can be given as follows for the above results comprising all of the semiconductors studied : V B ^ 60(£ ff /l.l) 3/2 (iV B /10 16 r 3/4 volts (79) for abrupt junctions where E g is the band gap in eV, and N B is the background 5 Junction Breakdown 115 -S-J-- ONE-SIDED ABRUPT JUNCTIONS (300°K) \ r \y A / \ \ \ k — \— \ 1 0_ / . ^ CO < o </> ' CO O JZ c O V> u c 3 E M c "^ c irt a. c fS a) a> a: ^-^ ■o -C h- ro o ■ -c O fc V) * .o O T3 17 CD O C o ■o z £ 4) e z o c o M N CO 5 1_ a. o a> or c -o < H <u E ^ c 3 o UJ o z o o fc X (11 E u a. .c <j >- b +j 1- 3 0) <u JC or c 3 T3 * Dl > C O 2 a> c rt If) *J := V o o > ■a -O — c ■C o T3 0) O > (LI 1- o o o o o o (SllOA) a A*39Vl"IOA NM0QMV3Ua „5 Q- rt fli o -o c c c -= _<« a t (( • O <£ < _ «w £ M <U ~ 116 p-n Junction Diodes ~ 1000 V) h- _i o > m ^ 100 UJ o < _J O > o o < L±J m Ll NEARLY 3RADED JUNCTIONS ■*". ^ (300°K) »::**^a^=>. ;s;- SP^S; ... R^^v^- / ;-.^ """=;»" 10 '9 1020 1021 1022 1023 I0 2 « IMPURITY GRADIENT, Q (CI71 ) Fig. 24 Avalanche breakdown voltage versus impurity gradient for linearly graded junc- tions in Ge, Si, GaAs, and GaP. The dashed line indicates the maximum gradient beyond which the tunneling mechanism will set in. (Ref. 25.) doping in cm 3 ; and V B £ 60(£ 9 /l.l) 6/5 («/3 x 10 20 )- 2/5 volts (80) for linearly graded junctions where a is the impurity gradient in cm -4 . The above results (Fig. 23 through 26) are for avalanche breakdowns at room temperature. At higher temperatures the breakdown voltage increases. A simple explanation for this increase is that the hot carriers passing through the depletion layer under high field lose part of their energy to optical phonons after traveling each electron-phonon mean free path, X. The value of X decreases with increasing temperature, Eq. (83) of Chapter 2. Therefore the carriers lose more energy to the crystal lattice along a given distance at constant field. Hence the carriers must pass through a greater potential 5 Junction Breakdown 117 1000 e 3" 100 5 o Q < UJ tr CD X I- o DC UJ > _1 I z o Q. UJ Q 0.1 0.01 ... ON E-SIDED ABRUPT JUNCTION (300°K) GaP ^GaAs .f '" Si = ■ Ge- — '-- GaP "£m Si- J -^— ,'--GaAs w Ge 10' 10 14 15 .16 17 10"" 10'" 10 BACKGROUND DOPING, N B (cm" 3 ) E 6° 10 -J ui 10 x 5< 10 18 Fig. 25 Depletion-layer width and maximum field at breakdown for one-sided abrupt junctions in Ge, Si, GaAs, and GaP. (Ref. 25.) 118 p-n Junction Diodes 3|00 10 o Q < UJ a: m x r- Q o h- 0.1 UJ _i Q. UJ Q 0.01 :::: 1 llllllll 1 I111IHI 1 1111111=] :::::linearly graded junction- 1 = EE = Ga P-%GaAs-y c \ -f- m l-( 3e ^Si :±:.. ■ T 1 1 ( 5aP 7 GaAs 7 -j — , -K+H 7 W J u i ^-Ge 10 19 10 20 21 10 10 a (cm -4 ) 22 10 23 10 10° _ e io % e «0 UJ u. X < 10 24 Fig. 26 Depletion-layer width and maximum field at breakdown for linearly graded junc- tions in Ge, Si, GaAs, and GaP. (Ref. 25.) difference (or higher voltage) before they can acquire sufficient energy to generate an electron-hole pair. The detailed calculations have been done by the use of a modification of Baraff's theory 26a as discussed in Chapter 2. The predicted values of V B normalized to the room-temperature value are shown in Fig. 27 for Ge and Si. For the same doping profile the predicted percentage change on V B with temperature is about the same for GaAs as it is for Ge and for GaP as it is for Si junctions. We note that there are substantial increases of the breakdown voltage especially for lower dopings (or small 5 Junction Breakdown 119 gradient) at higher temperatures. Figure 28 shows the measured results, 27 which agree quite well with this theory. For planar junctions there is an important effect which should be consider- ed — the junction curvature effect. A schematic diagram of a planar junction has been shown in Fig. 6(b). Since the cylindrical and/or spherical regions of the junction have a higher field intensity, the avalanche breakdown voltage is determined by these regions. The potential V{r) and the electric field Sir) in a cylindrical or spherical p-n junction can be calculated from Poisson's equation : 1 d p(r) r dr £, (81a) 2.5 m 1.5 0.5 Si ABRUPT JUNCTIONS Ge ABRUPT JUNCTIONS LINEARLY GRADED JUNCTIONS 600 Fig. 27 Normalized avalanche breakdown voltage versus lattice temperature. The break- down voltage increases with increasing temperature, i.e., positive temperature coefficient for breakdown due to avalanche multiplication. (After Crowell and Sze, Ref. 26a.) 120 p-n Junction Diodes 10 20 30 40 REVERSE VOLTAGE (VOLTS) Fig. 28 Temperature dependence of reverse l-V characteristics of a microplasma-free n + p Si diode with N B = 2.5 x 10 16 cm -3 and an n-type guard ring. The temperature coefficient is 0.024 V/C°. (After Goetzberger et al., Ref. 27.) for the cylindrical junction, and 1 d - 2 i-[r 2 £{ry] = r dr (81b) for the spherical junction. The solution for £(r) can be obtained from Eq. 5 Junction Breakdown 121 (81) and is given by 1 r r r) = — J r n p(r)dr + constant (82) where n equals 1 for the cylindrical junction and 2 for the spherical junction, r 7 - the radius of curvature of the metallurgical junction; and the constant must be adjusted so that the breakdown condition Eq. (74) or (75) is satisfied. The calculated results 18 for Si one-sided abrupt junctions at 300°K are shown in Fig. 29. We note that the plane junction result is the limiting case when /•_,•-> oo. With finite r,-, and for a given concentration, the breakdown voltage of the spherical junction is always smaller than that of the cylindrical junction. Typically, for a doping of 10 15 cm -3 , V B is 330 V for a plane junc- tion, 80 V for a cylindrical junction with r i = 1 urn, and 39 V for a spherical junction with the same junction radius. Similar results are obtained for Ge, GaAs, and GaP. A general expression can be given for V B (in units of volts) as follows: /F \ 3/2 / N \ -3 / 4 V B ^60(jl] ^j {l(n + l+y)fy«" + »-y} (83) 1000 - 100 10 + — -^ Si ONE-SIDED PLANE CYLINDRICAL SPHERICAL -^ ti-jN — ►©> -_ " , ___J^ = 10 t4 » ^^ S i [300 °K "~ =F :: +— --■ r=»^ ^O tz '^■^S- <5s. ~"~ — - - — " .. ^S ^N "y --■—._ C v ^s c ■'/* 1 ~~'^~. •^s 11 — '"^■ — -* — ^-; ■■^ ^ ^ — ..^ "- T^fc --~ v '?lf| r --: 10' 10' 10" IMPURITY CONCENTRATION, N B (cm* 3 ) Fig. 29 Avalanche breakdown voltage versus impurity concentration for one-sided abrupt doping profile with cylindrical and spherical junction geometries where r, is the radius of curvature as indicated in Fig. 6. (After Sze and Gibbons, Ref. 18.) 122 p-n Junction Diodes where n = 1 and 2 for cylindrical and spherical junctions respectively, and y = rj/W where Wis the depletion-layer width (in microns) shown in Fig. 25. When r i -» oo, the expression in { } approaches unity and Eq. (83) reduces to Eq. (79). The maximum electric fields at avalanche breakdown in abrupt Si junctions are shown in Fig. 30 as a function of background doping. 18 The parameter /•_,- is the radius of curvature of the cylindrical junction. The cor- responding depletion-layer widths at breakdown for various N B and r,- are shown in Fig. 31. For linearly graded junctions, it is found that the breakdown voltage is essentially independent of r y , and the results obtained for plane, cylindrical, and spherical junctions differ by only about 5 % or less, and the plots shown in Fig. 24 are valid for the above three cases. In Fig. 32 are the results for idealized Si composite junctions in which the space charge terminates in a graded region on one side of the junction and in a uniformly doped region on the other. In the limits of large and small impurity gradients, the same results are obtained as for the abrupt junctions and linearly graded junctions re- spectively. Figure 32 has been plotted for two values of r i (1 \im in dashed 20 to 3 (C YLIND Si RICAL JUN< ;t ON) j-0.1 0.5 1.0 1 5 10.0 (r i — »-oo )P LANE JUNC TION I0' 5 10' N B (cm" 3 ) Fig. 30 Maximum field at breakdown for Si cylindrical junctions. Note that for a given background doping, N B , the maximum field increases with decreasing radius of curvature. (Ref. 18.) 5 Junction Breakdown 123 100 TT—** — n y ^* ^ Si (CYLINDRICAL JUNCTION) ,,^N B = IO l4 cm 3 10 ,.--^~~ ""'-^"^lO 15 F i ^r T3 s " IC 16 17 01 c ).l 1 in) io ;; PLANE Fig. 31 Depletion-layer width at breakdown for Si cylindrical junction. (Ref. 18.) lines and 10 pirn in solid lines). The vertical dotted lines delineate the sweep- out condition which occurs when the electric field reaches the surface and the space-charge between r = and r = rj is not enough to terminate the field. The reason that the junction curvature has great effect on the breakdown of the abrupt junctions but has virtually no effect on the linearly graded junction is as follows : in linearly graded junctions Eq. (82) can be expressed as lW lK ' 2e s (1 + x/rj) (84) *i(r) = s 2 {x) = (x + rj ) 124 p-n Junction Diodes GRADIENT a COMPOSITE JUNCTION (CYLINDRICAL JUNCTION) rj = IO/xm rj = \fj-m ml i i i mill I I I Hill N 8 (cm ) I0 14 I0 15 lO 1 16 J 9 10 20 10' 21 10 a (cm" j Fig. 32 Breakdown voltage V B of composite junction (shown in the insert) in Si for two values of rj. For small gradient, V B approaches that for linearly graded junction; for large gradient, V B approaches that for abrupt junction. (Ref. 18.) where x = r —rj and C is the constant of integration. Figure 33 shows plots of $± and S 2 versus x for Si linearly graded junctions with r s = 1 fim (dashed lines), and 10 fim (solid lines), and the proper values of C chosen to satisfy the breakdown condition. One notes that the $ 2 field profile is approximately symmetrical with respect to the metallurgical junction. This symmetry causes the area which lies between S 2 and S 1 for r — r,- < 0, to be approximately equal to the area for r — rj> 0. The breakdown voltage, which is represented by the area enclosed by $ x (x) and S , 2 (x), is therefore virtually independent of rj . For abrupt junctions, however, the field profile is unsymmetrical with respect to the metallurgical junction (as shown in Fig. 34). Therefore there is no compensation in areas, and the breakdown voltage, which is equal to the area enclosed by S^{x), (f 2 00, increases with r,- resulting in the strong de- pendence of V B on rj in abrupt junctions. Aside from the junction curvature effect on breakdown, there are many other effects such as punch-through, microplasma, and surface-field effect 5 Junction Breakdown 125 Si LINEARLY GRADED JUNCTIONS r:=l^m (V B = 16.4V) — rj=lO/i.m(V B =!6.2V) Fig. 33 Field distribution at breakdown for linearly graded junctions with two different values of rj. (Ref. 18.) which also influence the breakdown characteristics. The punch-through (or sweep-out) effect is shown in Fig. 35 in which the breakdown voltage is plotted against the background doping for Si one-sided abrupt junctions formed on epitaxial substrates (e.g., n on n + ) with the epitaxial-layer thick- ness, W, as a parameter. For a given thickness the breakdown voltage approaches a constant value as the doping decreases corresponding to a complete sweep-out of the epitaxial layer. The microplasma effect, which occurs at lattice defects or around metallic precipitates, is a localized break- down in small high-field regions. With reduced crystal imperfections (e.g., etch pits with a density less than 100 cm -2 ), the microplasma effect is expected to be reduced. The surface field effect also has profound influence on break- down characteristics. We shall, however, discuss this effect in detail in Chapter 10. -METALLURGICAL JUNCTION Fig. 34 Field distribution at breakdown for one-sided abrupt junction with two different values of r Jt (Ref. 18.) I0< 10 00*K) i _w=roq£m ONE-SIDED ABRUf p-n JUNCTION _»_ p*TTn + AND p+Vn JUNCTIONS »T 50 + ~"~" »*w 20 1 — i 10 • rv 5 ^ * 2 - 1 - 10' I0 ,: 10" IMPURITY CONCENTRATION, N B (cm 3 ) 10' Fig. 35 Breakdown voltage for p + 7rn + and p + vn + structure where tt is for lightly doped p type and v for lightly doped n type. W is the thickness of the tt or v region. 126 6 Transient Behavior and Noise 127 6 TRANSIENT BEHAVIOR AND NOISE (1) Transient Behavior For switching applications it is required that the transition from forward bias to reverse bias be nearly abrupt and the transient time be short. In Fig. 36(a) a simple circuit is shown where a forward current I F is flowing in the (a) *»*■/ — w L f .. ■O.II Rh 1 (b) (c) Fig. 36 Transient behavior of a p-n junction (a) basic switching circuit (b) transient response where t t is the time interval for the constant-current phase and t 2 is that for the decay phase (c) junction voltage as a function of time (d) minority carrier distribution for various time intervals. (After Kingston, Ref. 28.) 128 p-n Junction Diodes p-n junction; at time t =0, the switch S is suddenly thrown to the right, and initial reverse current I R ~ V/R flows. The transient time is defined as the time in which the current reaches 10 percent of the initial current I R , and is equal to the sum of t t and t 2 as shown in Fig. 36(b), where t t and t 2 are the time intervals for the constant-current phase and the decay phase respectively. Consider the constant-current phase (also called storage phase) first. The continuity equation as given in Chapter 2 can be written for the «-type side (assume p p0 <$ n no ) as dp n (x,t) d 2 p„(x,t) p n (x,t)-p no ~^r~- Dp ~d^ 7 P (85) where x p is the minority-carrier lifetime. The boundary conditions are that at t = the initial distribution of holes is a steady-state solution to the diffusion equation, and that the voltage across the junction is given from Eq. (33) as k_r iaE M0 q Pno The distribution of the minority carrier density p„ with time is shown 28 in Fig. 36(d). From Eq. (86) it can be calculated that, as long as/?„(0, t) is greater than p no (in the time interval < t < t{), the junction voltage Vj remains of the order of kT/q, as shown in Fig. 36(c), and the current I R is approximately given by V/R = constant. Hence in this time interval the reverse current is constant and we have the constant-current phase. However, at or near t y the hole density approaches zero, the junction voltage tends to minus infinity, and a new boundary condition now holds. This is the decay phase with the boundary condition p(0, t) = p no = constant. The solutions have been given by Kingston, 28 and the times t x and t 2 are given by the transcendental equations erf/^ = -i- (87) T - , I 1+ 1 F ^'#-••■(9 erf - + ^=£-=1+0.1 -=. (88) The results are shown in Fig. 37 where the solid lines are for the plane junction with the length of the n-type material W much greater than the diffusion length (W$>L p ), and the dashed lines are for the narrow-base 6 Transient Behavior and Noise 129 REVERSE CURRENT / FORWARD CURRENT Fig. 37 Normalized time versus the ratio of reverse current to forward current. (Ref. 28.) junction with W<^ L p . For a large ratio I R /I F , the transit time can be approxi- mated by Oi + h) ■m for W > L p , or (h + h) 2D P \I F ) (89a) (89b) for W<L p . If one switches a junction (WpL p ) from forward 10 ma to reverse 10 ma (I R /I F = 1), the time for the constant-current phase is 0.3 x p , and that for the decay phase is about 0.6 x p . Total transient time then is 0.9 x p . For a fast switch, one thus requires that x p be small. The lifetime x p 130 p-n Junction Diodes can be substantially reduced by the introduction of impurities with deep levels in the forbidden gap (such as gold in silicon). (2) Noise 29 The term "noise" refers to the spontaneous fluctuations in the current passing through, or the voltage developed across, semiconductor bulk materials or devices. A study of the noise phenomena is important for semi- conductor devices. Since the devices are mainly used to measure small physical quantities or to amplify small signals, the spontaneous fluctuations in current or voltage set a lower limit to the quantities to be measured or the signals to be amplified. It is important to know the factors contributing to these limits, to use this knowledge to optimize the operating conditions, and to find new methods and new technology to reduce the noise. Observed noise is generally classified into thermal noise, flicker noise, and shot noise. The thermal noise occurs in any conductor or semiconductor and is caused by the random motion of the current carriers. The open-circuit mean square voltage < F„ 2 > of thermal noise is given by (V n 2 y = 4kTBR (90) where k is the Boltzmann constant, T the absolute temperature in °K, B the the bandwidth in Hz, and R the real part of the impedance between terminals. At room temperature, for a semiconductor material with 1 kQ resistance, the root mean square voltage, ■ s /(V n 2 y, measured with a 1-Hz bandwidth is only about 4 nV (1 nV = 10 -9 volt). The flicker noise is distinguished by its peculiar spectral distribution which is proportional to \jf a with a generally close to unity (the so-called l/f noise). Flicker noise is important at lower frequencies. It has been shown that, for most semiconductor devices, the origin of the flicker noise is due to the surface effect. The l/f noise-power spectrum has been correlated both qualita- tively and quantitatively with the lossy part of the metal-insulator-semi- conductor (MIS) gate impedance due to carrier recombination at the interface surface states. We shall defer the discussion of the flicker noise until the chapter on MIS devices (Chapter 9). The shot noise constitutes the major noise in most semiconductor devices. It is independent of frequency (white spectrum) at low and intermediate frequencies. At higher frequencies the shot-noise spectrum also becomes frequency dependent. The mean square noise current of shot noise for a p-n junction is given by <i n 2 > = 2qBI (91) 7 Terminal Functions 131 where / is the current which is positive in the forward and negative in the reverse direction. For low injection the total mean square noise current (neglecting l/f noise) is given by </„ 2 > = AkTBG - 2qBL (92) From the Shockley equation we obtain dl d vlhT qL VILT G = — = — Us(e q ' ~ 1)] = t 1 e q ' • (93) dV dV kT v ' Substitution of Eq. (93) into Eq. (92) yields for the forward-bias condition O n 2 y = 2qI s Be' lV ' kT + 2qBI s . (94) Experimental measurements indeed confirm that the mean square noise current is proportional to the saturation current I s which can be varied by irradiation. It has been suggested by Van Der Ziel that a better terminology should be used to classify the noises according to the physical processes: generation- recombination noise (GR), diffusion noise, and modulation noise. The GR noise is caused by spontaneous fluctuations in the generation rates, recombina- ation rates, and trapping rates of the carriers, thus causing fluctuations in the free carrier density. For junction devices the GR noise shows close resem- blance to shot noise. The diffusion noise is caused by the fact that diffusion is a random process; consequently fluctuations in the diffusion rate give rise to localized fluctuations in the carrier density. In bulk material it is the cause of thermal noise; in junction devices, however, it is a major contributor to shot noise. The modulation noise refers to noise not directly caused by fluctuations in the drift or diffusion rates but due, instead, to carrier density fluctuations or current fluctuations caused by some modulation mechanisms such as the surface field effect in MIS devices. 7 TERMINAL FUNCTIONS A p-n junction is a two-terminal device which can perform various terminal functions depending upon its biasing conditions as well as its doping profile and device geometry. In this section we shall briefly discuss some of the interesting device performances based on the current-voltage, capacitance- voltage, and breakdown characteristics discussed in the previous sections. Two important cases which will not be considered here are the tunnel diode and IMPATT diode. We shall consider these two devices in detail in the two subsequent chapters. 132 p_n Junction Diodes (1) Rectifier A rectifier is a p-n junction diode which is specifically designed to rectify alternating current, i.e., to give a very low resistance to current flow in one direction and a very high resistance in the other direction. The forward and reverse resistances of a rectifier can be easily derived from the current-voltage relationship of a practical diode, / = I s (e qV/nkT - 1) (95) where I s is the saturation current and the factor n generally has a value between 1 and 2 (n = 1 for diffusion current and n = 2 for recombination current). The forward dc (or static) resistance R F and small-signal (or dynamic) resistance r F are obtainable from Eq. (95) : R F = — ( ~ — e' qVFlnkT for V > 3kT/q\ (96a) r ' = tAt. for \V R \>3kTlq r - SVr _ nkT p l\V R \lkT dI R ql s dV F nkT .„„ N r F = -ir = -r- ( 96b ) aI F qI F The reverse dc resistance R R and small-signal resistance r R are given by (97a) (97b) Comparison of Eqs. (96) and (97) shows that the dc rectification ratio, R R /R F , varies with exp(qV F /nkT); while the ac rectification ratio, r R /r F , varies with I F /[I S exp(— q\V R \/kT)]. Rectifiers generally have slow switching speeds, i.e., a significant time delay is necessary to obtain high impedance after switching from the forward- conduction state to the reverse-blocking state. This time delay (proportional to the minority carrier lifetime as shown in Fig. 37) is of little consequence in rectifying 60-Hz currents. For high-frequency applications the lifetime should be sufficiently reduced to maintain rectification efficiency. The majority of rectifiers has power-dissipation capabilities from 0.1 to 10 watts, reverse breakdown voltages from 50 to 2500 volts (for high-voltage rectifier two or more p-n junctions are connected in series), and switching times from 50 ns (1 ns = 10~ 9 sec) for low-power diodes to about 500 ns for high-power diodes. 7 Terminal Functions 133 (2) Voltage Regulator A voltage regulator is a p-n junction diode operated in the reverse direction up to its breakdown voltage. Prior to the breakdown, the diode has a very high resistance, and after breakdown the diode has a very small dynamic resistance. The voltage is thus limited (or regulated) by the breakdown voltage. Most voltage regulators are made of Si. This is mainly because of the low saturation current in Si diodes and the advanced Si technology. As discussed in Section 5, for breakdown voltage, V B , larger than 6E g /q (~8 volts for Si), the breakdown mechanism is mainly avalanche multiplication, and the temperature coefficient of V B is positive. For V B < 4EJq (~5 volts for Si) the breakdown mechanism is band-to-band tunneling, and the temperature coefficient of V B is negative. For 4E g /q < V B < 6E g /q, the breakdown is due to a combination of these two mechanisms. One can connect, for example, a negative-temperature-coefficient diode in series with a positive-temperature- coefficient diode to produce a low-temperature-coefficient regulator (with a temperature coefficient of the order of 0.002 %/°C) which is suitable as a voltage reference. (3) Varistor A varistor (variable resistor) is a two-terminal device which shows nonohmic behavior. We have shown in Eqs. (91) and (92) the nonohmic characteristics of a p-n junction diode. Similar nonohmic characteristics are obtainable from metal-semiconductor diodes which will be considered in Chapter 8. An interesting application of varistors is their use as symmetrical fractional- voltage (~ 0.5 volt) limiter by connecting two diodes in parallel, oppositely poled. The two-diode unit will exhibit the forward I-V characteristics in either direction. (4) Varactor 30 The term "varactor" comes from the words variable reactor and means a device whose reactance can be varied in a controlled manner with a bias voltage. Varactor diodes are widely used in parametric amplification, har- monic generation, mixing, detection, and voltage variable tuning. 31 ' 32 The basic capacitance-voltage relationships have already been derived in Section 3. We shall now extend the previous derivations of abrupt and linearly graded doping distributions to a more general case. The one-dimensional 134 Poisson equation is given as d 2 V dx 2 qN p-n Junction Diodes (98) where N is the generalized doping distribution as shown in Fig. 38 (assuming one side is very heavily doped): N=Bx" for x > 0. (99) For m = we have B — N B corresponding to the uniformly doped (or one- sided abrupt junction) case. For m = 1, the doping profile corresponds to a one-sided linearly graded case. For m < 0, the device is called a " hyper- abrupt" junction. 33 The hyperabrupt doping profile can be achieved by epitaxial process. The boundary conditions are V(x = 0) = and V(x = W) = V + V bi where V is the applied voltage and V bi is the built-in voltage. Integrating Poisson's equation with the boundary conditions, we obtain for the depletion-layer width and the differential capacitance per unit area N D- N A / i m n = i/ (m + 2) 3 1/5 \m - -3/2 -l\ \ 2 1 1/4 ,,, (LINEARLY 1/5 GRADED) m 1/2 (ABRUPT) -—^^^^"-^—^ 1 ' J -1 -3/2 'l-(HYPERABRUPT) \ W HEAVILY DOPED m ~ m p-SIDE n-SIDE N = B*o<^ o ) Fig. 38 Various impurity distributions for varactors. (After Norwood and Shatz, Ref. 30.) 7 Terminal Functions 135 w = s s (m + 2)(V+V bi y qB l/(m + 2) (100) c = n = dV qB(s s )" (m + 2)(V + V bi ) l/(m + 2) (v + v bi y n (101) l (m + 2) where Q c is the charge per unit area and is equal to the product of e s and the maximum electric field (at x = 0). It is apparent that, when m = or 1, the expressions of Eqs. (100) and (101) reduce to the abrupt and linearly graded junction cases derived previously. Of particular interest is the hyperabrupt case where m = —3/2 and n = 2. For this impurity distribution the resonant frequency is linearly dependent upon bias voltage or fr = x — ~ 4= - (y + Kir 12 =( v + v m) 1 - IkJLC JC (102) This device behavior is useful in frequency modulation and in elimination of distortion. The simplified equivalent circuit of a varactor is shown 32 in Fig. 39(a), where Cj is the junction capacitance, R s is the series resistance, and R P is the parallel equivalent resistance of generation-recombination current, dif- fusion current, and surface leakage current. Both Cj and R s decrease with the reverse-bias voltage, while R P generally increases with voltage. The efficiency of a varactor is expressed as a quality factor Q, which is the ratio of energy stored to energy dissipation : Q^ coCiR, (1 + cd 2 Cj 2 R p R s ) (103) The above expression can be differentiated to obtain the angular frequency of maximum Q, a> , and the value of this maximum, Q max . These expressions are shown as 1 (104) COn ^ e« Cj(R P R s y/ 2 WsJ (105) Figure 39(b) shows a qualitative graph of the relationship between Q, frequency, and bias voltage. For a given bias, Q varies as coCjR P at low frequencies and as 1/coCjR s at high frequencies. The maximum bias voltage is limited by the breakdown voltage V B . 136 p-n Junction Diodes R s o wv (a) LOG Q w Q MAX ~" S^" ! y* - ''//V X^B /64 \V i6 \b /4 \b Q =wCj R p Q= 1/WCjRg LOG FREQUENCY (aj = 27rf; lb) Fig 39 (a) Simplified equivalent circuit of a varactor. (After Penfield and Rafuse, Ref. 32.) (b) Quality factor Q versus frequency for various bias voltages. (After Norwood and Shatz, Ref. 30.) (5) Fast-Recovery Diode Fast-recovery diodes are designed to give ultrahigh switching speed. The devices can be classified into two types: diffused p-n junction diodes and metal-semiconductor diodes. The equivalent circuit of both types can be represented by that of the varactor diode, Fig. 39(a); and the general switch- ing behavior of both types can be described by that shown in Fig. 36(b). The total recovery time (t t + t 2 ) for a p-n junction diode can be substanti- ally reduced by introducing recombination centers such as Au in Si. Although the recovery time is directly proportional to the lifetime t, as shown in Fig. 37, unfortunately it is not possible to reduce recovery times to zero by intro- ducing an extremely large number of recombination centers, N t , since the 7 Terminal Functions 137 reverse generation current of a p-n junction is proportional to N t [Eqs. (47) and (48)]. For direct band gap semiconductors such as GaAs, the minority- carrier lifetimes are generally much smaller than that of Si. This results in ultrahigh-speed for GaAs p-n junction diodes with recovery times of the order of 0.1 ns or less. For Si the practical recovery time is in the range of 1 to 5 ns. The metal-semiconductor diode (Schottky diode) also exhibits ultrahigh- speed characteristics. This is because most Schottky diodes are majority- carrier devices and there is negligible minority-carrier storage effect. We shall discuss metal-semiconductor contacts in detail in Chapter 8. (6) Charge-Storage Diode In contrast to fast-recovery diodes a charge-storage diode is designed to store charge while conducting in the forward direction and upon switching to conduct for a short period in the reverse direction. A particularly interest- ing charge-storage diode is the step-recovery diode (also called the snapback diode) which conducts in the reverse direction for a short period then abruptly cuts off the current as the stored charges have been dispelled. This cutoff occurs in the range of picoseconds and results in a fast-rising wavefront rich in harmonics. Because of these characteristics step-recovery diodes are used as harmonic generators and pulse formers. Most charge-storage diodes are made from Si with relatively long minority-carrier lifetimes ranging from 0.5 to 5 /is. Note that the lifetimes are about one thousand times longer than that for fast-recovery diodes. (7) p-i-n Diode 34 35 A p-i-n diode is a p-n junction with a doping profile tailored in such a way that an intrinsic layer, " / region," is sandwiched in between a p layer and an n layer, Fig. 40(a). In practice, however, the idealized / region is approxi- mated by either a high-resistivity p layer (referred to as n layer) or a high- resistivity n layer (v layer). The impurity distribution, space charge density, and field distribution in p-i-n andjP-7r-« diodes are shown 36 in Fig. 40(b), (c), (d) respectively. Because of low doping in the / region, most of the potential will drop across this region. For a practical p-i-n diode the impurity distribu- tion in the p and n layers varies more gradually than that shown in Fig. 40. It can be fabricated, for example, using (1) the epitaxial process, (2) the dif- fusion of p and n regions into a high-resistivity semiconductor substrate, and (3) the ion-drift (e.g., lithium) method to introduce the highly compen- sated intrinsic region. 37 138 p-n Junction Diodes p i OR w n (a) p-i-n p-7r-n (b) 1 1 L. J X (c) (d) Fig. 40 Impurity distribution, space charge density, and field distribution in p-i-n and p-7r-n junctions. (After Veloric and Prince, Ref. 36.) The typical impedance-voltage relationships 38 ' 39,40 of a p-i-n diode are shown in Fig. 41. Figure 41(a) shows the reverse characteristics where the depletion-layer capacitance remains essentially at a constant value and the series resistance decreases with increasing reverse bias. The simplified equival- ent circuit is shown in the insert. These results can be explained by referring to the simple p-n junction theory. For a p-i-n or p-n-n diode such that the p and n regions are heavily doped, the depletion capacitance can be calculated similarly to that of a one-sided abrupt junction. Because of the low doping concentration, the entire n region is usually depleted even at zero bias. The 7 Terminal Functions 139 REVERSE BIAS VOLTAGE, V R (VOLTS) (a) 100 1.0 10 FORWARD CURRENT l F (ma) (b) 100 Fig. 41 Normalized impedance-voltage relationship of a p-i-n diode. (After Senhouse, Ref. 38; Larrabee, Ref. 39; and Olsen, Ref. 40.) capacitance per unit area is then given by e s /W where W is the width of the u region. With increasing reverse bias the depletion layer will widen slightly into the p and n regions and result in a slight decrease in capacitance. The zero-bias resistance is mainly due to a slightly unswept-out n region. As the reverse bias increases, the series resistance decreases rapidly toward an asymtotic value corresponding to the contact resistance and resistance of the substrate. The breakdown voltage V B of a p-i-n diode is approximately equal 140 p-n Junction Diodes to $ m W where S m is the maximum electric field at breakdown. For Si S m K,2 x 10 5 V/cm, so that V B « 1000 volts for an / region 50 ^m thick. Computed results for breakdown voltages in Si and Ge p-i-n diodes 41 are shown in Chapter 5. Under the forward bias condition, holes will be injected from the p layer to the i region and electrons will be injected from the n layer. The current crossing the boundary between the p and i layers will be entirely hole current given by I F = AqpW\x p where A is the device area, p the hole density, and x p the hole lifetime. Similarly, the current crossing the n-"i" boundary will be entirely electron current. The conductivity of the / layer is given by ° = <liP- P P + Hn n) ~ I F . (106) The resistance of the i layer will be W 1 Ri = -1~T' (107) oA l F The above prediction is in reasonable agreement with the experimental result shown in Fig. 41(b). Because of these interesting forward and reverse characteristics, the p-i-n diode has found wide applications in microwave circuits. 42 ' 43 It can be used as a microwave switch with essentially constant depletion-layer capacitance and high power-handling capability. The switching speed 44 is approximately given by W/2v sl where v sl is the scattering-limited velocity across the / region. In addition, a p-i-n diode can be used as a variolosser (variable attenuator) by controlling the device resistance which varies approximately linearly with the forward current. It can also be used as a modulator to perform signal modulating functions up to the GHz range. 8 HETEROJUNCTION A heterojunction is a junction formed between two semiconductors having different energy band gaps. In 1951 Shockley 45 proposed the abrupt hetero- junction to be used as an efficient emitter-base junction in a transistor. Kroemer 46 later analyzed a similar, though graded, heterojunction as a wide-gap emitter. Since then heterojunctions have been extensively studied, and many applications have been proposed, among them are the majority- carrier rectifier, the high-speed band-pass photodetector, the beam-of-light transistor, and the indirect-gap injection lasers. 47 A heterojunction can be formed by various methods, among them are (1) the interface-alloy tech- nique 47 ' 48,49 which utilizes the difference in melting points between the two 8 Heterojunction 141 semiconductors for selective melting and regrowth, (2) the epitaxial vapor growth technique, 50 and (3) the vacuum deposition of one material on another. A perfect match of lattice constants (refer to Table 2. 1) and thermal expan- sion coefficients, however, are not normally possible in heterojunctions and, therefore, defects such as interfacial dislocations are generally present at the heterojunction interface. 51 These interface states can act as trapping centers and severely limit the device potential. Nevertheless, the heterojunction is a useful device in the sense that it can further understanding of the carrier transport processes and of the variation of band gap across the interface; it will also further the study of lattice mismatch and epitaxial processes, as well as the investigation of many interesting physical phenomena associated with discontinuity at the interface. The energy band model of an ideal abrupt heterojunction without interface states was proposed by Anderson 50 based on the previous work of Shockley. We shall now consider this model, since it can adequately explain most of the transport processes, and only slight modification of the model is needed to account for nonideal cases such as interface states. Figure 42(a) shows the energy-band diagram of two isolated pieces of semiconductors. The two semiconductors are assumed to have different band gaps (E g ), different per- mittivities (e), different work functions (0 m ), and different electron affinities (x). Work function and electron affinity are defined, respectively, as that energy required to remove an electron from the Fermi level (E F ) and from the bottom of the conduction band (E c ) to a position just outside the material (vacuum level). The difference in energy of the conduction-band edges in the two semiconductors is represented by AE C and that in the valence band edges by AE V . When a junction is formed between these semiconductors, the energy-band profile at equilibrium is shown in Fig. 42(b). This is called an n-p hetero- junction a junction formed between an w-type narrow-gap semiconductor and a />-type wide-gap semiconductor. Since the Fermi level must coincide on both sides in equilibrium and the vacuum level is everywhere parallel to the band edges and is continuous, the discontinuity in conduction-band edges (AE C ) and valence-band edges (AE V ) is invariant with doping in those cases where E g and x are not functions of doping (i.e., nondegenerate semi- conductors). The total built-in potential V bi is equal to the sum of the partial built-in voltages (V bl + V b2 ) where V bl and V b2 are the electrostatic potentials supported at equilibrium by semiconductors 1 and 2 respectively. The depletion widths and capacitance can be obtained by solving Poisson's equation for the step junction on either side of the interface. 50,52 One of the boundary conditions is the continuity of electric displacement, i.e., e 1 ^ l = e 2 S 2 at the interface. We obtain 142 p-n Junction Diodes ELECTRON ENERGY VACUUM LEVEL I ' --4-JL. 1 ■gl -g2 (a) E CI_1 4 % ivvA^ A^iiZA VACUUM LEVEL 1 m. __ V- AE cl | I —yt- i tv b ^^Al x E« L g2 (b) Fig. 42 (a) Energy band diagram for two isolated semiconductors in which space charge neutrality is assumed to exist in each region. (b) Energy band diagram of an ideal n-p heteroj unction at equilibrium. (After Anderson, Ref. 50.) Xi = X, = 2N A2 s 1 s 2 (V bi -V) Y' 2 qN m (e x N m + s 2 N A2 )_ 2N Dl e 1 s 2 (V bi - V) qN A2 (s t N D1 + s 2 N A2 )_ 1/2 (108) (109) and 8 Heterojunction C = iN di n A2 e X £ 2 1/2 2(£iN D1 +s 2 N A2 )(V bi -V)] The relative voltage supported in each of the semiconductors is V bl -V 1 N A2 s 2 V, N, 143 (110) (111) where V = V t + V 2 . It is apparent the above expressions will reduce to that for the p-n junction (homojunction) discussed in Section 3, where both sides of the heterojunction have the same materials. The case of an n-n heterojunction of the above two semiconductors is somewhat different. Since the work function of the wide-gap semiconductor is the smaller, the energy bands will be bent oppositely to the n-p case [see Fig. 43(a)]. 53 The relation between V bl - V x and V b2 - V 2 can be found from the boundary condition of continuity of electric displacement at the interface. For an accumulation in region 1 governed by Boltzmann statistics, [for detailed derivation see Section 2 of Chapter 9] the electric displacement 3> x at x is given by @ x = e^iCxo) = pe^iVc! — I exp kT -)- (v bl - vo 1/2 (112) The electric displacement at the interface for a depletion in region 2 is given by 2 = e 2 * 2 (x ) = [2s 2 qN D2 (V b2 - F 2 )] 1/2 . (113) Equating Eqs. (112) and (113) gives a relation between (V bl - V x ) and (V b2 — V 2 ) which is quite complicated. However, if the ratio £iN Dl /e 2 N D2 is of the order of unity and V bi (= V bi + V b2 ) > kT/q, we obtain 53 exp q(V bl - VJ kT ^iVu-V) (114) where Kis the total applied voltage and is equal to (K x + V 2 ). Also shown in Fig. 43 are the idealized equilibrium energy band diagrams for p-n (narrow- gap p-type and wide-gap «-type) and p-p heterojunctions. If interface states are present, the above idealized conditions should be modified. The energy band at the interface is free to move up or down with the necessary charge being supplied by electrons (or their absence) in the interface states. The discontinuity in the conduction band is still equal to the difference in electron affinities, however, the height of the conduction band edge above the Fermi level at the interface is determined primarily by the m p-n Junction Diodes interface states. Figure 44(a) shows the energy band diagram of a Ge-Si n-n heterojunction (with about 4% lattice mismatch). 51 It is observed that both sides of the junction are depleted, a situation made possible by the acceptor nature of the interface states. A magnified energy band diagram of the n-n heterojunction with interface states is shown in Fig. 44(b). The interface states q v bi "J qv h (a) n-n Ge >* Vbi JT — E f SUBSTRATE GaAS (b) p-n v b 2 "; AE, '1_1__ 1 Ge AE, GaAs (c) p-p Fig. 43 (a) Energy band diagram for an ideal abrupt n-n heterojunction. (After Chang, Ref. 53.) (b) and (c) Energy band diagrams for ideal p-n and p-p heterojunctions respectively. (After Anderson, Ref. 50.) 8 Heterojunction 145 (a) " 1 V bl /^ Tax E C T ^^ | qV b2 L F E„ I INTERFACE STATES (b) Fig. 44 (a) Ge-Si n-n heterojunction with interface states, (b Magnified interface region. (After Oldham and Milnes, Ref. 51.) are assumed to lie in a thin layer sandwiched between the two depletion regions; and these states can act as generation-recombination centers. The current-voltage characteristics in heterojunctions are influenced by various mechanisms depending on the band discontinuities at the interface and the density of interface states. For example, if the barrier to holes is much higher than that for electrons, then the current will consist almost entirely of electrons ; or if the density of interface states is very high then the dominant current will be generation-recombination current from the interface. The dominant current can also be due to tunneling if the barrier width is very thin, or to thermionic emission if the interface acts as a metal-semiconductor contact. 146 p-n Junction Diodes We shall consider an interesting case as shown in Fig. 43(a). The conduction mechanism is governed by thermionic emission (refer to Chapter 8 for details) and the current density is given by 53 J = A*T 2 exp (-£) exp kT exp m (115) where A* is the effective Richardson constant. Substitution of Eq. (114) into Eq. (115) yields the current-voltage relationship: J = Jo 1 - V hi exp qV kT - 1 (116) where , qA*TV bl I qV bi The above expression is somewhat different from that for metal-semiconductor contact. The value of J is different and so is its temperature dependence. The reverse current never saturates but increases linearly with voltage at large V. In the forward, the dependence of Jon qV/kT can be approximated by an exponential function or J ~ exp qVjnkT. The above predicted results have been observed in Ge-GaASi^i^ n-n heterojunctions for x ~ 0.1 or less. For substrates with x = 0.3, however, the lattice mismatch is greater than 1 % and the effect of interface states causes the bands to bend, as is shown in Fig. 44. The device then behaves as a structure with two diodes connected back to back in which the interface states cause the depletion of electrons from both semiconductors. REFERENCES W. Shockley, "The Theory of p-n Junctions in Semiconductors and p-n Junction Transistors," Bell Syst. Tech. J., 28, 435 (1949); also Electrons and Holes in Semicon- ductors, Van Nostrand Book Co. (1950). C. T. Sah, R. N. Noyce, and W. Shockley, "Carrier Generation and Recombination \np-n Junction and p-n Junction Characteristics," Proc. IRE, 45, 1228 (1957). J. L. Moll, "The Evolution of the Theory of the Current-Voltage Characteristics of p-n Junctions," Proc. IRE, 46, 1076 (1958). For example see A. G. Grove, Physics and Technology of Semiconductor Devices, John Wiley and Sons, Inc., New York (1967). R. N. Hall and W. C. Dunlap, "p-n Junctions Prepared by Impurity Diffusion," Phys. Rev., 80, 467 (1950). References 147 6. M. Tanenbaum and D. E. Thomas, " Diffused Emitter and Base Silicon Transistors," Bell Syst. Tech. J., 35, 1 (1956). 7. C. J. Frosch and L. Derrick, "Surface Protection and Selective Masking During Diffusion in Silicon," J. Electrochem. Soc, 104, 547 (1957). 8. J. A. Hoerni, "Planar Silicon Transistor and Diodes," IRE Electron Devices Meeting, Washington, D.C. (1960). 9. H. C. Theuerer, J. J. Kleimack, H. H. Loar, and H. Christenson, "Epitaxial Diffused Transistors," Proc. IRE, 48, 1642 (1960). 10. E. L. Jordan, "A Diffusion Mask for Germanium," J. Electrochem. Soc, 108, 478 (1961). 11. P. F. Schmidt and W. Michel, "Anodic Formation of Oxide Films on Silicon," J. Electrochem. Soc, 104, 230 (1957). 12. J. R. Ligenza, "Silicon Oxidation in an Oxygen Plasma Excited by Microwaves," J. Appl. Phys., 36 2703 (1965). 13. M. M. Atalla, "Semiconductor Surfaces and Films; the Silicon-Silicon Dioxide System," in Properties of Elemental and Compound Semiconductors, H. Gatos, Ed., Vol. 5, pp. 163-181, Interscience (1960). 14. B. E. Deal and A. S. Grove, "General Relationship for the Thermal Oxidation of Sili- con," J. Appl. Phys., 36, 3770 (1965). 15. D. Flatley, N. Goldsmith, and J. Scott, "A Zinc Diffusion Mask," presented at the Electrochemical Society Meeting, Toronto, Canada (May 1964). 16. For a general reference, see H. S. Carslaw and J. C. Jaeger, Conduction of Heat in Solids, Oxford University Press, 2nd Ed. (1959). 17. D. L. Kendall, Diffusion in III- V Compounds with Particular Reference to Self- Diffusion in InSb, Report No. 65-29, Dept. of Material Science, Stanford University, Stanford (August 1965). 18. S. M. Sze and G. Gibbons, "Effect of Junction Curvature on Breakdown Voltages in Semiconductors," Solid State Electron., 9, 831 (1966). 19. T. P. Lee and S. M. Sze, "Depletion Layer Capacitance of Cylindrical and Spherical p-n Junctions," Solid State Electron., 10, 1105 (1967). 20. H. K. Gummel and D. L. Scharfetter, "Depletion-Layer Capacitance of p + n Step Junction," J. Appl. Phys., 38, 2148 (1967). 21. H. K. Gummel, "Hole-Electron Product of p-n Junctions," Solid State Electron., 10, 209 (1967). 22. For a general discussion, see J. L. Moll, Physics of Semiconductors, McGraw-Hill Book Co., New York (1964). 23. M. J. O. Strutt, Semiconductor Devices, Vol. 1, Semiconductor and Semiconductor Diodes, Academic Press, New York, Ch. 2, (1966). 24. L. J. Schiff, Quantum Mechanics, 2nd Ed., McGraw-Hill Book Co., New York (1955) 25. S. M. Sze and G. Gibbons, "Avalanche Breakdown Voltages of Abrupt and Linearly Graded p-n Junctions in Ge, Si, GaAs, and GaP," Appl. Phys. Letters, 8, 111 (1966). 148 p. n Junction Diodes 26. H. Kressei, "A Review of the Effect of Imperfections on the Electrical Breakdown of p-n Junctions," RCA Review, Vol. 28, pp. 175-207 (1967). 26a. C. R. Crowell and S. M. Sze, "Temperature Dependence of Avalanche Multiplication in Semiconductors," Appl. Phys. Letters, 9, 242 (1966). 27. A. Goetzberger, B. McDonald, R. H. Haitz, and R. M. Scarlet, "Avalanche Effects in Silicon p-n Junction. II. Structurally Perfect Junctions," J. Appl. Phys., 34, 1591 (1963). 28. R. H. Kingston, "Switching Time in Junction Diodes and Junction Transistors," Proc. IRE, 42, 829 (1954). 29. A. Van Der Ziel, Fluctuation Phenomena in Semiconductors, Academic Press, New York (1959). 30. For a review, see M. H. Norwood and E. Shatz, "Voltage Variable Capacitor Tuning —A Review," Proc. IEEE, 56, 788 (1968). 31. J. H. Forster and R. M. Ryder, "Diodes Can Do Almost Anything," Bell Labs Rec, 39, 2 (1961). 32. P. Penfield, Jr. and R. P. Rafuse, Varactor Applications, Cambridge, Mass., MIT Press (1962). 33. M. E. McMahon and G. F. Straube, "Voltage Sensitive Semiconductor Capacitor," IRE WESCON Conv. Rec, Pt. 3, pp. 72-82 (August 1958). 34. M. B. Prince, " Diffused p-n Junction Silicon Rectifiers," Bell Syst. Tech. J., 35, 661 (1956). 35. R. N. Hall, "Power Rectifiers and Transistors," Proc. IRE, 40, 1512 (1952). 36. H. S. Veloric and M. B. Prince, "High Voltage Conductivity-Modulated Silicon Rectifier," Bell Syst. Tech. J., 36, 975 (1957). 37. E. M. Pell, "Ion Drift in an n-p Junction," J. Appl. Phys., 31, 291 (1960); also J. W. Mager, "Characteristics of p-i-n Junction Produced by Ion-Drift Techniques in Silicon," J. Appl. Phys., 33, 2894 (1962). 38. L. S. Senhouse, "Reverse Biased p-i-n Diode Equivalent Circuit Parameters at Micro- wave Frequencies," IEEE Trans. Electron Devices, ED-13, 314 (1966). 39. R. D. Larrabee, "Current Voltage Characteristics of Forward Biased Long p-i-n Structures," Phys. Rev., 121, 37 (1961). 40. H. M. Olsen, "Design Calculation of Reverse Bias Characteristics for Microwave p-i-n Diodes," IEEE Trans. Electron Devices, ED-14, 418 (1967). 41 . G. Gibbons and S. M. Sze, "Avalanche Breakdown in Read Diodes and p-i-n Diodes," Solid State Electron., 11, 225 (1968). 42. H. Benda, A. Hoffman, and E. Spenke, "Switching Processes in Alloyed p-i-n Recti- fiers," Solid State Electron., 8, 887 (1965). 43. D. Leenov, "The Silicon p-i-n Diode as a Microwave Radar Protector at Megawatt Levels," IEEE Trans. Electron Devices, ED-11, 53 (1964). 44. G. Lucovsky, R. F. Schwarz, and R. B. Emmons, "Transit-Time Considerations in p-i-n Diodes," J. Appl. Phys., 35, 622 (1964). 45. W. Shockley, U.S. Patent 2,569,347 (1951). References 149 46. H. Kroemer, "Theory of a Wide-Gap Emitter for Transistors," Proc. IRE, 45, 1535 (1957). 47. For a summary of the proposed applications, see for example, R. H. Rediker, S. Stopek, and J. H. R. Ward, "Interface- Alloy Epitaxial Heterojunctions," Solid State Electron., 7, 621 (1964). 48. E. D. Hinkley and R. H. Rediker, "GaAs-InSb Graded-Gap Heterojunction," Solid State Electron., 10, 671 (1967). 49. J. Shewchun and L. Y. Wei, "Germanium-Silicon Alloy Heterojunction," J. Electro- chemical Soc, 111, 1145 (1964). 50. R. L. Anderson, "Experiments on Ge-GaAs Heterojunctions," Solid State Electron., 5, 341 (1962). 51. W. G. Oldham and A. G. Milnes, "Interface States in Abrupt Semiconductor Hetero- junctions," Solid State Electron., 7, 153 (1964). 52. L. L. Chang, " Comments on the Junction Boundary Conditions for Heterojunctions," J. Appl. Phys., 37, 3908 (1966). 53. L. L. Chang, "The Conduction Properties of Ge-GaAs!-^* n-n Heterojunctions," Solid State Electron., 8, 721 (1965). 54. The " planar " process uses techniques all of which were previously known, such as oxide masking against diffusion. The distinguishing feature is their use in combination, permitting an unprecedented fineness of control of the sizes and shapes of electrodes and diffused regions. The name "planar" comes from the requirement that the wafer surface must be approximately flat. If the surface is rough, the liquid photoresist does not coat it evenly, and imperfections result. INTRODUCTION EFFECTS OF HIGH DOPING TUNNELING PROCESSES EXCESS CURRENT CURRENT-VOLTAGE CHARACTERISTICS DUE TO EFFECTS OF DOPING, TEMPERATURE, ELECTRON BOMBARDMENT, AND PRESSURE EQUIVALENT CIRCUIT BACKWARD DIODE 4 Tunnel Diode and Backward Diode I INTRODUCTION The first acknowledged paper 1 on the tunnel diode (also referred to as the Esaki diode) was reported by Leo Esaki in 1958. There he described, in the course of studying the internal field emission in degenerate germanium p-n junctions, an "anomalous" current-voltage characteristic observed in the forward direction, i.e., a negative resistance region over part of the forward characteristic. It was said that before 1958 this anomalous characteristic of some p-n junctions was observed by many solid-state research scientists, but these p-n junctions were rejected immediately because they did not follow the "classic" diode equation. Esaki, however, explained this anomalous charac- teristic by the use of a quantum tunneling concept and obtained reasonable agreement between his tunneling theory and the experimental results. This work quickly led others to more sophisticated approaches in both theories and experiments. The ultrahigh-speed, low-power operation, and particularly low- noise characteristics of the tunnel diode are useable for many circuit applica- tions including microwave amplification, high-speed switching, and binary memory. 2 The tunneling phenomenon is a majority carrier effect. In addition the tunneling time of carriers through the potential energy barrier is not governed by the conventional transit time concept (t = Wjv where W is the barrier 150 2 Effects of High Doping 151 width and v is the carrier velocity) but rather by the quantum transition probability per unit time which is proportional to exp[ — 2k(0)W] where k(0) is the average value of momentum encountered in the tunneling path corresponding to an incident carrier with zero transverse momentum and energy equal to the Fermi energy. 3 Reciprocating gives the tunneling time proportional to exp[2k(0)W]. This tunneling time is very short, permitting the use of tunnel diodes well into the millimeter-wave region. In this chapter we shall first discuss the effect of high doping concentrations. In Section 3 the tunneling processes and the derivation of the tunneling current will be considered. Section 4 discusses the role of excess current. Section 5 presents detailed consideration of the current-voltage character- istics due to effects of doping, temperature, electron bombardment, and pres- sure. Also included is a brief discussion of the degradation phenomenon. In Section 6 we shall discuss the equivalent circuit and the basic characterization of a tunnel diode. Finally, Section 7 considers the backward diode which is akin to the tunnel diode and is useful because of its large reverse current and its nonlinearity near the zero-bias condition. 2 EFFECTS OF HIGH DOPING A tunnel diode consists of a simple p-n junction in which both the p and the n sides are very heavily doped with impurities. There are three major effects due to high doping densities: (1) the Fermi level is located within the allowed bands themselves, (2) the impurity states broaden into bands, and (3) the intrinsic band gap is reduced (so-called band-edge tailing). In addition the impurity bands give rise to the valley current in tunnel diodes which will be discussed in the section on excess current. For a semiconductor with an impurity concentration much less than the effective density of states (N c or N v ), the semiconductor is nondegenerate, and the Fermi level lies in the band gap. When the impurity concentration is approaching or greater than the effective density of states, the Fermi level is located within the conduction or valence band, and the semiconductor is defined as degenerate. One necessary condition for obtaining a tunnel diode is that both p-type and n-type semiconductor materials must be degenerate. We can calculate the doping density which is necessary to make the Fermi level just coincide with the edge of band. Let us consider an «-type semicon- ductor in which we assume that the donor level E D is a discrete level. From Eqs. (1 1) and (24) of Chapter 2 and the condition n « N£ we obtain by setting E F — E c — and E F — E D — E d : < 152 Tunnel Diode and Backward Diode n 1+2 exp. , ^ 0.68 N, 1+2 exp m 0) The concentrations calculated from Eq. (1) for shallow donor levels are about 2 x 10 19 cm -3 for Ge and about 6 x 10 19 cm -3 for Si. An «-type semi- conductor with density of N D equal to or greater than that of Eq. (1) is a degenerate semiconductor. A similar calculation can be made for/?-type semi- conductors. The assumption of a discrete impurity level is actually violated at very high doping levels, since the donor and acceptor states broaden out into bands themselves. The result of Eq. (1), nevertheless, serves as a first-order approxi- mation and gives a reasonable prediction of the order of magnitude for the concentrations required to give degeneracy. Figure 1 compares the density distribution functions of nondegenerate and degenerate semiconductors. We note that, as the doping increases, the distribution of impurity semi- conductor states changes from a delta function to an impurity band. Four basic models 4 for the impurity band are shown in Fig. 2. Figure 2(a) and (b) are for impurity band calculations based on a regular close-packed lattice structure of hydrogen-like impurities. Figure 2(a) shows the density of states and the electron population at room temperature with N D = 2 x 10 19 /cm 3 . The density of states of the impurity band is given by 4/Vn n(E) = —£ exp[ - 4n(E/AE) 2 ] states/eF AE = 3.2 x 10 20 exp[-47r(£/A£) 2 ] (2) where the Fermi level is taken as zero, and AE is the bandwidth parameter of the Gaussian distribution. For N D = 2 x 10 19 cm -3 , AE is found to be 0.25 eV. Figure 2(b) is similar to Fig. 2(a) except that the maximum value of n{E) is reduced. In order to give the same total number of states, the function n(E) is given by n(E) = 2.2 x 10 20 exp [-6(£yA£) 2 ] states/eV. (2a) Figures 2(c) and (d) show the impurity bands which are calculated from a one- dimensional crystal consisting of randomly distributed delta-function poten- tials. Figure 2(c) shows the density of states and the electron population at room temperature with N D = 1.7 x 10 19 cm -3 . Figure 2(d) is similar to 2(c) except that the impurity band contains 2N D states instead of N D states as in Fig. 2(c). In all cases we note that, at sufficiently high impurity densities, the impurity bands merge with the main bands. 2 Effects of High Doping 153 T Eg 1 CONDUCTION BAND DONOR STATE (DELTA FUNCTION) n(E) VALENCE BAND (o ) NONDEGENERATE SEMICONDUCTOR DONOR BAND XjT*~ INTRINSIC CONDUCTION BAND DEGENERATE CONDUCTION BAND BAND EDGE TAILING n (E) VALENCE BAND (b) DEGENERATE SEMICONDUCTOR Fig. 1 Density-of-states distribution functions n(£) vs £, (a) for a nondegenerate semiconductor, (b) for a degenerate semiconductor. Figure 1(b) and Fig. 2 also reveal the third consequence of high doping densities. The intrinsic band gap E g is reduced to E g ' . From emission spectra it is found 5 that the band gap of a degenerate germanium with a doping den- sity of 10 19 /cm 3 is only 0.5 eV (in comparison with the intrinsic band gap of 0.66 eV). Figure 3 shows the results of the density of states of j^-type gallium arsenide, metal-semiconductor tunneling experiments. 6 It should be noted that in degenerate semiconductors, the conduction-band or the valence-band edge is not sharp; it tails off gradually into the band gap. This phenomenon is PARABOLIC PARABOLIC CONDUCTION BAND 4 X 10 n (E) GAUSSION IMPURITY BAND TOTAL DENSITY OF STATES 4 XIO n(E) >0.0 ELECTRON POPULATION TOTAL DENSITY OF STATES (C) (Ci) Fig. 2 Impurity band broadening and the merger of impurity band and the main band. (a) and (b) for impurity band calculations based on a regular close-packed lattice structure with donor density 2 x 10 19 cm -3 . (c) and (d) for the impurity bands which are calculated from a one-dimensional crystal consisting of randomly distributed delta-function potentials with donor density 1.7 x 10 19 cm -3 and 3.4 x 10 19 cm -3 respectively. (After Brody, Ref. 4.) 154 2 Effects of High Doping 155 25 20 m 10 u. I0 o \ N *\ p - TYPE GaAs 5.4 X I0 18 cm -3 •\ * \ \ _J i 1 1AJ -0.2 8 - lli 6 o 4 2 -0.1 V p- TYPE GaAs 9.9 X I0 18 cm" 3 0. \ N r\. j i i i i i i 5_t< -0.2 -0.1 V (VOLTS) 0.1 Fig. 3 Density of states of p-type GaAs obtained experimentally. The dashed lines are the best fits of the parabolic band. Note the large band-edge tailing effect at higher doping levels. (After Mahan and Conley, Ref. 6.) referred to as the band-edge tailing. As the doping increases, the band-edge tailing also increases. The theoretical band-edge tailing has been studied by Kane 7 using a semiclassical or Thomas-Fermi approach. The density of states is found to be: n(E) = m* 3/2 (2rj) 1/2 n- 2 h- 3 y(Elr]) Vol -00 Y(x) = tT 1/2 f (x - 1/2 exp(-C 2 ) dt; « — nr> (3) where x = E/rj, Vol. is the volume, and r\ is a parameter proportional to (N D ) 5/12 where N D is the average impurity density. We can express the above result in terms of the function Y(x) with no parameters. Y(x) is plotted in 156 Tunnel Diode and Backward Diode Fig. 4 where the dotted curve is for the nondegenerate case which at high energies emerges into the solid curve for the degenerate case. This result compares favorably with the experimental results of Fig. 3. It is also clear from Eq. (3) that n(E) ~ exp ( — E 2 /r] 2 ) at low energies and n{E) ~ E 1/2 at high energies. 3 TUNNELING PROCESSES (1) Qualitative Consideration A typical static current-voltage characteristic of a tunnel diode is shown in Fig. 5(a). In the reverse direction (p-side negative with respect to n- side) the current increases monotonically. In the forward direction the current first increases to a maximum value (peak current or I P ) at a voltage V P , then decreases to a minimum value I v at a voltage V v . For voltage larger than V v , the current increases exponentially with the voltage. The static characteristic is the result of many current components : namely the band-to-band tunnel 2.0 0.8 Fig. 4 Theoretical band-edge tailing plot. Y is proportional to the density of states and x is proportional to the energy. (After Kane, Ref. 7.) 3 Tunneling Processes 157 current, the valley current, the exponential excess current, and the thermal current, Fig. 5(b). We shall consider the tunnel current component in this section. The other current components will be considered in the next section. We shall first discuss qualitatively the tunneling processes at absolute zero temperature using the simplified band structures as shown in Fig. 6. We note that the Fermi levels are within the bands of the semiconductor, and at thermal (a) STATIC CHARACTERISTIC - VALLEY / /. \ rCURRENT / j I \\l / .4-1— EXPONENTIAL (b) CURRENT COMPONENTS Fig. 5 (a) Static current-voltage characteristic of a typical tunnel diode. I P and V P are the peak current and peak voltage respectively. I v and V v are the valley current and valley voltage respectively. V PP is the voltage at which the current again reaches l P . (b) The static current-voltage characteristic is decomposed into the current components. 158 Tunnel Diode and Backward Diode m ^ \ (a) (b) (c) (d) (e) Fig 6 Simplified energy-band diagrams of tunnel diode at (a) reverse bias, (b) thermal equilibrium, (c) forward bias such that peak current is obtained, (d) forward bias such that the valley current is approached, and (e) forward bias with thermal current flowing. (After Hall, Ref. 48.) equilibrium, Fig. 6(b), the Fermi level is a constant across the junction. Above the Fermi level there are no filled states on either side of the junction, and below the Fermi level there are no empty states available on either side of the junction. Hence no tunneling current can flow at zero externally applied voltage. When a biasing voltage is applied, the electrons may tunnel from the valence band to the conduction or vice versa. The necessary conditions for tunneling are: (1) there are occupied energy states on the side from which the electron tunnels, (2) there are unoccupied energy states at the same energy levels as in (1) on the side to which the electron can tunnel, (3) the tunneling potential barrier height should be low and the barrier width should be small enough that there is a finite tunneling probability, and (4) the momentum must be conserved in the tunneling process. Figure 6(a) shows electron tunneling from the valence band into the conduction band when a reversed bias is applied. The corresponding current is also designated by the dot on the I-V curve. When a foward bias is applied, 3 Tunneling Processes 159 Fig. 7 Simplified energy band diagram with constant electric field in the depletion region. The amounts of degeneracy are qV „ and qV p on the n-side and p-side respectively. V is the applied voltage. E} and £ 2 are the electron energies measured for the n and p band edges respectively. Fig. 6(c), a band of energies exists for which there are filled states on the n side corresponding to states which are available and unoccupied on the/? side. The electrons can thus tunnel from the n side to the p side. When the forward vol- tage is further increased, there are fewer available but unoccupied states on the/? side, Fig. 6(d). If forward voltage is applied such that the band is " uncrossed," i.e., the edge of the conduction band is exactly opposite the top of the valence band, there are no available states opposite filled states. Thus at this point the tunneling current can no longer flow. With still further increases of the voltage the normal thermal current will flow, Fig. 6(e), and will increase exponentially with the applied voltage. One thus expects that as the forward voltage increases, the tunneling current increases from zero to a maximum I P and then decreases to zero when V = V n + V p where V is the applied forward voltage, V„ the amount of degeneracy on the «-side (V n = (E Fn — E c )/q), and V p is the amount of degeneracy on the/? side (V p = (E v — E Fp )/q) as shown in Fig. 7. It is the decreasing portion after the peak current that gives rise to the negative resist- ance region. The tunneling process can be either direct or indirect. Figure 8(a) shows direct tunneling where the E-k relationships at the classical turning points are 160 Tunnel Diode and Backward Diode (a) DIRECT TUNNELING U min = k max ) (b) INDIRECT TUNNELING (k min \k max ) Fig. 8 (a) Direct tunneling process with E-k relationship at the classical turning points (— x x and x 2 ) superimposed on the E-x relationship of the tunnel junction. (b) Indirect tunneling process where k min ^ k max . 3 Tunneling Processes 161 superimposed on the E-x relationship of the tunnel junction. The electrons can tunnel from the vicinity of the minimum of the conduction-band energy- momentum surface to a corresponding value of momentum in the vicinity of the valence-band maximum of the energy-momentum surface. For direct tunneling to occur, the conduction-band minimum and the valence-band maximum must have the same momentum. This condition can be fulfilled by semiconductors such as GaAs and GaSb that have a direct band gap. This condition can also be fulfilled by semiconductors with indirect band gap (such as Ge) when the applied voltage is sufficiently large that the valence-band maximum (T point) 8 is in line with the indirect conduction-band minimum (T point). For indirect tunneling, the conduction-band minimum does not occur at the same momentum as the valence band maximum, Fig. 8(b). In order to conserve momentum, the difference in momentum between the con- duction-band minimum and the valence-band maximum must be supplied by scattering agents such as phonons or impurities. For phonon-assisted tunnel- ing, it is required that both the energy and the momentum should be conser- ved ; i.e., the sum of the phonon energy and the initial electron energy tunneling from the n to the p side is equal to the final electron energy after it has tunneled to the p side; and the sum of the initial electron momentum and the phonon momentum (hk p ) is equal to the final electron momentum after it has tunneled. In general the probability for indirect tunneling is much lower than the probability for direct tunneling when direct tunneling is possible. Also, indirect tunneling involving several phonons has a much lower probability than that with only a single phonon. (2) Tunneling Probability and Tunneling Current When the electric field in a semiconductor is sufficiently high (of the order of 10 6 V/cm), there is a finite probability of quantum tunneling or direct excita- tion of electrons from the valence band into the conduction band. The tunneling probability, T t , can be given by the WKB approximation (Wentzel- Kramers-Brillouin method): 9 r,^exp[-2j* \k(x)\ dx Xl (4) where |A:(jc)| is the absolute value of the wave vector of the carrier in the barrier; —x t and x 2 are the classical turning points as shown in Figs. 7 and 8. The tunneling of an electron through a forbidden band is formally the same as a particle tunneling through a barrier. At the present time the detailed form of the potential barrier for an electron in the forbidden gap is not known. Nevertheless it will be shown that the tunneling exponent is not very sensitive to the choice of the potential barriers. 162 Tunnel Diode and Backward Diode POTENTIAL ENERGY (PE) POTENTIAL ENERGY (PE) Fig. 9 (a) Triangular potential barrier. (b) Parabolic potential barrier. We shall consider two special potential barriers, namely the triangular and the parabolic barriers as shown in Fig. 9(a) and 9(b) respectively. For the triangular barrier the wave vector is given by 12m* , 2m* (E (!-«*) (5) h 2 v y V h where PE is the potential energy, E the incoming electron energy, E g the band 3 Tunneling Processes 163 gap of the semiconductor, and $ the electric field. Substitution of Eq. (5) into Eq. (4) yields T r ~exp - Since at and at we have 9 " ^ llm* [E a \ ■ x = x 2 ,l-j- qSx\ = 0; * = -x u l-^-qtfxj =E g T < =exp l — IJM-)' (6) (7) For the parabolic energy barrier, E is defined as the energy measured from the electron energy to the center of the band, and the form of (PE — E) is (EJ2) 2 - E 2 (EJ2) 2 - {qtx) 7 PE _ E = y_jH_l_ g_ = v „ , ^ , (8) This form is also the simplest algebraic function that has the correct behavior at the band edges. 10 The probability is then given by £ » 2/4 7 w ) dx ] _ f ^ r X2 /2m* / r m* 1/2 £ 3/2 r 1 "ll = exp -^-3- (l-y 2 y< 2 dy\\ L 2^/2qh£ J -l ]\y = 2q*xfE, ( nm* ll2 E 3 ' 2 \ = exp — 9 — . \ 2J2aM J (9) 2 s j2qhS ' The above expression is virtually identical to Eq. (7) except for the numerical constant which is 7r/2 x / / 2 = 1.11 for the parabolic barrier, and 4^/2/3 = 1.88 for the triangular barrier. Since the total momentum must be conserved in the tunneling process the transverse momentum must be included in the calculation of the tunneling 164 Tunnel Diode and Backward Diode probability, we divide the total energy into E x and E x where E L is the energy associated with the momentum perpendicular to the direction of tunneling (or the transverse momentum), and E x is the energy associated with momen- tum in the tunneling direction. Then for E ± > as shown in Fig. 9(c) PE-E = E/14 - E 2 + E ± , and the classical turning points are at -x/, x 2 '=+ — JE g 2 l4 + E g E ± . (10) (ID (12) where the first exponent is the same as in Eq. (9), corresponding to the prob- ability of tunneling with zero transverse momentum, and E is given by We obtain from Eqs. (4), (10), and (11) the tunneling probability / nm* 1/2 E g 3/2 \ I 2E ± \ E = „ m *l/2 £ l/2 (13) POTENTIAL ENERGY (PE) (c) Fig. 9 (c) Parabolic potential barrier with transverse energy component E ± . (After Moll, Ref. 12.) 3 Tunneling Processes 165 which is a measure of the significant range of transverse momentum. Thus if £ is very small, only the electron with small transverse momentum can tunnel. In other words, the effect of perpendicular energy is to further reduce the transmission by the factor exp( — 2EJE). Transverse momentum must be conserved in direct tunneling. From the above results it is clear that to obtain large tunneling probability, both the effective mass and the band gap should be small and the electric field should be large. We next consider the tunneling current and shall present the first-order approach using the density of states in the conduction and valence bands. 1 We shall then discuss a more rigorous theory of tunneling 10 in which the momen- tum is conserved. At thermal equilibrium the tunneling current 7 K _ C from the valence band to the empty state of the conduction band and the current I c ^ v from the conduc- tion band to the empty state of the valence band should be detail-balanced. Expressions for I c ^ v an d Iy-^c are formulated as follows: W = A f V F c (E)n c (E)T t {l - F v (E)}n v (E) dE J Ec (14a) I v ^ c = A f V F v (E)n v {E)T t {\ - F c (E)}n c (E) dE (14b) J E C where A is a constant and the tunneling probability T t is assumed to be equal for both directions; F C {E) and F V (E) are the Fermi-Dirac distribution func- tions; n c (E) and n v (E) are the density of states in the conduction band and valence bands respectively. When the junction is biased, the observed current / is given by / = I c ^ v - Iy^ c = A f Vc(£) - F v {E)-]T t n c (E)n v (E) dE. (15) A closed form of the above expression can be obtained under the following assumptions: (1) the tunneling probability is almost a constant in the small voltage range involved, (2) the densities of states in the conduction band and valence band vary as (E — E c ) 1/2 and (E v — E) 1/2 respectively, and (3) both V„ and V p as shown in Fig. 7 are equal or less than 2kT. With the above assumptions, the Fermi-Dirac distributions can be approximated by linear functions of E, i.e., F C (E) ~ \ - (E - E Fn )/4kT, and F V (E) ~ \ + (E Fp ~ E)/ 4kT. Equation (15) can then be expressed as 11 I = A'T t ^{V n + V p -qV) 2 (15a) where A' is a constant, Fis the applied voltage, and V n and V p are respectively the penetrations of Fermi level into the conduction band and valence band. 166 Tunnel Diode and Backward Diode Fig. 10 Comparison of experimental curves and the theoretical results. (After Karlovsky, Ref. 11.) Figure 10 shows a comparison of the experimental curves and the theoretical result calculated from Eq. (15a). The constant in Eq. (15a) is chosen to fit the peak current values. We note that there is reasonable agreement, especially at room and elevated temperatures. It should be pointed out, however, that the above approach does not take into account the conservation of momentum. In addition the expression for the density of states is not exactly correct for degenerate semiconductors as discussed in the previous section. More accurate results are given by Kane 10 for both direct tunneling and phonon-assisted indirect tunneling. For direct tunneling, a simple model of a tunnel diode with constant field in the depletion region is used (Fig. 7). The tunneling probability is given by 3 Tunneling Processes 167 Eq. (12) in which the transverse momentum is included. The incident current per unit area in the energy range dE x dE L is given by: 10 ' 12 aim *m *V /2 dJ *= 2 £h* dExdEx (16) where E = E X + E X , E x = h 2 k x 2 /2m x * (17) By taking m* as isotropic and equal for the n andp sides, and by using Eqs. (12) and (17), we obtain the tunneling current per unit area, /, nm* I 7i-m* 1/2 F 3/2 \ r J t = ^ exp - ,- ' ) LF C (E) - £,(£)]exp(-2£ ± /£) dE dE ± . 2n 2 h 3 \ 2jlqhSl ] (18) We have used Eq. (16) to give E and E L as the variables of integration. The limits of integration are determined by the condition < E L < £ l5 <E ± <E 2 where E t and E 2 are the electron energies measured from the n and p band edges, respectively, as shown in Fig. 7. The limits on E are given by the band edges. The integral over E L can be carried out immediately with the result qm* I nm* ll2 El l2 \(E\^ D = jlF c (E) - F v (£)][l - exp(-2£ s /£)] dE (20) where E s is the smaller of E t and E 2 and £ is given by Eq. (13). The quantity D is an overlap integral which determines the shape of the I-V characteristic. It has the dimensions of energy (in units of eV) and depends on the tempera- ture and the depth of penetration of the Fermi levels into the energy bands qV„ and qV p . At T = 0°K, both E c and F v are step functions, and the quantity D versus forward voltage is shown in Fig. 11 (dotted lines) for the cases V n = V p and V„ = 3V p . The maximum value of D occurs for V = V min if V max > 2V min and for V= (V n + V p )/3 if V max < 2V min where V max and V min refer to the larger and the smaller of V„, V p , respectively. Also shown in Fig. 1 1 are the corresponding results of indirect tunneling (solid lines). For phonon-assisted indirect tunneling the tunneling probability isgivenby 10 - 12 " \-Aj2m* x ll2 (E g -E p f l2 l 168 Tunnel Diode and Backward Diode — DIRECT NDIRECT 0.5- 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 VOLTAGE, V/V n (a) 1 D // \ \ DIRECT / ^ V n =3V n / \ OR \ (V p =3V n ) 0.5 1 1 1 1 1 1 \ \ \ \ \ \ i i — j ^--j 0.4 0.8 1.2 1.6 2.0 2.4 2 8 3 2 3.6 40 V/Vp OR (V/V n ) (b) Fig. 11 Effective density of states "D" vs. forward voltage for direct (dotted lines) and indirect tunneling (solid lines) with £ very large. (a) V n = V p . (b) V n = 3V p (orV p = 3U (After Kane, Ref. 10.) where m* x is the reduced effective mass in the tunneling direction, and E is the phonon energy. The expression for the tunneling current is very similar to Eq. (19) where the maximum in the forward characteristic occurs at v=v n + v p -(v H 2 + v p 2 ) 1 ' 2 . The maximum value of D is <7 3 A™ = j^-2 KK 2 + v 2 f 2 - (v n 3 + F p 3 )]. (22) (23) 4 Excess Current 169 The current-voltage characteristics of phonon-assisted tunneling will be con- sidered in Section 5(2). 4 EXCESS CURRENT From the previous discussion for an ideal tunnel diode, the tunneling current should decrease to zero at biases where V>(V n + V p ). In other words, tunneling of electrons from the conduction band to the valence band in a single energy-conserving transition should then be impossible, and only normal diode current due to the forward injection of minority carriers should flow. In practice, however, the actual current at such biases is considerably in excess of the normal diode current; hence the term, excess current. There are two major components of the excess current: (1) valley current due to band-tail tunneling and (2) exponential excess current due to carrier tunneling by way of energy states within the forbidden gap. Other possible mechanisms leading to excess current such as those due to photon, phonon, or plasmon have been considered and found to be too small to be important. 10 The effect of the density-of-states tails on the current-voltage characteristic of a tunnel junction has been studied by Kane. 7 Figure 12 shows a comparison of the theoretical 7- V curves with and without the band-tail tunneling for a silicon tunnel diode with N A = 2.3 x 10 19 cm -3 and N D = 4.8 x 10 19 cm" 3 . PERFECT CRYSTAL BAND TAIL TUNNELING Fig. 12 Comparison of the theoretical current-voltage characteristics with and without the band-tail tunneling for a Si tunnel diode with N A = 2.3 x 10 19 cm -3 and N D = 4.8 x 10 19 cm -3 . (After Kane, Ref. 7.) 170 Tunnel Diode and Backward Diode We note that for the case of" perfect crystal," i.e., without band-tail tunneling, the tunneling current decreases to zero at about 85 mV. However with band- tail tunneling, the tunneling current extends beyond 200 mV. A comparison between the experimental results 13 and the theoretical curves, using band- edge tail theory 7 is shown in Fig. 13 for three silicon tunnel diodes. For each junction the pairs of curves have been normalized to have the same peak current but the relative magnitudes for the three junctions have no significance. It can be seen that the agreement is very good. The exponential excess current has been derived by Chynoweth et al., 14 with the help of Fig. 14 where some examples of possible tunneling routes are shown. An electron starting at C in the conduction band might tunnel to an EXPERIMENTS THEORY WITH BAND TAIL N D = 1.5 X I0 20 cm 3 100 Fig. 13 Comparison between experimental results and theoretical curves using band-tail tunneling theory for three silicon tunnel diodes. (After Logan and Chynoweth, Ref. 13.) appropriate local level at A from which it could then drop down to the valence band D. Alternatively, the electron could drop down from C to an empty level at B from which it could tunnel to D. A third variant is a route such as CABD, where the electron dissipates its excess energy in a process which could be called impurity band conduction between A and B. A fourth route which should also be included is a staircase from C to D which consists of a series of tunneling transitions between local levels together with a series of vertical steps in which the electron loses energy by transferring from one level to another, a process made possible when the concentration of intermediate levels is sufficiently high. The route CBD can be regarded as the basic 4 Excess Current 171 mechanism, the other routes being simply more complicated modifications. Let the junction be at a bias V, and consider an electron making a tunneling transition from B to D. The energy E x through which it must tunnel is given by E x KE t -qV + q(V H +V p )Kq(V bl -V) (24) where V bi is the built-in potential (assuming that the electron ends up near the top of the valence band). The tunneling probability, T t , for the electron on the level at B can be given by , AJ2m* x l l 2 El l2 \ (25) This expression is the same as Eq. (7) except that E is replaced by E x . The Fig. 14 Band diagram illustrating proposed mechanisms of tunneling via states in the forbidden gap for the excess current flow. (After Chynoweth et al., Ref. 14.) maximum electric field for a step junction is given by £ = 2{V bi -V)IW where W is the depletion layer width given by W 2e s (N A + N D (%£■>*-» 1/2 (26) (27) Let the volume density of the occupied levels at energy E x above the top of the valence band be D x . Then the excess current will be given by (28) 172 Tunnel Diode and Backward Diode where A is a constant and a reasonable assumption is made that the excess current will vary predominantly with the parameters in the exponent of T t rather than with those in the factor D x . Substitution of Eqs. (24) through (27) into (28) yields the expression for the excess current: 14 I x ~ AD X exp{ - a' x lE g - qV + q(V n + F p )]} (29) where a' x is a constant. The above expression predicts that the excess current will increase with the volume density of band-gap levels (through D x ), and also increase exponentially with the applied voltage V (provided E g > qV). For temperatures within a limited range the band gaps of Ge, Si, and GaAs vary linearly with temperature E g (T) = E g (0) - fiT (30) where E g (0) is the extrapolated band gap to 0°K and j8 is the temperature coefficient (refer to Section 3 of Chapter 2). Under the assumption that lE g (T) - qV] > q(V n + V p ), Eq. (29) becomes I x ~ AD X exp{-a;[^(0) - qV] + a' x ^T}- (31) In Eq. (31), the factor a' x involves the effective masses which are found to be only weakly dependent on temperature. Consequently, Eq. (31) predicts a simple temperature dependence for I x proportional to exp(const x T). By contrast injection current varies as exp(qV/kT). Thus, if Eq. (31) applies, a plot of In I x versus T for fixed voltage should be a straight line. Experimental results do confirm these predictions. Figure 15(a) shows the nearly straight line for a typical GaAs tunnel diode. 15 Figure 15(b) shows In I x versus V for the same GaAs diode. The linear relationship is in good agreement with Eq. (29). The above discussion can also be applied to cases where "hump" cur- rent 16-18 or a second negative resistance region exists, Fig. 16(b). Certain chemical impurities or lattice defects can give rise to a narrow band of energies in the band gap as shown in Fig. 16(a). The electrons can tunnel into this band as they can into the route of CAD shown in Fig. 14, and a secondary peak region is seen to result. The location of the second peak indicates the position of the band-gap energy levels. 5 CURRENT-VOLTAGE CHARACTERISTICS DUE TO EFFECTS OF DOPING, TEMPERATURE, ELECTRON BOMBARDMENT, AND PRESSURE In the previous sections we have considered the basic current-voltage characteristics of tunnel diodes. We have concluded that at reverse bias and small forward bias, the current is due to band-to-band tunneling, and the 5 Current-Voltage Characteristics 173 30 20 10 9 8 7 6 5 4 • 1 Y i i i 1 ! 1 '£ GaA s .•^ i i i i ■ 1 1 40 80 120 160 200 240 280 320 360 400 T(°K) (a) 0.6 0.8 V (VOLTS) (b) Fig. 15 (a) Experimental results of excess current vs. temperature of GaAs tunnel diode. (b) Experimental results of excess current vs. forward voltage of the same GaAs tunnel diode as in (a). (After Nanavati and DeAndrade, Ref. 15.) 174 Tunnel Diode and Backward Diode (a) I A (b) Fig. 16 (a) Tunneling into the narrow band of energies in the band gap. (b) Current-voltage characteristic which has a hump current or a second negative resistance region. band-edge tailing effect should be included. The basic expression for the above region is given by Eq. (19). For large forward biases, however, the current is mainly given by the thermal diffusion current, i.e., J ~ J s exp(qV/nkT) where all the symbols have their usual meanings. For forward biases inter- mediate to the tunneling region and the diffusion current region, the dominant current component is the excess current due to tunneling via band-gap states and the basic expression is given by Eq. (29). In this section more detailed considerations will be given to the current-voltage characteristics resulting from the effects of doping concentrations, temperature, electron bombard- ment, and pressure. In addition, the degradation of the I-V characteristics under normal operating conditions will be discussed. In practice, most tunnel diodes are made using one of the following techniques: (1) ball alloy: a small metal alloy pellet containing the counter- dopant of high solid solubility is alloyed to the surface of a mounted semi- conductor substrate (with high doping) in a precisely controlled temperature- time cycle under inert or hydrogen gas, the desired peak current level I p is 5 Current-Voltage Characteristics 175 obtained by an etching process; (2) pulse bond: the contact and the junction are made simultaneously when the junction is pulse-formed between the semiconductor substrate and the metal alloy containing the counterdopant ; (3) planar processes: planar tunnel diode fabrication consists basically of using planar technology including solution growth, diffusion, and controlled alloy. A typical planar Ge tunnel diode configuration 19 is shown in Fig. 17. The structure is designed to be self-supporting (the gold beam leads serve as mechanical support for the diode and also as electrical connections) thereby eliminating the need for a conventional package with its associated parasitic impedance. (1) Doping Effect Because of the requirement of narrow junction width, tunnel diodes as formed by the above techniques have doping profiles which can be approxi- mated as two-sided abrupt junctions. The junction capacitance per unit area, C, according to the equation for an abrupt junction is given by C = qe s N* farad/cm 2 (32) 2(V bi - V) where V bi is the built-in potential and is equal to the voltage intercept, V t , at 600 fJ-m- BEAM-LEAD Sn-As BACK CONTACT (50/im x 75/xm) SiOg (I fim) p + Ge (0.0005-0.0012 O-crn) z Sn-As DIODE (5/im IN DIAMETER) Fig. 17 Planar Ge tunnel diode configuration. The beam leads serve as mechanical support for the diode as well as electrical connections. (After Davis and Gibbons, Ref. 19.) 176 Tunnel Diode and Backward Diode 1/C 2 = of a 1/C 2 versus Fplot, and N* is the effective concentration given by N* = N A N D /(N A + N D ). (33) Typical examples 20 of the 1/C 2 versus voltage plots are shown in Fig. 18. It is clear that the abrupt approximation for tunnel diodes is valid. The average field corresponding to the peak voltage V P for an abrupt junction is given by ' = iV bi - V p )IWk (N*EJ2e s y< 2 (34) where an approximation has been made that q(V bi — V P ) « E g . From Eq. (34) and Eq. (19) it is expected that the peak current I P (or peak current density J P ) should decrease as N* or $ decreases. Figure 19 shows the measured results 21 for Ge tunnel diodes at 4.2°K. The broken line is calculated from Eq. (19). Apparently, the agreement is very good. It should be pointed out, however, that germanium is an indirect semiconductor, the tunneling 1.2 I.I co 1.0 Z => 0.9 >- cr a. 0.8 )- CD 5 0.7 z «■ 0.6 i Id 2 0.5 0.2 0.1 \° \° \o.oo 3 Xi-cr n(Si) \o.oc 7U-cm(Si) 1 o.ooi a- cm(Si) 0.003 5fl-cm(Ge) \ \ 1 ^ \ | I 1\ -0.8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 REVERSE •• FORWARD V( VOLTS) 1.0 Fig. 18 Plots of 1/C 2 vs. voltage for Ge and Si tunnel diodes. (After Chynoweth et al., Ref. 20.) 5 Current- Voltage Characteristics 177 N*(cm 3 ) 0.3 X 10 19 6 XIO (N«) (cm 3/Z ) Fig. 19 Peak current density vs. the effective doping concentration of Ge tunnel diodes at 4.2°K. The broken curve is calculated from Eq. (19). (After Meyerhofer et al., Ref. 21.) takes place between the light-hole band and the <111> condition band minima. Phonon participation or impurity scattering is needed to conserve momentum. It has been found that for As-doped diodes, the phonon-assisted tunneling is not the dominant mechanism. However, whatever process is operative, the variation of J P with N* will be dominated by the tunneling exponential of Eq. (19). The appropriate effective mass is given by 22 m \m* mf h ) (35) 178 Tunnel Diode and Backward Diode for tunneling from the light hole band to the <000> conduction band of germanium where mf h is the light-hole mass (=0.04 m ) and m* is the <000> conduction band mass ( = 0.036 m ). For tunneling in the <100> direction to the <1H> minima, the effective mass is given by / 1 2 \ J_ \3m l * + 3m*) + mt h _ (36) where m t * = 1.6 m and m t * = 0.082 m are the longitudinal and transverse masses of the <111> minima. The exponents in Eq. (19) or Eq. (25) differ, however, only by 5 percent in these two cases. The peak current density can also be plotted as a function of the depletion layer width. Figure 20 shows the averaged value of J P versus H^in Ge tunnel diodes. 19 It is clear that in order to obtain large peak current density, it is required that a very narrow junction width, of the order of 100 A, be used. Also shown in Fig. 20 is the speed index 19 which is defined as the ratio of the peak current to the capacitance at the valley voltage V v . The speed index, which is independent of the junction area, is a figure of merit for tunnel diodes. The switching speed of a tunnel diode is determined by the current available for charging the junction capacity and therefore depends on the amount of current available from the power supply and the average RC product. Since R, the negative resistance of the tunnel diode, is inversely proportional to the peak current, a large speed index, I P /C (or small RC product), is required for o I0 2 Q 10 50 ! Ge : | z ^ JP ; : H^!\ S ■ Ip/C . = z ! 60 70 80 90 JUNCTION WIDTH, W (A) IOO , 4 E = 10 no Fig. 20 Averaged value of peak current density and the speed index (=/ P /C) vs. depletion layer width of Ge tunnel diodes at 300°K. (After Davis and Gibbons, Ref. 19.) 5 Current-Voltage Characteristics 179 10 1 Ip/C y^ x^+W *V 1 ■ i i i 100 1000 B 100 10 Ge (N D = 4.5 X lo' 9 cm 3 ) 8 12 20 N. (X 10 cm ) Fig. 21 Variation of speed index, V P , V v , V PP , and l P /l y vs. />-side concentration of Ge tunnel diodes at 300°K. (After Glicksman and Minton, Ref. 23.) fast switching. One thus must use narrow junction width or large effective concentration in order to obtain large speed index (Fig. 20). Similar results 23 are shown in Fig. 21 where the/?-side concentration is varied from 1 x 10 19 to about 1.5 x 10 20 cm" 3 . We note that, as expected, the speed index, the peak voltage (F P ), the valley voltage (V v ), and V PP all increase with increasing N A or (JV*). The leveling off which occurs at highp-region doping is due to the fact that both I P and C are limited by the less heavily doped «-region. Thus in order to obtain a high speed index it is necessary to increase N D as well as N A . Another important tunnel diode parameter is the peak-current to valley- current ratio, Ipjly , which affects maximum current gain. To maximize current 180 Tunnel Diode and Backward Diode gain, high I P /I V values are required. Figure 21 shows the variation 23 of the ratio as a function of N A . In this particular example a maximum value of 16/1 is obtained at a concentration of 5 x 10 19 cm -3 . It is also seen that the ratio decreases markedly at both lower and higher doping levels. This is because, for lower values of N A , the depletion width is too large for tunneling, and for larger values of N A , the excess current component increases; so does the valley current. A clearer demonstration of the effect of doping on excess current is shown in Fig. 22 where the excess current density, J x , is plotted against the depletion layer width, W, at the valley voltage. 24 We note that the excess current increases with decreasing W. In other words, J x increases with increasing effective doping concentration. The linear relationship obtained between J x and W is in agreement with the conclusion that the excess current is the result of tunneling by way of local energy levels in the forbidden gap. 14 A comparison of the typical current-voltage characteristics of Ge, 21,24 >^ o 50 60 70 80 W (A) 90 100 Fig. 22 Excess current at the valley voltage vs. depletion layer width of Ge tunnel diodes. (After Minton and Glicksman, Ref. 24.) 5 Current- Voltage Characteristics 181 0.5 0.2 0.4 0.6 0.8 FORWARD VOLTAGE (VOLTS) Fig. 23 Typical current-voltage characteristics of Ge, GaSb, and GaAs tunnel diodes at 300°K. The ratio / P // K is 8/1 for Ge and 12/1 for GaSb and GaAs tunnel diodes. GaSb, 25 and GaAs 15 ' 17 ' 26 tunnel diodes at 300°K is shown in Fig. 23. The current ratios of I p /I v are 8/1 for Ge and 12/1 for GaSb and GaAs. Tunnel diodes have been made in many other semiconductors such as Si 26,27,28 with a current ratio of about 4/1 ; InAs 29 with a ratio of 2/1 at room temperature and 10/1 at 4°K (this is because of its small band gap), and InP 17,30 with a ratio of 5/1. The current ratio for a given semiconductor, in general, can be increased by increasing the doping concentrations on both n and p sides. The ultimate limitation on the current ratio depends on (1) the peak current which in turn depends on the effective tunneling mass and the band gap, and (2) the valley current which in turn depends on the distribution and concentration of energy levels in the forbidden gap. The position of the peak voltage 21 as a function of the sum of the Fermi level penetration V n and V p is shown in Fig. 24 for Ge tunnel diodes. We note that the peak voltage shifts toward higher values as the doping increases. This result is in qualitative agreement with both the simple model proposed by Esaki 1 and the tunneling theory by Kane. 10 (2) Temperature Effect Figure 25 shows the percentage change in the peak current with temperature within the range of — 55°C to 150°C for various doping concentrations in Ge tunnel diodes. 24 At concentrations of 1.45 x 10 19 cm -3 , the temperature coefficient is negative over the full range. However, as the doping is increased, 182 Tunnel Diode and Backward Diode I50 1 00 200 300 V n + V p (mV) 400 500 Fig. 24 Variation of peak voltage of Ge tunnel diodes as a function of the sum of V„ and V, (After Meyerhofer et al., Ref. 21.) the temperature coefficient is changed from negative to positive. The negative and positive temperature coefficients of tunnel diodes can be explained by the variation of the factor D and the energy gap, E g , in Eq. (19). At high concen- trations the effect of temperature on the factor D is small, and the negative value of dEJdT is primarily responsible for the change in tunneling probability. -20 +20+40 +60 +-80 +100+120+140 TEMPERATURE (°C) Fig. 25 Percentage change in the peak current with temperature within the range — 55°C to 150°C for various doping concentrations in Ge tunnel diodes. (After Minton and Glicksman, Ref. 24.) 5 Current-Voltage Characteristics 183 As a result, the peak current increases with temperature. In the more lightly doped tunnel diodes, the decrease of D with temperature dominates, and the temperature coefficient is negative. Typical current-voltage characteristics as a function of temperature are shown 2 in Fig. 26. Although the peak current may increase or decrease with temperature as discussed previously, the valley current generally increases with increasing temperature. This is in agreement with Eq. (31) and Fig. 15(a). To show more clearly the variation of the current components as a function of temperature, the forward characteristics of a typical tunnel diode are decomposed into different conduction processes 21 and are shown in Fig. 27. As mentioned in the Introduction, the tunnel diode is a useful device not only for electronic applications but also for the study of fundamental physical parameters. An important example is shown in Fig. 28 for the 7- V character- istics of a Si tunnel diode. 27 As the temperature is reduced to 4.2°K, the curve reveals definitely some fine structure and has two bending points A and B. These bending points actually correspond to phonon-assisted tunneling processes; and the energies (or voltages) at A and B correspond to the acoustic and optical phonons respectively. Similar observations are made in Group III-V semiconductor junctions. Figure 29 shows the plots of the conductance (dIJdV) versus Fat 4.2°K for GaP, InAs, and InSb. 31 The arrows indicate the corresponding optical phonon energies in these semiconductors. The phonon-assisted indirect tunneling can also be studied in more detail Fig. 26 Typical current-voltage characteristics of Ge tunnel diodes as a function of tem- perature. (After Chow, Ref. 2; and Hall, Ref. 48.) 184 Tunnel Diode and Backward Diode 10 e 10" _ 1 1 / 1/ ~- I Ge thermal/current/ - / 7 - 300° K // If - i 195° /J jf //- /I //"*/ : - 1 / / ' / // A. 2° / / // // // 1 l\ 1 \s // / //EXPONENTIAL - y/ EXCESS // CURRENT i \ \ ^ ^^ V ^BAND-T0-8 TUNNEL CUR AND N v /~ RENT / \/ -VALLEY CURRENT - i / \ / 1 400 V(mV) Fig. 27 Forward characteristic of a Ge tunnel diode. The solid lines are measured. The dotted lines are proposed decomposition into conduction processes. The diode is made of an In4% Ga dot alloyed onto As-doped Ge wafer with 1.8 x 10 19 cm -3 . (After Meyerhofer et al., Ref. 21.) by the second-derivative technique. Studies have shown that there are twelve phonon and phonon-combination energies in Si junctions and seven in Ge junctions. 27 " The energies are mostly due to combinations of the transverse acoustic or optical phonons with intervalley scattering phonons and optical phonons of zero wave number. (3) Electron Bombardment, Pressure, and Other Effects Figure 30(a) shows the electron bombardment-induced changes in the 1-V characteristics of a silicon tunnel diode. 32 Curve refers to the junction 5 Current-Voltage Characteristics 185 0.02 0.04 0.06 V (VOLTS) 0.08 0.10 Fig. 28 Current-voltage characteristic of a Si tunnel diode at three temperatures. At 4.2°K the bending points A and B correspond to phonon-assisted tunneling processes. (After Esaki and Miyahara, Ref. 27.) before bombardment, and the other curves show the effects of three successive bombardments with 1-MeV electrons. Figure 30(b) shows the results obtained by interrupting the annealing at 380°C at the times shown. It is seen that the major effect of the bombardment is to increase the excess current, and the increased excess current apparently can be gradually annealed out. The excess current is shown to be a sensitive indicator of the density and distribution of states introduced into the forbidden gap by bombardment. Similar results are expected to be observed for other radiations such as y-ray. 186 Tunnel Diode and Backward Diode V(mv) Fig. 29 Conductance (dl/dV) in arbitrary units vs. voltage for tunnel diodes made from Group lll-V compounds. The arrows indicate positions of optical phonon energies. (After Hall et al., Ref. 31.) Figure 31(a) and (b) show stress effect on the current-voltage characteristics of Ge and Si tunnel diodes respectively. 33 The most noticeable change is the increase of excess current with increasing stress. The changes are found to be reversible. It is suggested that this effect arises from deep-lying energy states associated with the strain-induced lattice defects in the junction region. 33 ' 333 In other words, as the stress increases, more states are introduced in the for- bidden gap. These give rise to larger excess current. In addition the variation of tunnel diode I-V characteristics under hydrostatic pressure can lead to the study of the change of the energy band structure. 34 ' 343 It is observed that the room-temperature peak current of an As-doped Ge tunnel diode annealed at 300°C decreases steadily with increasing annealing time. 35 On the other hand, the room-temperature valley current of the same Ge diode increases steadily with the annealing time. These results are explained by the fact that the impurity arsenic ions diffuse and drift at 300°C, causing the widening of the tunneling junction width which reduces the peak current, and at the same time introduces additional states in the energy gap which increases the valley current. In order to avoid the change of the /- V character- istics, a tunnel diode should be operated below a certain temperature (150°C 5 Current-Voltage Characteristics 187 2.0 1.8 1.4 1.2 < e i.o 0.8 0.6 0.4 0.2 I! Si 0.1 0.2 0.3 0.4 V (VOLTS) (a) 0.6 Fig. 30 (a) Electron bombardment-induced changes in the l-V characteristics of a silicon tunnel diode. Curve O refers to the junction before bombardment. The other curves show the effects of three successive bombardments with 1-MeV electrons. for As-doped Ge diodes) such that the effects of impurity diffusion and drift can be neglected. Permanent degradation of GaAs tunnel diodes is also observed during normal operation at room temperature. 36 This degradation is characterized by a large decrease in peak current and is correlated with a widening of the depletion layer width. Since degradation results when the GaAs diode is operated in the forward region, and since this region can be described by 188 Tunnel Diode and Backward Diode 2.0 1.8 1.6 1.4 1.2 0.8 0.6 0.4 0.2 ■ t = 5 Ml M / /lO n 15/ / 20 30/r lh° Si t = ANN EALINC 3 TIME AT 38C )°C 0.1 0.2 0.3 0.4 0.5 0.6 V(VOLTS) (b) (b) l-V characteristics obtained by interrupting the annealing at 380°C at the time shown. (After Logan et al., Ref. 32.) a recombination current, it is suggested that the hole-electron recombinations may occur at the recombination centers with energies of recombination suffi- cient to cause displacement of zinc ions which subsequently diffuse to the edge of junction giving rise to space-charge widening. 37 It has also been observed that surface effects are responsible for some of the degradation in GaAs and Ge diodes. 38,39 For instance exposure of GaAs diodes to a temperature of 455°C in air for two minutes produces drastic degradation. The original 5 Current-Voltage Characteristics 189 (a) Fig. 31 Stress effect on the current-voltage characteristics of Ge and Si tunnel diodes. (After Bernard et al., Ref. 33.) 190 Tunnel Diode and Backward Diode characteristics can be restored, however, by deep etching or by cleaving off the exposed surfaces. Hence the degradation is attributed to the diffusion of oxygen into the surface of the junction, resulting in band bending and a lowering of the junction barrier at the exposed edges of the junction. It is also suggested that the diffusion and drift of impurities with large diffusion coefficients such as Cu and Li may also cause permanent degradation of the GaAs tunnel diodes. 6 EQUIVALENT CIRCUIT The symbol 40 of a tunnel diode is shown in Fig. 32(a), and the basic equivalent circuit is shown in Fig. 32(b) which consists of four elements : the series inductance L s , the series resistance R s , the diode capacitance C, and the negative diode resistance — R. The series resistance R s includes the lead resistance, the ohmic contacts, and the spreading resistance in the wafer which is given by pjld where p is the resistivity of the semiconductor and d is the diameter of the diode area. The (a) SYMBOL OF TUNNEL DIODE LEAD AND CONTACT ■-S "s TUNNEL DIODE (b) EQUIVALENT CIRCUIT Fig. 32 (a) Symbol of tunnel diode (b) Equivalent circuit of tunnel diode. (Ref. 40.) 6 Equivalent Circuit 191 series inductance L s in a coaxial cavity is given by 41 r 2. 303^ / r 2 L S = __,„_> (37) where ^ is the permeability of the medium, / is the length, and r t and r 2 are the inner and outer radii of the coaxial-line respectively. For the planar tunnel diode shown in Fig. 17, the small size of the unit allows the circuit parasitic series inductance to be reduced. We shall see that these parasitic elements establish important limits on the performance of the tunnel diode. To consider the diode capacitance and negative resistance, we refer to Fig. 33 where a typical current-voltage characteristic of a GaAs tunnel diode is shown in (a). The differential resistance which is defined as (dI/dV)~ x is plotted in Fig. 33(b). The value of the negative resistance at the inflection point, which is the minimum negative resistance in the region, is designated by ^min • This resistance can be approximated by *min ~ 2V P /I P (38) where V P and I P are the peak voltage and peak current respectively, and the above relationship has been used in defining the speed index as shown in Fig. 20 and 21. Also shown in Fig. 33(c) is the conductance plot, (dl/dV) versus V. At the peak and valley voltages, the conductance becomes zero; the diode capacitance is usually measured at the valley voltage, and is designated byC,-. The input impedance Z in of the equivalent circuit of Fig. 32 is given by ^IM R s + 1 + (coRCy +j -(OCR 2 coL s + 1 + (coRC)\ (39) From Eq. (39) we see that the resistive (real) part of the impedance will be zero at a certain frequency, and the reactive (imaginary) part of the impedance will also be at a second frequency. We denote these frequencies by the resistive cutoff frequency/,, and the reactive cutoff frequency/, respectively; these frequencies are given by ^^Wlr 1 ' (40) f ^J_ M i_ Jx 2n\jL s C (RC) 2 ' (41) For cutoff frequencies specified at the minimum resistance and valley 192 Tunnel Diode and Backward Diode 20r(Ip) (c) CONDUCTANCE 0.4 0.6 V (VOLTS) Fig. 33 (a) Current-voltage characteristics of a typical GaAs tunnel diode at 300°K. (b) Differential resistance (d//dV) _1 vs. voltage. R min is the minimum resistance. R neg is the resistance corresponding to the minimum noise figure. (c) Differential conductance, G= (dljdV), vs. voltage. At peak and valley currents, G = 0. capacitance, we have JrO — JxO — ~ 1 R n 2R m in Cj V Ri ~1>/, 2n^L s Cj (R min Cjy <f x (42) (43) 7 Backward Diode 193 where/ r0 is the maximum resistive cutoff frequency, at which the diode will no longer exhibit negative resistance; and f x0 is the minimum reactive cutoff frequency or the self-resonant frequency, at which the reactance of diode is zero and at which the diode would oscillate if/ r0 >f x0 . In most applications where the diode is operated into the negative resistance region, it is desirable to havef x0 >f r0 and/ r0 >f , the operating frequency. It can be shown from Eqs. (42) and (43) that in order to fulfill the requirement that/ x0 >/ r0 , the series inductance L s must be lowered. In addition to the cutoff frequencies we will consider one more important quantity associated with the equivalent circuit, the noise figure which is defined as NF^l+^fWU (44) where \RI\ min is the minimum value of the negative resistance-current product on the current-voltage characteristic. The corresponding value of R (designa- ted by R neg ) is shown in Fig. 33. The product q\RI\ m J2kT is called the noise constant K and is a material constant. Typical values of Kat room temperature are 1.2 for Ge, 2.4 for GaAs, and 0.9 for GaSb. The GaSb tunnel diode has the lowest noise figure (or the most quiet performance) because of its small effective mass (0.047 m compared with 0.082 m for Ge) and its small energy gap (0.67 eV compared with 1.43 eV for GaAs). 7 BACKWARD DIODE In connection with the tunnel diode, when the doping concentrations on the p and n sides of a p-n junction are nearly or not quite degenerate, the current in the " reverse " direction for small bias, as shown in Fig. 34, is larger than the current in the "forward" direction— hence, the name "backward diode." The energy band diagram of the backward diode is shown in Fig. 35 where at thermal equilibrium, Fig. 35(a), the Fermi level is very close to the band edges. When a small reverse bias (p side negative with respect to n side) is applied, electrons can readily tunnel from the valence band into the conduction band and give rise to a tunneling current given by Eq. (19) which can be written in the form J^A t exp( + \V\/A 2 ) (45) where A t and A 2 are positive quantities and are slowly varying functions of the applied voltage V. Equation (45) indicates that the reverse current increases approximately exponentially with the voltage. 194 Tunnel Diode and Backward Diode BACKWARD DIODE WITH NEGATIVE RESISTANCE (b) BACKWARD DIODE WITHOUT NEGATIVE RESISTANCE Fig. 34 Current-voltage characteristic of backward diode (a) with negative resistance and (b) without negative resistance. The backward diode can be used for rectification of small signals, and for microwave detection and mixing. Similar to the tunnel diode, the backward diode has a good frequency response because there is no minority carrier storage effect. In addition, the current-voltage characteristic is insensitive to temperature and to radiation effect; and the backward diode has very low \\f noise. 42-44 For nonlinear applications such as high-speed switching, a device figure of merit is y, the ratio of the second derivative to the first derivation of the current-voltage characteristic. It is also referred to as the curvature coeffi- cient: 45 7 Backward Diode 195 (a) THERMAL EQUILIBRIUM (BACKWARD DIODE) Fig. 35 Energy band diagram of backward diode (a) at thermal equilibrium and (b) with reverse bias. y = xmm (46) The value of y is a measure of the degree of nonlinearity normalized to the operating admittance level. For a forward-biased p-n junction or a Schottky barrier (refer to Chapter 8) the value of y is simply given by q/nkT. Thus y varies inversely as T and at room temperature, the value of y for an ideal p-n junction (« = 1) is about 40 V~ l independent of bias. For a reverse-biased p-n junction, however, the value of y is very small at low voltages and increases linearly with the avalanche multiplication factor near breakdown voltage. Although the ideal reverse breakdown characteristic would give a value of y greater than 40 V~\ because of the statistical distribution of impurities and the effect of space-charge resistance much lower values of y are expected. 46 196 Tunnel Diode and Backward Diode For a backward diode the value of y can be obtained from Eqs. (7), (15a) and (26); and is given by 47 y(for V = 0) = h - / s » where m* is the average effective mass of the carriers [m* ca m e *m h */(m e * + ra A *)], (47) > 100 .• • 50 o — "»^_ ^">* 20 THEORY T O • EXPERIMENTS 10 J .. 1 1 I 10 2 N D OR N A (cm" 3 ) (a) 50 ~ 40 > 30 ( 20 -40 40 T (°C) (b) 80 Fig. 36 (a) Curvature coefficient at room temperature for V on vs. acceptor concentration in Ge (for a fixed N D = 2 x10 19 cm -3 ) or donor concentration (for a fixed N A — 10 19 cm -3 ). Solid lines are computed results. Data points are from experiment measures. (b) Curvature coefficient vs. temperature. Solid line and data points are computed and measured respectively. (After Karlovsky, Ref. 47.) References 197 and N* is the effective doping concentration given by Eq. (33). It is clear that the curvature coefficient y depends upon the impurity concentrations on both sides of the junction and the effective masses. It is also expected that in contrast to Schottky barriers, the value of y is relatively insensitive to temperature variation since the parameters in Eq. (47) are slowly varying func- tions of temperature. Figure 36 shows a comparison between theoretical and experimental values of y for Ge backward diodes. The solid lines are computed from Eq. (47) using m* = 0.22 m and m h * = 0.39 m . The agreement is generally good over the doping range considered. We also note that there are two interesting features of y for backward diodes : (1) y can exceed 40 V~ l , and (2) it is insensi- tive to temperature variation. REFERENCES I. L. Esaki, "New Phenomenon in Narrow Germanium p-n Junctions," Phys Rev 109, 603 (1958). 2. For a general discussion, see W. F. Chow, Principles of Tunnel Diode Circuits, John Wiley and Sons, Inc., New York (1964). 3. K. K. Thornber, Thomas C. McGill, and C. A. Mead, "The Tunneling Time of an Electron," J. Appl. Phys., 38, 2384 (1967). 4. T. P. Brody, "Nature of the Valley Current in Tunnel Diodes," J. Appl Phys 33 100 (1962). ' 5. J. I. Pankove, "Influence of Degeneracy on Recombination Radiation in Germanium," Phys. Rev. Letters, 4, 20 (1960) ; and " Optical Absorption by Degenerate Germanium'" Phys. Rev. Letters, 4, 454 (1960). 6. G. D. Mahan and J. W. Conley, "The Density of State in Metal-Semiconductor Tunneling," Appl. Phys. Letters, 11, 29 (1967). 7. E. O. Kane, "Thomas-Fermi Approach to Impure Semiconductor Band Structure " Phys. Rev., 131, 79 (1963). 8. J. V. Morgan and E. O. Kane, "Observation of Direct Tunneling in Germanium," Phys. Rev. Letters, 3, 466 (1959). 9. L. D. Landau and E. M. Lifshitz, Quantum Mechanics, Ch. VII, p. 174 Addison- Wesley Book Co., 1958. 9a. R. H. Fowler and L. Nordheim, "Electron Emission in Intense Electric Fields," Proc. Roy. Soc. (London), 119, 173 (1928). 10. E. O. Kane, "Theory of Tunneling," J. Appl. Phys., 32, 83 (1961); and also "Tunneling in InSb," Phys. Chem. Solids, 2, 181 (1960). 11. J. Karlovsky, "Simple Method for Calculating the Tunneling Current of an Esaki Diode," Phys. Rev., 127, 419 (1962). 12. J. L. Moll, Physics of Semiconductors, Ch. 12, p. 252, McGraw-Hill Book Co. (1964). 198 Tunnel Diode and Backward Diode 12a. L. V. Keldysh, "Behavior of Non-Metallic Crystals in Strong Electric Fields," Soviet J. Exptl. Theoret. Phys., 6, 763 (1958). 13. R. A. Logan and A. G. Chynoweth, "Effect of Degenerate Semiconductor Band Structure on Current-Voltage Characteristics of Silicon Tunnel Diodes," Phys. Rev., 131, 89 (1963). 14. A. G. Chynoweth, W. L. Feldmann, and R. A. Logan, "Excess Tunnel Current in Silicon Esaki Junctions," Phys. Rev., 121, 684 (1961). 15. R. P. Nanavati and C. A. Morato De Andrade, "Excess Current in Gallium Arsenide Tunnel Diodes," Proc. IEEE, 52, 869 (1964). 16. R. S. Claassen, "Excess and Hump Current in Esaki Diodes, " J. Appl. Phys., 32, 2372 (1961). 17. N. Holonyak, Jr., "Evidence of States in the Forbidden Gap of Degenerate GaAs and InP — Secondary Tunnel Current and Negative Resistance," J. Appl. Phys., 31, 130 (1960). 18. A. S. Epstein and J. F. Caldwell, "Lithium-Doped GaAs Tunnel Diodes," J. Appl. Phys., 35, 3050 (1964). 19. R. E. Davis and G. Gibbons, "Design Principles and Construction of Planar Ge Esaki Diodes," Solid-State Electron., 10, 461 (1967). 20. A. G. Chynoweth, W. L. Feldmann, C. A. Lee, R. A. Logan, G. L. Pearson, and P. Aigrain, " Internal Field Emission at Narrow Silicon and Germanium p-n Junctions," Phys. Rev., 118, 425 (1960). 21. D. Meyerhofer, G. A. Brown, and H. S. Sommers, Jr., "Degenerate Germanium I, Tunnel, Excess, and Thermal Current in Tunnel Diodes," Phys. Rev., 126, 1329 (1962). 22. P. N. Butcher, K. F. Hulme, and J. R. Morgan, "Dependence of Peak Current Density on Acceptor Concentration in Germanium Tunnel Diodes," Solid-State Electron., 3, 358 (1962). 23. R. Glicksman and R. M. Minton, "The Effect of /(-Region Carrier Concentration on the Electric Characteristics of Germanium Epitaxial Tunnel Diodes," Solid-State Electron., 8, 517 (1965). 24. R. M. Minton and R. Glicksman, "Theoretical and Experimental Analysis of Ger- manium Tunnel Diode Characteristics," Solid-State Electron., 7, 491 (1964). 25. W. N. Carr, "Reversible Degradation Effects in GaSb Tunnel Diodes," Solid-State Electron., 5, 261 (1962). 26. N. Holonyak, Jr., and I. A. Lesk, "GaAs Tunnel Diodes," Proc. IRE, 48, 1405 (1960). 27. L. Esaki and Y. Miyahara, "A New Device Using the Tunneling Process in Narrow p-n Junctions," Solid-State Electron., 1, 13 (1960). 27a. A. G. Chynoweth, R. A. Logan, and D. E. Thomas, "Phonon-Assisted Tunneling in Silicon and Germanium Esaki Junctions," Phys. Rev., 125, 877 (1962). 28. V. M. Franks, K. F. Hulme, and J. R. Morgan, "An Alloy Process for Making High Current Density Silicon Tunnel Diode Junctions," Solid-State Electron., 8, 343 (1965). 29. H. P. Kleinknecht, "Indium Arsenide Tunnel Diodes," Solid-State Electron., 2, 133 (1961). References 199 30. C. A. Burrus, "Indium Phosphide Esaki Diodes," Solid-State Electron., 3, 357 (1962). 31. R. N. Hall, J. H. Racette, and H. Ehrenreich, "Direct Observation of Polarons and Phonons During Tunneling In Group 3-5 Semiconductor Junctions," Phys. Rev. Letters, 4, 456 (1960). 32. R. A. Logan, W. M. Augustyniak, and J. F. Gilbert, "Electron Bombardment Damage in Silicon Esaki Diodes," J. Appl. Phys., 32, 1201 (1961). 33. W. Bernard, W. Rindner, and H. Roth, "Anisotropic Stress Effect on the Excess Current in Tunnel Diodes," J. Appl. Phys., 35, 1860 (1964). 33a. B. Bazin, "Pressure Effects on Silicon Tunnel Diode," J. Phys. Chem. Solids, 26, 2075 (1965). 34. H. Fritzsche and J. J. Tiemann, "Effect of Elastic Strain on Interband Tunneling in Sb-doped Germanium," Phys. Rev., 130, 617 (1963). 34a. For a general discussion of pressure effect of solids, see W. Paul and D. M. Warschauer, Ed., Solids Under Pressure, McGraw-Hill Book Co. Inc., New York (1963). 35. J. H. Buckingham, K. F. Hulme, and J. R. Morgan, "Impurity Diffusion and Drift in Germanium Tunnel-Diode Junctions," Solid-State Electron., 6, 233 (1963). 36. R. D. Gold and L. R. Weisberg, "Permanent Degradation of GaAs Tunnel Diodes," Solid-State Electron., 7, 811 (1964). 37. A. S. Epstein and J. F. Caldwell, "Degradation in Zn-doped GaAs Tunnel Diodes," J. Appl. Phys., 35, 2481 (1964). 38. H. Kessler and N. N. Winogradoff, "Surface Aspects of the Thermal Degradation of GaAs/>-« Junction Lasers and Tunnel Diodes," IEEE Trans. Electron Devices, ED-13, 688 (1966). 39. J. E. Alberghini and R. M. Brondy, "Surface Excess Conductance in Ge Tunnel Junction via Surface States," Appl. Phys. Letters, 9, 362 (1966). 40. "Standards on Definitions, Symbols, and Methods of Test for Semiconductor Tunnel (Esaki) Diodes and Backward Diodes," IEEE Trans. Electron Devices, 12, 374(1965). 41. W. B. Hauer, "Definition and Determination of the Series Inductance of Tunnel Diodes," IRE Trans, on Electron Devices, 8, 470 (1961). 42. H. V. Shurmer, "Backward Diodes As Microwave Detectors," Proc. Inst. Elec. Eng., London, 111, 1511 (1964). 43. S. T. Eng, "Low-Noise Properties of Microwave Backward Diodes," IRE Trans on MTT, 8, 419 (1961). 44. J. B. Hopkins, "Alloyed InAs Microwave Backward Diodes," IEEE International Solid State Device Conference, Paper 13.5, Washington, D.C. (Nov. 1967). 45. H. C. Torrey and C. A. Whitmer, Crystal Rectifiers, Ch. 8, McGraw-Hill Book Co (1948). 46. S. M. Sze and R. M. Ryder, "The Nonlinearity of the Reverse Current-Voltage Characteristics of a p-n Junction Near Avalanche Breakdown," Bell Syst. Tech J ¥5,1135(1967). 47. J. Karlovsky, "The Curvature Coefficient of Germanium Tunnel and Backward Diodes," Solid-State Electron., 10, 1109 (1967). 48. R. N. Hall, "Tunnel Diodes," IRE Trans. Electron Devices, ED-7, 1 (1960). INTRODUCTION STATIC CHARACTERISTICS BASIC DYNAMIC CHARACTERISTICS GENERALIZED SMALL-SIGNAL ANALYSIS LARGE-SIGNAL ANALYSIS NOISE EXPERIMENTS 5 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) I INTRODUCTION IMPATT stands for /MPact ionization Avalanche Transit Time. IMPATT diodes employ impact-ionization and transit-time properties of semiconductor structures to produce negative resistance at microwave frequencies. A p-n junction can be operated in its IMPATT mode when it is biased into reverse avalanche breakdown and mounted in a microwave cavity. At the present time, the IMPATT diode is one of the most powerful solid-state sources of microwave power. The negative resistance arising from transit time in semiconductor diodes was first considered by Shockley. 1 In 1958 Read 2 proposed a high-frequency semiconductor diode consisting of an avalanche region at one end of a relatively high resistance region serving the transit-time drift space for the generated charge carriers (i.e., p + nin + or n + pip + ). The first IMPATT opera- tion 3 as reported by Johnston, DeLoach, and Cohen in 1965, however, was obtained from a simple p-n junction. Three weeks later the first Read IMPATT diode was reported by Lee et al. 4 This indicates that besides the particular doping profile proposed by Read there are broad classes of structures which also possess negative resistance due to their IMPATT properties. From the small-signal theory developed by Misawa 5 it is confirmed that a negative 200 1 Introduction 201 resistance of the IMPATT nature can be possessed by a junction diode with any doping profile. As the name implies, the operation of IMPATT diodes involves interaction between two physical phenomena— impact ionization and the transit time of charge carriers. From the small-signal point of view, when a differential voltage is applied to an avalanching diode, an increase in differential current results. The current is out of phase with the voltage by two effects: (1) After the voltage increment is applied, the carrier population builds up toward a new level with a delay time x A characteristic of the avalanche. (2) The effect on the external terminals, i.e., the terminal current, is further delayed because of the " transit time " x t during which the carriers are collected by the electrodes. When the total delay in the current exceeds a quarter cycle, the in-phase component of the current becomes negative; that is, a negative conductance exists, and in an appropriate circuit the device may therefore oscillate spontaneously. Misawa 5 has considered the case of the "uniformly avalanching" diode with thickness Wand area A, in which impact ionization produces carriers at a uniform rate throughout the active region. Such a diode can be represented by an equivalent circuit consisting of its passive capacitance C = e s A/Win shunt with an electronic admittance Y= G +jB. Both G and B are negative and proportional to the current density J . Therefore the electronic inductive susceptance B resonates with the capacitance C at a frequency which increases proportionally to JT . Thus the characteristic frequency of the avalanche increases as ^JJ . A similar expression has been obtained by Gilden and Hines. 10 Many IMPATT diodes consist of an avalanching region appended to a drift region where the field is low enough that the carriers pass through it without avalanching. The drift region then produces a current delay equal to some fraction, frequently about one-half, of the transit-time across it. The interaction of the transit-time delay with the avalanche delay produces rather complicated behavior which will be described in detail below. The small-signal point of view therefore explains qualitatively that IMPATT diodes oscillate because of the avalanche and transit-time delays. Small- signal analysis is a good qualitative guide to the impedance characteristics of the device; but to calculate large-signal properties, such as power output and efficiency, small-signal analysis is inadequate and should be supplemented by large-signal studies. We shall first consider in Section 2 the static characteristics of the IMPATT diode family including simple p-n junctions, the p-i-n diode, and the Read diode. Section 3 presents the basic dynamic characteristics of an IMPATT diode. The generalized small-signal analysis is considered in Section 4. The 202 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) large-signal operations such as the power-frequency limitation and efficiency are discussed in Section 5. Section 6 considers the noise performance. Finally, the experiments and typical results of the IMPATT diodes are presented in Section 7. 2 STATIC CHARACTERISTICS The basic members of the IMPATT diode family are the Read diode, the one-sided abrupt p-n junction, the linearly graded p-n junction, and the p-i-n diode. We shall now consider their static characteristics such as the field distribu- tion, the breakdown voltage, and the space-charge effect. Figure 1 shows the doping profile, the electric field distribution, and the ionization integrand at breakdown condition for an idealized Read diode (p + nin + or its dual n + pip + ). The ionization integrand is given by w H <a> = a„ exp - (a„ - a.) dx' (1) where a„ and a p are the ionization rates of electrons and holes, respectively, and W is the depletion width. The avalanche breakdown condition as discussed in Chapter 3 is given by r w <a>dx = l. (2) J o Because of the strong dependence of a's on an electric field, we note that the "avalanche region" is highly localized, i.e., most of the multiplication pro- cesses occur in a narrow region near the highest field between < x < x A where x A is defined as the width of the avalanche region (to be discussed later). The voltage drop across the avalanche region is called V A . It will be shown that both x A and V A have profound effect on the optimum current density and the maximum efficiency of an IMPATT diode. The layer outside the avalanche region (x A < x < W) is called the drift region. The corresponding results for a typical one-sided abrupt p-n junction are shown in Fig. 2. Again we notice the highly localized avalanche region. Figure 3 shows the results for a linearly graded silicon p-n junction. The avalanche region is located near the center of the depletion layer. The slight asymmetry of the integrand, <a>, with respect to the location of the maximum field is because of the large difference between a„ and oc p in Si. If a„ ~ a p as in the case of Ge and GaAs, <a> reduces to <a> = a„ = a (3) 2 Static Characteristics 203 READ DIODE p + n i(OR v) n + 5X10" 5 4 > ; 2 I _x 6 E o - 4 12 3 AREA =/<£dx = V B = 60V ^^^.y<a>dx = l ^ (a) x(^m) (b) (c) Fig. 1 Read diode (a) doping profile (p + n/n+), (b) electric field distribution, and (c) ionization integrand at avalanche breakdown. and the avalanche region is symmetrical with respect to x = 0. As shown in Fig. 3 the avalanche region of a linearly graded junction, however, is wider than that of a one-sided abrupt junction having the same breakdown voltage. Figure 4 shows the results for a p-i-n diode which has a uniform field across 204 Impact- Avalanche Transit-Time Diodes (IMPATT Diodes) ABRUPT p-n JUNCTION p + n n + (a] x(/zm) 1 2 3 8 > r 6 o X 4 E \+— — -/ <a> dx = l 72 a //S^ _ 1 1 1 (O Fig. 2 One-sided abrupt p-n junction (a) doping profile (p + n), (b) electric field, and (c) ionization integrand at breakdown. the intrinsic layer. The avalanche region in this case corresponds to the full intrinsic layer width. (1) Breakdown Voltages The breakdown voltages of the abrupt and the linearly graded p-n junc- tions 6 have been considered in Chapter 3. We can use the same method as 2 Static Characteristics 205 2 6 x E 4 a 2 LINEARLY-GRADED p-n JUNCTION p + p n n + " 1 5 £4 J/AVZ^K X IW^^zhs AREA =/«dx-v B > W^i^Mk = I6.4V 1 ^ilif 1 KYs MMm>^ 1 :q) x(/im) (b) -0.3 -0.2 -0.1 0.1 0.2 0.3 -_/"<a>dx = l (C) -0.2 -0.1 0.1 0.2 Fig. 3 Linearly graded p-n junction (a) doping profile (with gradient a), (b) electric field, and (c) ionization integrand at breakdown. outlined in that chapter to calculate the breakdown voltages of the Read diode and the p-i-n diode. The most important parameters for a Read diode, Fig. 1(a), are (1) N u the impurity concentration in the «-region, (2) b, the width of the n region, and (3) (W - b), the width of the intrinsic region. This impurity distribution yields two special cases for large and small values of b as follows: (1) as b -» 0, it represents a p-i-n diode with an intrinsic width of W; 206 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) p-i-n DIODE p+ i n+ jt4- E o > 2\- Ge AREA =y£dx = V o =50V- (a) x(M m ) (b) (c) Fig. 4 p-i-n diode (a) doping profile {p-i-n), (b) electric field, and (c) ionization integrand at breakdown. (2) for b > W(Ni), where W(N t ) is the depletion layer width at breakdown for ap + n abrupt junction with impurity concentration N t , it represents an abrupt junction with uniform background impurity density. For the intermediate values of b (the Read diode), the field profile as shown in Fig. 1(b) is given by 00 = * m - qN t x 0<x<b (4a) 2 Static Characteristics 207 (*) = *n qN x b qN 2 (x — b) b<x<W (4b) where S m is the maximum field which occurs at x = 0. The calculated breakdown voltages for Ge and Si p + nin + structures as a function of b (the width of the «-type region) are shown in Figs. 5 and 6 respectively. 7 At the far left where b -> 0, we show the depletion width (W) and the corresponding breakdown voltage of the p-i-n diode. For example, V is 150 V for a Ge p-i-n diode with 10 /mi intrinsic width and is about 20 volts for 1 jum. For intermediate values of b the distribution is of the type proposed by Read, and the breakdown voltage for a given set of W and N t decreases as b increases. For example, with W = 10 pm and N t = 5 x 10 15 cm -3 , V B is 100 volts for a Ge p + nin + diode with b = 2.5 jim. The dotted line indicates the limit at which the values of b are exactly equal to the depletion layer width W(Ni). For larger values of b the breakdown voltage is independent of b and — p-i 1000 READ DIODE -^ _ / ~r 1 / / 7 ~~ " / f \ 4 f 10 5 \ -s^ / 1 \ v r- :--=A- — v ■' Kr r - V^ r /. > \ x\ s \ £_ (IO lb ^ \ v ^ f 5) ~N 4 ^ i , 1 \ 11 X ^ • • in '6 -±- 7" N|= I0 l7 cm 3 s A ' 1000 100 0.2 b(/iml Fig. 5 Breakdown voltage versus b (the width of the n-region) for Ge Read and p-i-n diodes. The total depletion width W is a parameter. (After Gibbons and Sze, Ref. 7.) 208 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) READ DIODE — — Si - - -■ -■ -■- / ?*- — y- + — io lb /' 100 v N - 5XI0 15 -\ -^ 4L --- I0 15 : "N V -I- / — \\ <f s X > .' N, =5XI0 l6 cm" 3 10 ,' 1 1000 b(/zm) Fig. 6 Breakdown voltage versus b for Si Read and p-i-n diodes. The total depletion width W is a parameter (Ref. 7.) is equal to that of the corresponding p + n diode with the same doping N i (see Chapter 3). The maximum field of a Read diode (with a given N t ) is found to be essen- tially the same (within 1 percent) as the value of the one-sided abrupt junction with the same N u provided that the avalanche region x A is smaller than b. The idealized multiple layer structure with impurity discontinuities between layers can be approached by the present fabrication techniques such as epitaxial growth or alloying. For diffused diodes, however, the impurity gradient may not be negligible. We shall consider two cases, as shown in the insert of Fig. 7, where, in case (1), the impurity concentration in the n region is linearly graded from the metallurgical junction to the intrinsic layer and, in case (2), it is uniformly close to the metallurgical junction but tails off in a linear fashion to the intrinsic layer. Also shown in this figure for comparison 33 is purposes is the idealized case already discussed. The electric field profile shown in Fig. 7 for each case. For case (1) we first calculate numerically the breakdown field for a one-sided linearly graded junction as a function of the impurity gradient, a, for both Ge and Si. The results are shown in Fig. 8. As in the idealized Read structure, the maximum field at breakdown for the one- sided linearly graded junction can be used for the structure with the doping profile of case (1) with an error of less than 1 percent. Since we know the maximum field (at the metallurgical junction when the diode is biased into 2 Static Characteristics 209 si READ DIODE p + + n ,.J6 -3> *K (10 cm ) \ \ VA \ \ \ \ (3) 10 \\ \\ (!0 ,3 cm" 3 ) '\ & 2 10 DISTANCE (fim) JUNCTION (I) a= 5 X 10 cm" (2) a=l0 cm" (3) a — »-co V(I) = 209V V(2) = 206V V(3H40V 4 6 DISTANCE (pi Fig. 7 Graphical approach to obtain breakdown voltage for diodes with impurity gradient (Ref. 7.) f / 5 • breakdown), the field profile through the structure is given by qN t x qax 2 (x) = + 2s. < x < b W. (5a) (5b) 210 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) > 6 IMPURITY GRADIENT (ATOMS/cm 4 ) 20 21 22 10 10 10 ON E-SIDED LINEARLY GRADED JUNCTION E-SIDED ABRUPT JUNCTION y -' s .< Si . — ' .-" ■'^ , — ■ ..-— Ge -r 10 10 |0 IMPURITY CONC. (ATOMS/cm 3 ) Fig. 8 Maximum field at breakdown condition for one-sided abrupt and one-sided linearly graded Ge and Si p-n junctions. (Ref. 7.) The breakdown voltage can then be calculated graphically. Similarly a graphical method can be used to determine V B in case (2). The values of V B for each of the three structures are indicated in Fig. 7. Clearly cases (1) and (3) produce upper and lower bounds for V B for all intermediate structures such as case (2). (2) Avalanche Region and Drift Region The avalanche region of an ideal p-i-n diode is the full intrinsic layer width. For the Read diode and p-n junctions, however, the region of carrier multipli- cation is restricted to a narrow region close to the metallurgical junction. The contribution to the integral in Eq. (2) decreases rapidly as x departs from the metallurgical junction. Thus a reasonable definition of the avalanche region width, x A , is obtained by taking the distance over which 95 percent of the contribution to the integral is obtained, i.e., <a> dx = 0.95 (6) 2 Static Characteristics for the Read diodes and abrupt p-n junctions, and **a/2 j <a> dx = 0.95 211 (7) -x A /2 for the linearly graded junctions when the diodes are biased into breakdown. Figure 9 shows a plot of x A versus b for Si diodes with N t = 10 16 cm -3 and W=2, 5, and 10 fim. For abrupt junctions (b = 2.8 /mi) the width of the avalanche region x A is ~0.9 fim while for small values of b, x A ~ W (corre- sponding to the p-i-n diode). For intermediate values of b, x A is essentially constant and equal to the value of an abrupt junction. Corresponding values for the electric field (S D ) in the intrinsic region are shown in Fig 9: since ^D — ^m — ^i^/ e s» $d increases as b decreases. It is seen from Fig. 9 that £ 4. s (N,«I0 I6 C m ) W= 10/j.m >\ 1 \ 1 5 ^ 2 \ VW. p-i-n | , ABRUPT JUNCTION *i r _^ <5„X l0" 5 (V/cm) , D I i i I Z.O 1.2 0.4 b (fj.m) Fig. 9 Avalanche region width (x A ) versus b for Si diodes with A^ = 10 16 cm" 3 and VV= 2, 5, and 10 /xm. (Ref. 7.) 212 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) x A for the Read diode does not vary by more than a few percent from the abrupt junction value up to fields of ~2 x 10 5 F/cm. This essentially covers the design range for Si Read diodes, and we can thus conclude that the width of the avalanche region in a Read diode is determined only by the value of N t and is equal to the value obtained for an abrupt junction with doping density N t . A similar result is obtained for the voltage drop, V A , across the avalanche region. Figure 10 shows plots of avalanche width and voltage drop across the avalanche region for Ge and Si as a function of JVj. These curves apply to both the abrupt junction and the Read structure. For the linearly graded junction the avalanche region is slightly larger (~ 10%) than for the one-sided abrupt 100 V X X X \ s X X ■^ V v A (Si) X X X X X ' s X v V.(Ge) X H X •- v. X X x_ V "X V, ■"• S \ -> \ X x A (si) x A (GeN ' N,( ATOMS /cm- Fig. 10 Avalanche width (x A ) and voltage drop (V,,) across the avalanche region for Ge and Si diodes as a function of the n-type doping density (Nx). These curves apply to both abrupt and Read diodes. (Ref. 7.) 2 Static Characteristics 213 junction with the same breakdown voltage V B . This is because, for a given V B , the maximum field of a linearly graded junction is smaller. This in turn gives a lower ionization rate. To accommodate an equal amount of multiplication, a wider avalanche region is thus required. The drift region is the depletion layer excluding the avalanche region, or x A < x < W. The most important parameter in the drift region is the carrier drift velocity. To obtain minimum carrier transit time across the drift region, the electric field in this region should be high enough that the generated carriers can travel at their scattering-limited velocities, v sl . For silicon the electric field should be larger than 10 4 V/cm (see Chapter 2). For p-i-n diodes this requirement is fulfilled automatically, since at break- down the field (which is approximately constant over the full intrinsic width) is much larger than the required field for velocity saturation. For a Read diode the minimumfieldinthedriftregionisgivenby<f min = S m -q[N t b + N 2 (W ~b)]/s s from Eq. (4b). From the previous discussion it is clear that one can so design a diode that <f min > 10 4 V/cm. For abrupt and linearly graded p-n junctions there are always some regions with fields smaller than the minimum required field. The low-field region, however, constitutes only a small percent of the total depletion region. For example, for a Si p + n junction with 10 16 cm -3 back- ground doping, the maximum field at breakdown is 4 x 10 5 V/cm. The ratio of the low-field region (for a field less than 10 4 V/cm) to the total depletion layer is 10 4 /(4 x 10 5 ) = 2.5 percent. Thus the low-field region has negligible effect on the reduction of the carrier transit time across the depletion layer. (3) Temperature and Space-Charge Effects The breakdown voltages shown in Figs. 5 and 6 (and also in Chapter 3 for p-n junctions) are the results for room temperature under isothermal condi- tions and free from space-charge effects. Under operating condition, however, the IMPATT diode is biased well into avalanche breakdown and the current density is usually very high. This results in a considerable rise in the tempera- ture of the junction and a large space-charge effect. The ionization rates of electrons and holes decrease with increasing tem- perature; 8 thus for an IMPATT diode with a given doping profile the break- down voltage will increase with increasing temperature. As the dc power (product of reverse voltage and reverse current) increases, both the junction temperature and the breakdown voltage increase. Eventually the diode fails to operate, mainly because of permanent damage that results from excessive heating in localized spots. Thus the rising temperature of the junction imposes a severe limit on device operation. To prevent the rise in temperature, one must use a suitable heat sink. This will be considered in the final section of this chapter. 214 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) The space-charge effect is the variation of electric field in the depletion region due to generated carrier space charge. This effect gives rise to a positive dc incremental resistance for abrupt junctions and a negative dc incremental resistance for p-i-n diodes. Consider first a one-sided p + nn + abrupt junction. The depletion layer extends through the n region with a doping of N D , and is bounded by the planes at x = and x = W. When the applied voltage V is equal to the break- down voltage V B , the electric field ${x) has its maximum absolute value, S m , at x = 0. If we assume that the electrons travel at their scattering- limited velocity v sl all across W, the space-charge current, /, is given by I=v slP A (8) where p is the carrier-charge density and A the area. The disturbance A$(x) in the electric field due to the space charge is obtained from Eq. (8) and Poisson's equation: 9 A*(x)^-^-. (9) A& s V sl If we assume that all the carriers are generated within the avalanche width x A , the disturbance in voltage caused by the carriers in the drift region ( W — x A ) is obtained by integrating A$(x) : w ~** Ix T (W-x A ) 2 dx = I—— . (10) As s v sl 2As s v sl The total applied voltage is thus V=V B + AV B =V B + IR SC (11) where R sc is defined as the space-charge resistance and is obtained from Eqs. (10) and (11): RscS ^J^t. (12) For wide depletion width and high current density the space-charge effect may give rise to large AV B . For example, in a Si p + n diode with iV D = 10 15 cm -3 and v4 = 5xl0 -4 cm 2 , the depletion-layer width at breakdown is 18 pm. and x A is about 6 jum (Fig. 10). The space-charge resistance is determined from Eq. (12) to be about 140 ohms. The value of AV B for a current density of 1000 amp/cm 2 (/ = 0.5 amp) is 70 V which amounts to about a 20-percent increase over the breakdown voltage. For a. p-i-n diode the situation is different from that of a p + n junction (refer to Section 7 of Chapter 3) ; when the applied reverse voltage is just large enough AF *4 3 Basic Dynamic Characteristics 215 to cause avalanche breakdown, the reverse current is small. The space- charge effect can be neglected and the electric field is essentially uniform across the depletion layer (assuming a„ = a p as in Ge diodes). As the current increases, more electrons are injected from the p-i boundary and more holes are injected from the n-i boundary. These space charges will cause a reduction of the field S t in the center of the / region. At breakdown the maximum fields which occur at the boundaries are essentially fixed. Thus as the current increases, S t decreases, and the voltage which equals JJf $ dx is thus reduced. This results in a negative incremental resistance for the p-i-n diode. 3 BASIC DYNAMIC CHARACTERISTICS In this section we shall present the basic small-signal analysis of the Read diode to illustrate the physical significance of the avalanche-multiplication and the transit-time effects. This analysis was first considered by Read 2 and devel- oped further by Gilden and Hines. 10 For simplicity it is assumed that a„ = a p = a, and that the scattering-limited drift velocities of holes and elec- trons are equal. Figure 11(a) shows the model of a Read diode. According to the discussion in Section 2, we have divided the diode into three regions: (1) the avalanche region which is assumed to be thin so that space-charge and signal delay can be neglected ; (2) the drift region where no carriers are gener- ated, and all carriers entering from the avalanche region travel at their scatter- ing-limited velocities; and (3) an inactive region which adds undesirable parasitic resistance. The two active regions interact with one another, since the ac electric field is continuous across the boundary between them. We shall use a zero sub- script to indicate dc quantities, and tilda (~) to indicate small-signal ac quantities. For quantities including both dc and ac components, no zero subscript or tilda will be added. We first define J A as the avalanche current density which is the alternating conduction (particle) current density in the avalanche region, and J as the total alternating current density. With our assumption of a thin avalanche region, J A is presumed to enter the drift region without delay. With the assumption of a saturated drift velocity v sl , the alternating conduction current density J c (x) in the drift region propagates as an unattenuated wave (with only phase change) at this drift velocity, J c {x) = J A e- i(OXlVsl = yJe~ J(OX/Vsl (13) where y = J A /J is the complex fraction relating the avalanche current density to the total alternating current density. 216 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) AVALANCHE REGION (a) — I- J Ad (b) SPACE -CHARGE WAVE (W r ) A/W — o (c) Fig. 11 (a) Model of Read diode with avalanche region, drift region, and inactive region. (b) Equivalent circuit of the avalanche region. (c) Equivalent circuit of Read diode for small transit angle. At any cross section, the total alternating current density J is equal to the sum of the conduction current density J c and the displacement current density J d , and this sum is a constant, independent of position x: J = j c (x) + J d (x)*f(x). (14) 3 Basic Dynamic Characteristics 217 t + R AND + X -R AND -X INDUCTIVE- ^"'yJo =RESONANT FREQUENCY CAPACITIVE (d) Real and imaginary parts of the impedance versus frequency. w r is the resonant angular frequency. (After Gilden and Hines, Ref. 10.) The displacement current density is related to the ac field i{x) by J d =jcoe s I(x). (15) Combination of Eqs. (13) through (15) yields an expression for the ac electric field in the drift region as a function of x and J, .(1 -y e - Jaxlv ' 1 ) {x) = J J(oe s (16) Integration of i(x) gives the voltage across the drift region in terms of J. The coefficient y is derived in the analysis below. (1) Avalanche Region Consider the avalanche region first. 10 Under the dc condition, the direct current density / (= / + J n0 ) is related to the thermally generated reverse saturation current density J s (= J ns +J ps ) by — = 1 — <a> dx. (17) At breakdown, J approaches infinity and J^ <a> dx=l.ln the dc case the ionization integral cannot be greater than unity. This is not necessarily so for a rapidly varying field. The differential equation for the current as a function of 218 Impact- Avalanche Transit-Time Diodes (IMPATT Diodes) time will now be derived. Under the conditions that (1) electrons and holes have equal ionization rates and equal scattering-limited velocities, and (2) the drift current components are much larger than the diffusion component, the basic device equations, in the one-dimensional case, can be given as follows : 08 q a~ = ~ ( N » ~ N * + P ~ n ) Poisson's Equation (18) J n = Qv sl n J P = qv sl p j = j„ + j p j > Current Density Equations, (19) dn 1 dJ n . \ = _ + av (n + p ) (2 0a) dt q ox j v J ) Continuity Equations. ^__i"? + „,(„ + ,) (20b) dt q ox J The second terms on the right-hand side of Eq. (20) correspond to the generation rate of the electron-hole pairs by avalanche multiplication. This is so large compared to the rate of thermal generation that the latter can be neglected. Addition of Eqs. (20a) and (20b), using Eq. (19), and integration from x = to x = x A gives dJ c XA T A ~=-(J p -J n )o A + 2J j adx (21) where x A = x A /v sl is the transit time across the multiplication region. The boundary conditions are that the electron current at x = consists entirely of the reverse saturation current J ns . Thus at x = 0, J p — J n = —2J n + J = — 2J ns + J. At x = x A the hole current consists of the reverse saturation current J ps generated in the space-charge region, so J p — J„ = 2J p — J= 2J ps —J. With these boundary conditions Eq. (21) becomes (22) In the dc case J is the direct current J , so that Eq. (22) reduces to Eq. (17). We will simplify Eq. (22) by substituting a in place of a, where a is an aver- age value of a obtained by evaluating the integral over the extent of the ava- lanche region. We obtain (by neglecting the term J s ) dJ 2J ,_ ^ = -(«*.-!)• (23) dJ 2J a dx — 1 - J 2J* dt x A + — *A 3 Basic Dynamic Characteristics The small-signal assumptions are now made : 219 Zoi m a = a + die-"" 1 <*. a + a'6 A e J otx A = 1 + x A a'I A e }(0t J=J +J A e^ = <^n +< ,jwf (24) where a' = 5a/5# and the substitution a = a'«f A has been employed. Substitu- tion of the above expressions into Eq. (23), neglecting products of higher-order terms, leads to the expression for the ac component of the avalanche conduc- tion current density J a = 2a'x A J i A J(or A The displacement current in the avalanche region is given by JAd=J°>£ s £ A - (25) (26) These are the two components of the total circuit current in the avalanche region. For a given field the avalanche current J A is reactive and varies inversely with co as in an inductor. The other is also reactive and varies directly with co as in a capacitor. Thus the avalanche region behaves as an LC parallel circuit. The equivalent circuit is shown in Fig. 1 1(b) where the inductance and capacitance are given as (where A is the diode area) : L A = t: a /2J a' A Ca = E s A/x A . The resonant frequency of this combination is given by 1 2n 2n The impedance of the avalanche region has the simple form 2a'v sl J Z, = The factor y has the form x A 1 1 JaC A 1 ja>e s A co r 2 ^ 2 or co r 2 2 CO 2 (27) (28) (29) s {a 1 CO to, (30) 220 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) A thin avalanche region, therefore, behaves as an antiresonant circuit with a resonant frequency proportional to the square root of the direct current density J , Eq. (28). (2) Drift Region and Total Impedance Substitution of y in Eq. (30) into Eq. (16) and integration over the drift length {W — x A ) give an expression for the ac voltage across this region, f,_ (W- Xj dJ y d — : JQXs i — = CO. 4 where 9 d is the transit angle of the drift space _ co(W - x A ) _ 9,= = cox d and 1a = (W - x A ) (31) (32) (32a) We may also define C d = AeJ(W-x A ) as the capacitance of the drift region. From Eq. (31) we obtain the impedance for the drift region, 1 JA coC, h( 1 — cos 9, 1 ^ e, CO, + coC A -1 + 1 /sin 9 d \ co 2 \ >9 d ) co/ = R+jX (ohms) (33) where R and A' are the resistance and reactance respectively. It is obvious that the real part (resistance) will be negative for all frequencies above co r except for nulls at 9 d = 2n x integer. The resistance is positive for frequencies below co r and approaches a finite value at zero frequency: R(co^0) = £ r = (W - X * )2 (ohms). 2C d 2As s v sl The low-frequency small-signal resistance is a consequence of the space- charge in the finite thickness of the drift region, and the above expression is identical to Eq. (12) derived previously. 4 Generalized Small-Signal Analysis 221 The total impedance is the sum of the impedances of the avalanche region, the drift region, and the passive resistance R s of the inactive region: Z = (w~x A y ^Ae s v sl 1 - CO 1 — cos d 0/ + R< 0)/ + coC, /si PSH- sin A + W-x A \ 1 _^L 2 CO II (ohms). (35) Equation (35), which is given by Gilden and Hines, 10 has been cast in a form which can be simplified directly for the case of small transit angle 9 d . For d < 7i/4, Eq. (35) reduces to Z = (w - x A y 2Av xl e, <-a + R x + ~ 1 coC co, 2 CO - 1 (36) where C = e s A/W corresponding to the total depletion capacitance. From the above equation we note that the first term is the active resistance which becomes negative for co > co r . The third term is reactive and corresponds to a parallel resonant circuit which includes the diode capacitance and a shunt inductor. The reactance is inductive for co < co r and capacitive for co > co r . In other words, the resistance becomes negative at the frequency where the reactive component changes sign. It is interesting to note that large negative resistance can be obtained when the transit angle 6 d is substantially less than n. The equivalent circuit and the frequency dependence of the real and imaginary parts of the impedance are shown in Figs. 11(c) and (d) respectively. 4 GENERALIZED SMALL-SIGNAL ANALYSIS In this section we shall first define some quantities pertinent to the dynamic operation of a general IMPATT diode. The elementary small-signal solutions of a p-i-n diode will then be considered. The characteristics of a general IMPATT diode are analyzed with the help of the elementary solutions. 222 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) (1) Dynamic Quantities (A) Transit Time (t) and Transit Angle (0): t = W/v sl (37) e = ajWlv sl = o)x (38) where Wis the total depletion layer width, and v sl the scattering-limited drift velocity. For a given angular frequency a>, the transit angle increases with increasing width. For a given width the transit angle will also increase with increasing frequency. (B) AC Impedance (Z) and Admittance (7): 1 1 V Z = R+ jX = = - = ^r- (39) J G+jB Y J A J where V and J are the total ac voltage and total current density (particle current and displacement current) respectively, and A is the device area. (C) Resonant Frequency (/ r = cojln): f r is the frequency at which the imaginary part (8) of the admittance changes from inductive to capacitive. For a Read diode,/ r is given previously in Eq. (28) as (2a'v sl Jj£ s ) 1/2 /2n. This relationship will be shown to be valid even for a general IMPATT diode. (D) Cutoff Frequency (f c = co c 12k): f c is the minimum frequency at which the real part (G) of the admittance changes from positive to negative. For a Read diode, f c is exactly equal to f r . For a general IMPATT diode it will be shown, however, that f c is lower than f r and that, as the avalanche width increases, the difference becomes larger. (E) Quality Factor Q and Growth Factor g: The small-signal quality factor Q is defined 5 as the time average of the ac field energy, <£■>, divided by the ac power dissipation, (dEJdty, per cycle, or dt If the conductance is negative, then Q is negative. The factor Q gives informa- tion about threshold and the buildup rate of oscillation when the negative resistance is used as an oscillator. A smaller magnitude of negative Q is preferable. The growth factor g is related to Q and is defined as 9=--^- (41) y 2Q 4 Generalized Small-Signal Analysis 223 (F) Optimum Frequency (/ opt ): For a given bias current the optimum frequency is defined as the frequency at which the quality factor \Q\ takes the smallest magnitude. (2) Elementary Solutions The basic device equations (18) through (20) can be written as 3 -f = - (N D + -N A -) + —(J p - J„), (42) OX E s V sl E s 1 8J n SJ ^7 = ^~ + <J n + J P ), (43) v sl ot ox - d ^=-^ + a(J n + J p ). (44) v sl ot ox With small-signal assumptions similar to those made in Eq. (24) such that the zero subscripts indicate time-independent steady-state (dc) solutions, and the tilda indicates small ac signals, the time-dependent parts of the system of equations, Eqs. (42) through (44), are di -1 . Tx = 7V- (Jp - J " ) (45) cx & s V st dJ„ „ ~ /ft) ~ -^ = +a (J„ +J p ) + a'g(J no + J p0 ) - — J„ (46) ox v si -^ = -a (J„ + J p ) - a'i{J no + J po ) + J —J P (47) where a' = da/dS*. Substitution of Eq. (47) into Eq. (46) and combination of the resultant equation with Eq. (45) yield one solution of the above equations : J n + J P + Jwe s $ ' = J = constant, (48) which is actually the required condition that the total alternating current is equal to the sum of the conduction current and the displacement current. Differentiation of Eq. (45) with respect to x and substitution of Eqs. (46) and (47) yield the second-order differential equation : / ?^7_ in-, \ (49) When the ac electric field is constant over the whole depletion region (as for a p-i-n diode), a is independent of x, and the above equation has constant d 2 I rco 2 2a'7 j2cc of « ~A 2a o jco — + .(. S = J\ — - EsVsi ox [v;i v s i e* v sl J \v s i£ s 224 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) coefficients. The solution is simply i = cy + C 2 <T "" + V e ' V " z *•"'•' J (50) where C x and C 2 are integration constants to be determined by the boundary conditions and the complex wave number k is given by /co 2 2a'J /2a co\ 1/2 fe = b--r-T £ + -r £ - • ( 51 ) 2a 7'co The voltage is obtained by integrating the field K(jc) ^\ idx = ^- (e jkx -\)- < ^l( e - jkx -\) + 2^1 e * v *' ' Jx. (52) J o JK jk k 2 Since in breakdown $ a dx = 1, it follows that a = 1/W. From Eqs. (50) and (45) through (47) the alternating current densities are given as 5 J, J^fitk- %e*--*£L ( k + » )c 2 e-*- - "•- J. (53) y p . - !h± L + » ) Cl ^ + *=£(*- » )c 2 e-*. - -?^- J. (54) 2 \ v*i/ 2 \ t> s/ / & e s t> 5 , The currents and field consist of three components; two propagate in the positive and negative x directions with increasing amplitude in the direction of propagation, the third component is a constant. When Q and C 2 are deter- mined from the boundary conditions, the small-signal impedance is then given by 1 V(W) The calculated values of a' = dcc/d£ are plotted in Fig. 12 as a function of a. We note that a' increases as a increases; and at any given field, larger a corresponds to larger a'. Figure 13 shows a typical result 5 of the impedance as a function of frequency for a p-i-n diode with W= 5 /mi, sje = 12, and v sl = 8.5 x 10 6 cm/sec. The impedances are normalized to W 2 v sl js s = 2.77 x 10~ 2 ohm-cm 2 , and the frequency is normalized to vJ2nW = 2.71 GHz. The three sets of curves correspond to three different direct bias cur- rents. The real part shown is all negative. Its magnitude, increased rapidly from low frequency, has a maximum value at the resonant frequency f r , and 4 Generalized Small-Signal Analysis 225 - - Ge (ELECTRON) v _ Ge (HOLE) \^^ ^ GaAs // .s^ss ^^GaP - A /\S Si (HOLE) 1 1 Si (ELECTRON) 1 III i 1 1. 1 10 IONIZATION RATE (cm"') Fig. 12 a'= da/dS" versus the ionization coefficient a for Ge, Si, GaAs, and GaP. (After Misawa, Ref. 11.) then decreases. The reactance is inductive at lower frequencies and changes to capacitive after the resonance. We note that the resonant frequency increases approximately proportionally to the square root of the direct bias current. This is in agreement with the results discussed previously in Section 3 for the Read diode. The resistance of a. p-i-n diode, however, is always negative even at zero frequency. This is in contrast to the Read diode whose resistance becomes negative right at the frequency (f r ) where the reactance changes sign. (3) General Solutions To analyze a general IMPATT diode, we consider the multiple-uniform- layer model proposed by Misawa. 11 This model consists in dividing the entire depletion region into several successive layers having constant avalanche multiplication (including zero multiplication) in each layer, and in connecting the analytical solutions for the individual layers having proper boundary conditions. In the previous studies we have considered two limiting cases: the Read diode and the p-i-n diode. In the Read diode the avalanche region is 226 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) 0.1 I NORMALIZED FREQUENCY Fig. 13 Normalized small-signal impedance versus normalized frequency for a p-i-n diode with W=5 /xm. L = inductive, C = capacitive. (After Misawa, Ref. 5.) so narrow that the phase shift of the signal within the region is neglected ; in the p-i-n diode there is no avalanche-free drift region. By the use of the multiple-uniform-layer model we can investigate the intermediate case be- tween the two limiting cases. An intermediate case is shown in Fig. 14 where region 1 having width W^czxa) is approximated by a constant ionization coefficient <a>, and region 4 Generalized Small-Signal Analysis 227 2 with width W 2 has zero multiplication. In region 1 the solutions are the same as given by Eqs. (50) through (54). In region, 2, where a = a' = 0, the wave number k is a real number and equal to co/v sl . Equations (50) through (54) reduce to i= c 1 e Jaxlv « + C 2 e~ jl0x,Vs ' + Jcos s y — LJL ( e J«>x/v s i _ l) _ jco jco J n =-ja>e s C 2 e- J » x ^ 1 , J p = -ja>B- a C 1 e ime ' v ". The waves now have constant amplitude. * Cf, ''( g -A«/..._l)- + j5L JOiS s (56) (57) (58) (59) p + v,.- " ■'■■■', n + ■J <a>dx = l W, (a) 2 a = ■W, W (b) MULTIPLE-LAYER MODEL Fig. 14 Multiple-uniform-layer model. Region 1 is the avalanche region. Region 2 is the drift region. 228 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) The above elemental solutions can be matched at the boundaries. For the case shown in Fig. 14, at x = 0, J„(1) = 0; at x = W u J„(l) = J„(2), J p (l) = J p (2) = 0, since there is no hole current in region 2. From these condi- tions the constants Q's and C 2 's can be determined, and the small-signal admittance can be obtained from Eq. (55). Figures 15(a) and (b) show the real and imaginary parts, respectively, of the admittance of a diode with 10% avalanche region (approximately a Read diode) for five bias currents. The admittance is normalized to v s1 eJW 2 which is equal to 10.76 mho/cm 2 for a diode with W = 10 /im, v sl = 10 7 cm/sec, and e s /e =12 (corresponding to silicon). The normalizing current J X is given by (n 2 e s v sl /2a'W 2 ) so that for J/J t = l, the resonant frequency co r = (2a'v sl JjE s ) 1/2 = v sl n/W, and 9 = n. We note that, as expected, both the real and imaginary parts of the admittance for J = J v change their sign near 9 — n. The slightly larger transit angle at G = is due to the effect of phase shift in the avalanche region. At / = 4/ 1; the transit angle 9 = 2n. From Eq. (35) the real part is zero (assuming R s = 0) and the imaginary part can be approxima- ted by a capacitance with width ( W— x A ). These are in good agreement with the results shown in Fig. 15. Figure 16 shows the admittance presented in a dif- ferent fashion 12 where more realistic values (a„ # a p ) are used in the calcula- tion. We note that the general behavior of the admittance is similar to that of Fig. 15. Figure 17 shows the admittance 11 of six IMPATT diodes with identical total depletion-layer widths but different avalanche region widths (W 1 /W = 1/10, 1/3, 1/2, 2/3, 9/10, 1). The current density is J t as given previously. As the avalanche region widens, the negative resistance band also widens. This happens because the avalanche region, which possesses a negative resistance over a wide frequency band, occupies a larger and larger fraction of the depletion layer. The cutoff frequency f c decreases as the avalanche region widens. In Fig. 18(a) the cutoff frequency and the resonant frequency are plotted as a function of the bias current for the above six diodes. Both frequencies vary approximately as the square root of the bias current. These frequencies are replotted in Fig. 18(b) as a function of the avalanche region width (WJ W). For a given current the resonant frequency decreases with W x . This is because f r ~ y/a', and for larger avalanche region W x , the average ionization coefficient is smaller «a> = \\W^), which in turn gives smaller a'. The cutoff frequency also decreases with increasing W t and becomes smaller than the resonant frequency. This is because the power dissipation in the avalanche region is still negative even at very low frequencies. The quality factor Q for the two limiting cases (W\W X = 1/10, 1) is shown in Fig. 18(c). At the smallest bias current, the Q of the 10% unit has the optimum (i.e., minimum negative) value at about 9 = n. As the bias current increases, the optimum frequency increases, and the best Q degrades. 4 Generalized Small-Signal Analysis 229 -4 < -6 -8 8 - 6 - 4 - 2 - 1 1 ! 1 1 | L ' J 1 - /^/l \ 12 j CAP. I J/J, =0.5 1 " I IT .1 1 Vj 27T 1 III INO.I 1 37T 1 TRANSIT ANGLE (RADIANS) (b) Fig. 15 (a) Real part of the admittance of a diode with 10% avalanche region for five bias currents. (b) Imaginary part of the admittance. (After Misawa, Ref. 11.) 230 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) 0.014 r 1 Si READ DIODES -4 2 A= 10 cm 0.012 W = 10/xm b= l^m (CONSTANT FIELD 3.57 X 10 V/cm) of llm 0.010 1 350v 400 (A/cm 2 j^- L 250 \ \ 300* )J .^200 0.006 /^^% --150 ---100 50(A/cm2) 0.004 0.002 rl( 1 /-W 6 Y 1 Js.o (GHZ) 1 J -0.002 -0.006 -0.004 -0.002 G (mhos) 0.002 Fig. 16 Admittance of a silicon diode with 10% avalanche region. The admittance is cal- culated using realistic values (a„^ a p ). Selected frequencies in GHz are marked off on each curve. (After Gummel and Scharfetter, Ref. 12.) Although not shown, as the bias current decreases below JJ2, the optimum frequency decreases and the best Q degrades. Thus the overall best Q for the 10% unit is obtained at about 6 « n. For the 100% unit (p-i-n diode) the quality factor Q can approach very small negative values at high bias currents and small transit angles. The above results can be readily used for other structures with different sizes and parameters. For a set of depletion width 4 Generalized Small-Signal Analysis 231 o - 3 J/J | = 1 - A l/3 \ r SCALE ■* W, _ g W " 3 -1/2 - 9/10 /// / / READ IT 1 1 ll /l/IO / 27T 3tt ' 1 III 1 1 1 01 23456789 10 J/Jl = 1 w, /\ -— 1 = 9/ 10,1 J \ / w/\/iJ\/\o |CAP 1 i i i i IIND. 1 1 2 3 4 5 6 7 TRANSIT ANGLE (RADIANS) Fig. 17 Admittance of six IMPATT diodes with identical total depletion layer width but different avalanche region width. (After Misawa, Ref. 11.) W t , scattering-limited velocity v di , and a/, we can obtain pertinent quantities by some simple multiplication factors. For example, the factor is for frequency, for impedance, and \W f vJ ^l(E±\ 2 ( v Jf\ for current where the subscript /indicates the new (or final) parameter. From the above discussions we can summarize the basic small-signal pro- perties of the IMPATT diodes : (1) under proper biasing conditions junction diodes with various doping and field profiles can give rise to incremental negative resistance, (2) both the cutoff frequency/,, and the resonant frequency/ are propor- tional to the square root of the direct current density, (3) at a given average current density, both/ and/ decrease with increas- ing avalanche region, 232 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) w r -- o— oj c H J/J, = 8 ^ N 4 ^ ^«c - ^S. ^^>aL """"^-T *-^T^ N \ ^^^T^^*--^^^- ^V ' T \ Q5^ ^r§ "-•^ l . \ \ 1 1 1 1 ^ 0.2 0.4 0.6 0.8 FRACTION OF AVALANCHE REGION WIDTH, W,/W (b) Fig. 18 (a) Cutoff frequency and resonant frequency for the six diodes shown in Fig. 17 versus direct current density. (b) Cutoff frequency and resonance frequency versus avalanche region width. Note that when Wx/W = 1 (p-i-n), the cutoff frequency is zero. 4 Generalized Small-Signal Analysis 233 uu W,/ W = 1 (p-i-n) 00 J, = 130 AMPS/cm 2 2 _ I MA\ \o.5 10 - j/vas^^^^^^' _L--~; •'f/// / T\ V 2 f;;;i''-;-_VAc5^^ 7 / / / 4 1 i 1 1 i > 2tt ll 1 37T ll 2 3 4 56789 10 TRANSIT ANGLE (RADIANS) (c) (c) Quality factor Q for two limiting cases (W 1 /W = 1/10, 1). (Ref. 11.) (4) for a given depletion width, as the avalanche region widens, the negative conductance band widens and the values of negative conductance decrease, (5) for a p-i-n diode with uniform avalanche multiplication {WJW= 1) there is no cutoff frequency due to the intrinsic instability of the elec- tron-hole plasma over the entire depletion region, (6) for a Read diode {WJW^ 1/10) the optimum quality factor Q is obtained at a current density such that the frequency is approximately equal to one-half the reciprocal transit time (/ opt ~ 1/2t = v sl /2W, or e = n), (7) for an intermediate case, as when the ratio WJ ^increases, the optimum frequency increases to a maximum value of/= 1/t = vJW (or 6 = 2%) at Wi\W=\ and then decreases to/= 1/2t at WJW= 9/10; the cor- responding average current density at the optimum frequency increases with increasing WJ W, (8) it is required that, for higher frequency oscillation, a narrower depletion layer should be used, 234 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) (9) from the behavior of the small-signal negative Q, it is expected that for low bias currents the oscillation performance improves when the avalanche region becomes relatively narrow, and (10) in materials with larger ionization rate, a negative resistance of a given Q can be obtained at lower direct current density. 5 LARGE-SIGNAL ANALYSIS (1) Power-Frequency Limitation Due to the inherent limitations of semiconductor materials and the attain- able impedance levels in microwave circuitry, the maximum output power at a given frequency of a single solid-state device is limited. The two most import- ant limitations of semiconductor materials are (1) the critical electric field at which the avalanche breakdown occurs and (2) the scattering-limited velocity which corresponds to the maximum attainable velocity in the semiconductor. If we make the simplified assumption that the ionization coefficient is pro- portional to S m where m is a constant, a = a {SIS Q ) m , the breakdown condition is given by •J o L $o - dx = 1 (60) where £(x) is in general a function of x, and the breakdown voltage is given by y B = $£{x) dx. Under the constraint given by Eq. (60) the maximum value of V B is obtained when £{x) = constant = S c . Thus under avalanche limitation the maximum voltage that can be applied across a semiconductor sample is given by V m = S c W = a - 1 'V H' (1 - 1 '" ) , (61) and S c = oio llm S W- xlm . (61a) We next consider the maximum current that can be carried by the semi- conductor sample. The basic limitation comes from the fact that the current in the space-charge region causes an increase of the electric field (from Poisson's equation), and the maximum increase in the field is again limited by the avalanche breakdown process. From Eq. (9), assuming A*?(W) « <? c , we obtain <M,p 8 iA (62) W ' 5 Large-Signal Analysis 235 The optimistic upper limit on the ac power deliverable to the carriers within the length of semiconductor W is given by the product of V m and I m from Eqs. (61) and (62) : P m =V m I m = £ c 2 e s v sl A. (63) If the semiconductor is swept free of mobile charges and has ohmic contacts at both ends, it has a capacity given by C = s s A/ W. We define a transit time x of carriers across Was t = W/v sl , and further label /= l/lnx, as a character- istic cutoff frequency of the device. Equation (63) can be rewritten as where X c is the reactance l/2nfC. Equation (64) is obtained by DeLoach 13 based on a generalization of the Early- Johnson approach. 14,15 If we assume from skin-effect considerations that the impedance level varies as the square root of frequency in a practical microwave circuit, from Eq. (64) we observe that the maximum power attainable is limited by the material parameters of the semiconductor and varies approximately as/ -2 . (2) Fundamental IMPATT Mode For efficient operation of a Read diode, as carriers move through the drift region, we require the generation of as large a charge pulse, Q m , as possible in the avalanche region without a reduction of the electric field in the drift region below that required for velocity saturation. The motion of Q m through the drift region results in an ac voltage amplitude about one-half the average voltage, V D , developed across the drift region. At the optimum frequency (v sl /2W) the motion of Q m also results in an alternating particle current which is 180° out of phase with the ac voltage across the diode. The average of the particle current is the average current J . The particle current swing is therefore at most from zero to 2J . For a square wave of particle current, and a sinusoidal variation of drift voltage, both with magnitude and phase as described above, the microwave power generating efficiency, rj, is 16 m) ac power output dc power input J (V A + V D ) 1 Vn n(V A +V D ) (65) where V A is the dc voltage drop across the avalanche region, and the sum of V A and V D is the total applied dc voltage. The ac power contribution from the 236 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) avalanche region is neglected. This is because the avalanche region voltage is inductively reactive relative to the particle current. The displacement current is capacitively reactive relative to the diode voltage and therefore contributes no average ac power. It is clear from Eq. (65) that to improve the efficiency one must reduce V A . At the limit that V A <^ V D , the efficiency is 1/tt or 30%. For a practical Read diode under the condition that the operating frequency is approximately equal to the resonant frequency (this is the optimum condition from small-signal analysis), it is found that the ratio V A to V D is given by 16 V A — kcc„x a I3 (66) with the breakdown condition in the avalanche region f a H e- ( - s »- s * ix dx = l (67) •'o where a„ is the average electron ionization rates in the avalanche region. For Ge and GaAs or other semiconductors with nearly equal ionization coeffi- cients oc n x A = 1, V A /V D = 1/3, and the efficiency from Eq. (65) is about 23 %. For Si, however, the ionization rate of electrons is about 10 times larger than that of holes, the product ot n x A is about 3, thus VJV D « 1, and the efficiency is about 15 % which is a factor 2 lower than the efficiency of an idealized Read diode. Because of the complication of the system of equations, Eqs. (18) through (20), under large-signal operation with realistic semiconductor parameters, the numerical approach is generally used for large-signal analysis. Basically, the approach is to obtain self-consistent numerical solutions for the equations describing carrier transport, carrier generation, and space charge balance in a given semiconductor device structure. The solutions describe the evolution in time of the diode and its associated resonant circuit. For a silicon Read diode of p + nvn + with N t ^ 10 16 cm -3 , b = 1 jan, N 2 = 10 15 cm -3 , and W ~ 6 /mi (see Fig. 1), the computed results 16 by Scharfetter and Gummel are shown in Fig. 19 for four cases at approximately 1/4-cycle intervals. The electric field, the hole density, and the electron density are shown as functions of the distance over the depletion region. A phase plot of the terminal current and voltage of the oscillation is included. We note that (1) the generation of pulses of holes and electrons begins when the voltage is maximum and a quarter of a cycle later the charge pulses are fully formed and begin drifting into their respective drift spaces, (2) the holes disappear quickly from the active region while the electrons drift for approximately a half cycle and constitute positive particle current while the ac voltage is negative, (3) for the 5 Large-Signal Analysis 237 Fig. 19 Computed results for fundamental IMPATT mode. Four cases are shown at £-cycle intervals. A phase plot of the terminal current and voltage of the oscillation is included in the center insert. (After Scharfetter and Gummel, Ref. 16.) remaining quarter cycle the remnants of the electron charge pulse are swept out of the picture as the voltage again approaches its maximum value, (4) the displacement current is quite large and has an appreciable swing into the forward direction (positive onp + ), while the terminal voltage always remains in the reverse polarity, and (5) for sufficient modulation of diode voltage and particle current to give efficient oscillation, an extended avalanche region is required. In Fig. 19 the direct current density is 1000 amp/cm 2 . For this current density a maximum efficiency of 9 % is obtained at an operating frequency of 13.4 GHz. For a lower current density of 200 amp/cm 2 , a maximum efficiency of 18% is obtained at an operating frequency of 9.6 GHz. The nearly ideal 238 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) phase relations obtained between diode voltage and particle current are illustrated in Fig. 20. In this figure we plot the waveforms in time of the particle current and terminal voltage for an ac steady-state solution at 9.6 GHz and direct current density of 200 amp/cm 2 . The ac voltage amplitude is 17 volts. The waveforms for larger amplitudes are found to be similar. The above results thus are in reasonable agreement with the relatively simple design theory of Eqs. (65) through (67). It is interesting to point out that (1) Eq. (66) is obtained from a combination of small-signal results for the avalanche region and large-signal constraints on the drift region, and (2) a higher efficiency is obtained at lower bias current in agreement with the expected results from small-signal analysis. (3) High-Efficiency IMPATT Mode Under large-signal oscillation conditions the dynamic space-charge effect of generated carriers can give rise to multifrequency large-amplitude terminal waveforms. It is possible that high carrier concentrations of both electrons and holes are involved in the central region of the depletion layer. This is in FREQ =9.6 GHz Fig. 20 Terminal voltage and particle current for the diode shown in Fig. 19 operated at 9.6 GHz and direct current density of 200 amp/cm 2 . The ac voltage amplitude is 17 volts. (Ref. 16.) 5 Large-Signal Analysis 239 contrast to the fundamental IMPATT mode from Read's original theory in which only one type of carrier (e.g., electrons as shown in Fig. 19) is involved in the transit through the depletion layer. It has been shown theoretically that this mode of oscillation can give rise to considerably higher efficiency (of the order of 50 percent) and is called the high-efficiency mode. The result computed by Johnston et al. 16a for an IMPATT diode with a doping profile similar to that for Fig. 19 is shown in Fig. 21. The insert shows the current-voltage phase loop. A full cycle of the phase loop involves a normal IMPATT period represented by (a), the begin- ning of a second IMPATT cycle at (b), the beginning of an avalanche genera- tion of magnitude exceeding the Read limitation at (c), and a low- voltage high- carrier concentration (trapped plasma) state starting at (d). The cycle then repeats. The very large carrier concentrations following point (c) result from multiplication over an extensive portion of what is normally considered the drift region in Read structure. The subsequent separation of carriers results in Fig. 21 Computed results for high-efficiency IMPATT mode. Four cases are shown at £-cvcle intervals. A phase plot of the terminal current and voltage is show in the insert. (After Johnston et al., Ref. 16a.) 240 Impact- Avalanche Transit-Time Diodes (IMPATT Diodes) a reduced field region and resultant trapping of a portion of the carriers. The period of gradual escape of these carriers is determined by the external circuit conditions. Besides large voltage swing and thus high efficiency, a marked benefit is realized from this mode in that the ratio of susceptance to negative conduc- tance, i.e., diode Q, can become quite small, so that contact or other series resistance will then have reduced detrimental effect. This internal tuning of the normal depletion-layer capacitance is obtained by the inductive behavior of the avalanche ; witness the abrupt reversal of the direction of rotation of the phase loop at point (c) in Fig. 21. A similar improvement of diode Q can be realized in these diodes without the trapped plasma. In this case a large avalanche occurs, as in Fig. 21(c), but it is not large enough to collapse the field below the velocity saturation knee. The phase loop will then involve only a single avalanche per cycle, but a multifrequency waveform will be necessary. The above result has been used to explain the observed high-efficiency IMPATT mode 27 to be considered in Section 7. 6 NOISE The noise in an IMPATT diode arises mainly from the statistical nature of the generation rates of electron-hole pairs in the avalanche region. Since the noise sets a lower limit to the microwave signals to be amplified, it is important to consider the noise theory of the IMPATT diode. For amplification the IMPATT diode can be inserted into a resonator which is coupled to a transmission line. 1 7 The line is coupled to separate input and output lines by means of a circulator as shown in Fig. 22(a). Figure 22(b) shows the equivalent circuit upon which the small-signal analysis is based. We shall now introduce two useful expressions for the noise performance : the noise figure and the noise measure. The noise figure, NF, is defined as NF = 1 + / output Noise Power \ \arising in the Amplifier/ (Power Gain)(/c T B t ) = i + J " 2 ** (68) P G kT B t where P G is the amplifier power gain, R L the load resistance, k Boltzmann's constant, T = 290°K, B t the noise bandwidth, and I„ 2 the mean-square noise current caused by the diode and induced in the loop of Fig. 22(b). The noise measure M is defined as I' 2 M = ,, " „ (69a) 4kT GB 1 6 Noise 241 CIRCULATOR n ,,^ n ,,-r INPUT OUTPUT y ///////// / n^ CIRCULATOR INPUT /^~~\ OUTPUT TRANSFORMER -NV\ WV R S Rd (-) Cb) Fig. 22 (a) IMPATT diode inserted into a resonator. (b) Equivalent circuit. (After Hines, Ref. 17.) *d or M = 4fcr (-z real )5 1 (69b) where G is the negative conductance, — Z real the real part of the diode impe- dance, and V„ 2 the mean-square noise voltage. We note that both the noise 242 Impact- Avalanche Transit-Time Diodes (IMPATT Diodes) figure and the noise measure are dependent on the mean-square noise current (or the mean-square noise voltage). It will be shown that for frequencies above the resonant frequency f r , the noise in the diode decreases, but so does the negative resistance. In this situation the appropriate quantity for assessing the performance of the diode as an amplifier is the noise measure, and we are interested in the minimum noise measure. The noise figure for a high-gain amplifier is given by 17 qK A 1 kT NF=1+ - j— s 2_j (70) 2" or where m is the factor associated with the expression a = <x (S'/S' ) m , x A and V A are respectively the time and voltage drop across the avalanche region, and f r is the resonant frequency given in Section 3. The above expression is obtained under the simplified assumptions that the avalanche region is narrow and that the ionization coefficients of holes and electrons are equal. For m = 6 (for Si), co = 2co r , and V A = 3 volts, the noise figure at/= 10 GHz is predicted to be 11,000 or 40.5 dB. With realistic ionization coefficients (a„ ^ cc p for Si) and an arbitrary doping profile, the low-frequency expression for the mean-square noise voltage is given by 18 2 2qB, V z = Jo A W 1+ — x A a' T (71) where a' = doc/dS'. Figure 23 shows V 2 \B X as a function of frequency for a silicon IMPATT diode with A = 10" 4 cm 2 , W= 5 /mi, and x A = 1 /mi. At low frequencies we note that the noise voltage V n 2 is inversely proportional to the direct current density, Eq. (71). Near the resonant frequency (which varies as yfjo) V n 2 reaches a maximum and then decreases roughly as the fourth power of frequency, with a superimposed structure that is related to the width of the drift region. Figure 24 shows the noise measures as a function of frequency for Si and Ge diodes at current densities of 100 and 1000 amp/ cm 2 . As is seen, both for the hypothetical case of zero series resistance and for the more realistic assumption of a 1-ohm series resistance, the Ge structure has a lower noise measure. This can be understood from the fact that in Eq. (71) the factor a' for Ge is larger than that for Si. We also note that for the case of 1-ohm resistance, the minimum noise measure decreases with current density for both the Ge and Si diodes. 6 Noise 243 10 100 FREQUENCY (GHz) Fig. 23 Mean-square noise voltage per bandwidth versus frequency for a Si IMPATT diode. (After Gummel and Blue, Ref. 18.) We can summarize the noise characteristics as follows: (1) the mean-square noise voltage (or current) varies inversely as the direct current density, (2) a wider avalanche region gives rise to lower V„ 2 , and (3) a lower noise measure is obtained in a semiconductor with higher ionization coefficients. A noise 244 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) figure of 30 dB has been reported for an n + p Ge IMPATT diode. 19 Measure- ments of silicon IMPATT diodes generally give a 6- to 8-dB-higher noise figure than germanium diodes of comparable doping profile. This is indeed to be expected from the noise theory. 7 EXPERIMENTS The IMPATT diode is one of the most powerful solid-state sources for generation of microwaves. A microwave oscillator or amplifier can be made using an IMPATT diode biased in reverse and mounted in a microwave cavity. The impedance of the cavity is mainly inductive and can be matched to the mainly capacitive impedance of the diode so as to form a resonant system. From our small-signal and large-signal analyses, we show that an IMPATT diode can have a negative ac resistance under proper biasing conditions so that it can deliver power from the dc bias to the oscillation with a small negative Q and high efficiency. In this section we shall discuss the diode geometries, the basic measurement setup, and typical experimental results; and we shall consider the effects due to series resistance and temperature limitation. To demonstrate the rapid progress in the experimental study of the IMPATT diode, we first show the measured output microwave power versus frequency 13 ' 34 in Fig. 25. In November 1965 (about a year after the discovery of the first IMPATT diode) 3 the maximum CW power 13 at 10 GHz was only 50 mW. The maximum CW power has now increased by two orders of magnitude. The power-frequency relationship p ~f 2 (as given by Eq. (64)) is followed at higher frequencies. At lower frequencies, the output power is proportional to /// and is due to thermal limitations. 34 (1) Diode Geometries Figure 26 shows the schematic diagrams of four different IMPATT diodes. The first diode 3 that gave microwave oscillations is shown in Fig. 26(a) which is a simple boron-diffused silicon p-n junction. The pulsed output power is 80 mW at 12 GHz with 0.5 percent efficiency. The first Read diode (n + pnp + ) reported 4 is shown in Fig. 26(b) which was operated at 180 MHz with CW output of 1 /iW with an efficiency of the order of 10 -6 . The improved versions of the IMPATT diodes are shown in Fig. 26(c) and (d) where accurate controls of epitaxial layer thicknesses are employed. 21,22 Two typical microwave packages are shown in Fig. 27. In both cases the diode is mounted with its diffused side in contact with a copper heat sink so that the heat generated at the junction can be readily conducted away. 7 Experiments 10" 245 1/— -Si 1 ^OdB v / ^ R s = m _A / \ 30 v \ / / dB \y Je] R s=° 1 1 t 1 1 ~ 20dB lOdB ■ tii R s =in Si - Ge \\ 1 1 40dB \ \ / \ 30 \ \J j A dB V7 40 i i i 1 1 20dB lOdB i iii 4 5 6 7 8910 20 30 40 50 FREQUENCY (GHz) (a) J= 100 AMPS /cm 2 4 5 6 78910 20 30 40 50 FREQUENCY (GHz) ( b) J = 1000 AMPS/cm 2 Fig. 24 Noise measure as a function of frequency for Si and Ge diodes at 100 and 1000 amp/cm 2 . (Ref. 18.) X \ x v(l/f) - N X \ < X • cw ) . ( Sl X PULSE ) O CW-GaAS \ \ O o \ Y \ • , STATE-OF-THE- ART \ -\ \ \ (NOV. I965) \ \ * \ \(l/f 2 ) \ \ - _ • i III i iii 1 X 1 1 l FREQUENCY (GHz) Fig. 25 Output microwave power versus frequency. (Nov. 1965 line after DeLoach, Ref. 13; state-of-the-art line after Sze and Ryder, Ref. 34.) 246 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) DIMENSIONS IN jJLm 25 T 150 125 y\ J— 125- (a) LIQUID Ga-ln-, N (As)wl0 19 \ N o (Ga)«3XI0 : GUARD RING (b) Fig. 26 (a) Simple boron-diffused Si p-n junction. (After Johnston et al., Ref. 3.) (b) The first Read diode — n + pirp + . (After Lee et al., Ref. 4.) (c) Improved version. (After DeLoach and Johnston, Ref. 21.) (d) Improved version. (After Misawa and Marinaccio, Ref. 22.) (d) (2) Microwave Measurements A wide-range measurement setup 23 for IMPATT diodes is shown in Fig. 28. The most important features are (1) the diode mount which provides adequate heat conduction and has movable tuning sleeves to optimize the resonant circuit, (2) the power meter to give the microwave output power, (3) the sweeper to detect the microwave frequencies, and (4) the oscilloscope to display the output power signal. A typical spectrum of oscillation as obtained from an oscilloscope display is shown in Fig. 29 for a Si p-v-n 7 Experiments 247 BRAZED OR BONDED SEAL GOLD RIBBON LEAD END CAP DIODE (UPSIDE] DOWN) HERMETIC SEAL APPROX 0.3cm GOLD-PLATED COPPER PEDESTAL BASE METAL BASE (b) Fig. 27 Two microwave packages with IMPATT diodes mounted. diode. 22 A 250-mW CW power output is obtained from this diode at Xband with a spectrum width less than 1 kHz. The bands and the corresponding frequency ranges are listed in Table 5.1. A typical result of the small-signal admittance measurements of an IMPATT diode is shown in Fig. 30. The diode can be approximated by a p-v-n diode with W = 1.8 /mi. The variation of diode admittance as a function of fre- quency at a bias current of 1 5 ma is shown in Fig. 30(a) where the experi- mental points are plotted in extended Smith coordinates normalized to 20 248 Impact- Avalanche Transit-Time Diodes (IMPATT Diodes) POWER HEAD VERT IN SCOPE 30MHZ I.F AMP 4-8 GHz ^^3— FVWT - lOdB PAD 40dB PAD IHf HORIZONTAL SWEEP 20dB PAD - pvwf - IOdB MIXER DIRECTIONAL RECT COUPLER LOCAL OSCILLATOR 4-8 GHZ SWEEPER CENTER CONDUCTOR Fig. 28 Wide-range test circuit for high-efficiency IMPATT diodes. (After Iglesias, Ref. 23.) millimhos. 24 We note that the negative conductance extends over the entire frequency range (4 to 9.8 GHz). Figure 30(b) shows the nonlinear behavior of the conductance as a function of direct bias current at five frequencies. At a given frequency, as the current increases the conductance reaches a maximum negative value and then becomes positive at sufficiently large current. These results are in good agreement with the small-signal analysis considered in Section 4. Microwave oscillations well into the millimeter wave range (up to 300 GHz) have been obtained from diffused p-n junctions under pulse conditions. 25 7 Experiments 249 1 1.8GHZ n a: Ul IkHz o Q- < 7 j \ _l ////////////A ■10kHz SPECTRUM OF OSCILLATION Si fH*n DIODE (V =54V) Fig. 29 Spectrum of oscillation of a Si p-i-n diode. (After Misawa and Marinaccio, Ref. 22.) TABLE 5.1 BANDS AND FREQUENCY RANGE 32 Waveguide Frequency Range Band Size (cm) (GHz) L 1.0 to 2.6 S 7.6 x 3.8 2.60 to 3.95 G 5 X2.5 3.95 to 5.85 C 4.4 x 2.3 4.90 to 7.05 J 3.8 x 1.9 5.30 to 8.20 H 3.2 x 1.3 7.05 x 10.00 X 2.5 x 1.25 8.20 to 12.40 M 2.1 x 1.2 10.00 to 15.00 P 1.8 x 1.0 12.40 to 18.00 N 1.5 x 0.85 15.00 to 22.00 Ku — 15.3 to 18.0 K 1.2 x 0.65 18.00 to 26.50 R 0.9 x 0.56 26.50 to 40.00 Millimeter above 30 to 300 Submillimeter above 300 250 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) + 0.5 R -0.5- f = 1.8 GHZ 2.5 3 4 - ^\6 5 10 BIAS CURRENT (mA) (b) Fig. 30 Small-signal admittance measurements. (After Josenhaus and Misawa, Ref. 24.) The IMPATT diode is mounted in a cavity shown in Fig. 31(a). The measured threshold frequency (i.e., the lowest frequency of operation) and the corres- ponding breakdown voltage are shown in Fig. 31(b). The solid line is calcula- ted based on the facts that the frequency is inversely proportional to the depletion layer width due to the transit-time effect and that the breakdown 7 Experiments 251 PRESSURE CONTACT, Ga - PLATED SURFACE DC ISOLATION- 50 100 THRESHOLD FREQUENCY (GHz) (b) Fig. 31 (a) Microwave cavity. (b) Measured threshold frequency versus breakdown voltage. (After Bowman and Burrus, Ref. 25.) voltage decreases with decreasing depletion width. Thus for lower breakdown voltages, the depletion width is narrower resulting in higher frequency. Figure 32 shows the dependence of the threshold frequency on bias current. We note that the frequency increases approximately as the square root of the direct current density, in agreement with the general behavior of the cutoff frequency and the resonant frequency. It is interesting to point out that at 50 GHz, the depletion layer width is about 2000 A. This very narrow width gives some indication of the difficulty inherent in fabricating a Read diode structure at this frequency. At 300 GHz with a total depletion width of only 252 impact-Avalanche Transit-Time Diodes (IMPATT Diodes) THRESHOLD WAVELENGTH (cm) I 0.1 f 1 1 5 - 4 2.2 / : j T~ 35f T -y 3 1 1 1 1 1 1 10 100 500 THRESHOLD FREQUENCY (GHZ) Fig. 32 Dependence of threshold frequency on direct current density. (Ref. 25.) 300 A, a Read structure which requires a very narrow avalanche region and a separate drift region is beyond the present state of semiconductor technology. We now consider some experimental results of the subtransit-time high- efficiency IMPATT diodes. Germanium diodes with a fundamental IMPATT frequency of 6 GHz have been operated under pulse bias in the circuit as shown in Fig. 28 and have produced efficiencies as high as 40% at 3 GHz. 16a CW operation at room temperature with efficiency up to 43 % has been reported for Ge IMPATT diodes. 26 Silicon diodes have also been reported 27 to give high efficiency operation at somewhat lower frequencies (0.1 to 1.1 GHz). Figure 33(a) shows the measured output power and efficiency of a Ge IMPATT diode. The result shows an efficiency of 43% with 5.3 watts power 7 Experiments 253 6.0 * 4.0 ce UJ 2 a 2.0 a. 8 o L f = 450 MHz 200 400 600 CURRENT DENSITY (A/Cm2) (a) 800 60 20 FUNDAMENTAL MODE HIGH- EFFICIENCY MODE 200 400 600 CURRENT DENSITY (A/Cm*) (b) 800 Fig. 33 Experimental measurement of Ge IMPATT diode operated in high-efficiency mode, (a) output power and efficiency versus current density and (b) voltage versus bias current density. (After Iglesias and Evans, Ref. 26.) output at 450 MHz. The diode was made from epitaxial Ge material and des lg ned to operate as a 5-GHz IMPATT oscillator in the fundamental mode. Typical device parameters are: 1-pf junction capacitance at -20 V, junction area of 4 x 10 4 cm 2 , and breakdown voltage of 40 V. To operate the device in high-efficiency mode, the circuit setup as shown in Fig. 28 is modified by first providing a local cavity for the microwave (~ 5 GHz) oscillation. This is obtained by positioning a single tuning sleeve close to the diode. Then a second tuning element is positioned a half wavelength (at UHF) from the first tuning element. Probe measurements in the cavity that is formed by 254 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) the tuning elements have shown that the diode is also oscillatory at a micro- wave frequency (~5GHz) which is harmonically related to the UHF oscilla- tions. It is interesting to note that the results shown in Fig. 33(a) are obtained at current densities comparable to the densities required to operate the diode as a 5-GHz oscillator. Figure 33(b) shows the current-voltage characteristic for the oscillating diode. There is a significant drop in dc voltage when the diode is operated in the high-efficiency mode. (3) Effects of Unswept Layer and Heat Dissipation The importance of the epitaxial layer and the heat sink on microwave performance will now be considered. Figure 34(a) shows the impurity distribu- tion and electric field profile at breakdown of a Ge IMPATT diode 28 which is designed as a microwave power source at 6 GHz. It is evident from the figure that about 7 pim of epitaxial material is required to support the diffused layer and the depletion layer at breakdown. Any epitaxial material in excess of this 7 /mi will remain as an unswept neutral region at breakdown and will therefore contribute to the positive series resistance of the diode. The effect of this unswept epitaxial layer on the microwave performance is illustrated in Fig. 34(b) which shows that the efficiency decreases as the unswept epitaxial thickness increases. This is because the negative resistance due to the impact- avalanche transit-time effect is partly cancelled by the parasitic series resist- ance. It is clear from Fig. 34(b) that to produce high-efficiency IMPATT diodes, the epitaxial layer thickness should be tailored so that no unswept layer remains at breakdown. The elimination of the series resistance is also important in the noise consideration as shown in Fig. 24. An IMPATT diode generally dissipates several times as much power in the form of heat as is converted to microwave power. In addition, high current densities are required to obtain good efficiency. It is thus important to have an adequate heat sink to dissipate the associated high power densities without excessive diode heating. Figure 35(a) shows an example of a diode mounted on copper with metallizations used for a gold-to-gold thermal compression bond. 29 A simplified diode and heat-sink structure is shown in Fig. 35(b). The total thermal resistance for a circular heat source of radius r at a depth d s in the silicon is given by 29 Ri = R s + R t + R g + R n + R c _ 1 ld s d t d g d„\ 1 A\K S K t K g kJ 47tK c ' The symbols are defined in Fig. 35(b). The last term gives the thermal spread- ing resistance for the infinite half-space heat sink. The various components of 7 Experiments 255 n \ — + n p \/ ,— ELECTRIC X / FIELD AT \ / BREAKDOWN \" ^ A ^ '\ ^ / \ ^ . \ N ' \ ^ 1 \ ^ 1 1 X UNSWEPT EPITAXIAL LAYER P + 1 ' \ | \ I 1 . , \ 4 x io 15 cm 1 -3 1 . 2 4 6 8 10 DISTANCE FROM SURFACE (/xm) (a) 12 3 4 5 UNSWEPT EPITAXIAL THICKNESS (^m) (b) Fig. 34 (a) Impurity distribution and electric field profile at breakdown of a Ge IMPATT diode. (b) Efficiency versus unswept epitaxial layer thickness. (After Kovel and Gibbons, Ref. 28.) the thermal resistance are shown in Fig. 35(c). The dashed curves show the thermal spreading resistance for a diamond (type II) heat sink and the cor- responding total thermal resistance R T . The thermal conductivity at 300°K of the diamond is assumed to be three times that of copper, and the thermal conductivity for silicon is for a temperature of 500°K which is assumed as a 256 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) DIODE WITH Ti.Au METALLIZATION UNIFORM TEMPERATURE HEAT SOURCE ill 2r b) DIODE AREA (crn ) (C) Fig. 35 (a) Diode mounted on copper with metallization used for gold-to-gold thermal compression bond. (b) Simplified diode and heat-sink structure. (c) Various components and the total thermal resistance versus diode area. (After Swan et al., Ref. 29.) 7 Experiments 257 maximum operating temperature (see Table 5.2). We see clearly that a dia- mond heat sink reduces the thermal resistance R T by a factor of about two, and that R T decreases as the diode area increases. Figure 36(a) compares the power densities and the total dissipation power levels that can be achieved on copper and on diamond heat sinks for a diode TABLE 5.2 THERMAL CONDUCTIVITY AND TYPICAL LAYER THICKNESS FOR MATERIALS IN A Ku BAND DIODE (300°K) Thermal Conductivity* Thickness dJK Material k (Watts/cm°C) d (fim) (10- 4 xcm 2 °C/Watt) Silicon 0.80 3 3.8 Titanium 0.16 0.02 0.13 Gold 3.0 12.5 4.2 Nickel 0.71 0.2 0.28 Copper 3.9 Diamond 20 — — * k for Si is for a temperature of 500°K which is assumed as a maximum operating temperature. DIODE AREA (cm 2 Fig. 36 (a) Power density and total dissipation power versus diode area. 258 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) 10 20 DC INPUT POWER (WATTS) (b) Output power versus input power for parallel connections. (After Swan et al., Ref. 29.) temperature rise of 200°C. It is seen that a significantly higher power can be handled with diamond. Because of the temperature rise associated with the power density requirements (i.e., high current density), for efficient oscillation a single-diode oscillator at any specified efficiency is limited by the maximum area that can be used. To increase the output power we can use parallel, series, and hybrid connections. An example of parallel connection is shown in Fig. 36(b) in which data are given for a single, a double, and a triplet unit. 29 The output power of the triple circuit is increased by a factor of about 3 without significant reduction in efficiency. For series connection 30 of IMPATT diodes it is shown that the power output is the sum of the individual diodes. Since the impedance level is not lowered by the series connection, the/ -2 limitation of the power-impedance product for IMPATT diodes is no longer important. The hybrid connection 31 (combination of series and parallel con- nections) can also give considerable increase in the output power. References 259 REFERENCES 1. W. Shockley, "Negative Resistance Arising From Transit Time in Semiconductor Diodes," Bell Syst. Tech. J., 33, 799 (1954). 2. W. T. Read, "A Proposed High-Frequency Negative Resistance Diode," Bell Svst Tech. J., 37, 401 (1958). ' 3. R. L. Johnston, B. C. DeLoach, Jr., and B. G. Cohen, "A Silicon Diode Microwave Oscillator," Bell Syst. Tech. J., 47, 369 (1964). 4. C. A. Lee, R. L. Batdorf, W. Wiegman, and G. Kaminsky, "The Read Diode an Avalanche, Transit-Time, Negative-Resistance Oscillator," Appl. Phys. Letters, 6, 89 (1965). 5. T. Misawa, "Negative Resistance on p-n Junction Under Avalanche Breakdown Conditions, Part I and II," IEEE Trans. Electron Devices, ED-13, 137-151 (1966). 6. S. M. Sze and G. Gibbons, "Avalanche Breakdown Voltages of Abrupt and Linearly Graded p-n Junctions in Ge, Si, GaAs, and GaP," Appl. Phys. Letters, 8, 111 (1966). 7. G Gibbons and S. M. Sze, "Avalanche Breakdown in Read and p-i-n Diodes " Solid State Electron., //, 225 (1968). 8. C. R. Crowell and S. M. Sze, "Temperature Dependence of Avalanche Multiplication in Semiconductors," Appl. Phys. Letters, 9, 242 (1966). 9. S. M Sze and W. Shockley, "Unit-Cube Expression for Space-Charge Resistance " Bell Syst. Tech. J., 46, 837 (1967). 10. M. Gilden and M. F. Hines, "Electronic Tuning Effects in the Read Microwave Avalanche Diode," IEEE Trans. Electron Devices, ED-13, 169 (1966). 11. T. Misawa, " Multiple Uniform Layer Approximation in Analysis of Negative Resis- tance in p-n Junctions in Breakdown," IEEE Trans. Electron Devices, ED-14, 795 12. H. K. Gummel and D. L. Scharfetter, "Avalanche Region of IMPATT Diodes " Bell Syst. Tech. J„ 45, 1797 (1966). 13. B C. DeLoach, Jr., "Recent Advances in Solid State Microwave Generators" a chapter m Advances in Microwaves, Vol. 2, Academic Press, New York, pp. 43-88 (1967). 14. J. M. Early, "Maximum Rapidly Switchable Power Density in Junction Triodes " IRE Trans. Electron Devices, ED-6, 'ill (1959). 15. E. O. Johnson, "Physical Limitation on Frequency and Power Parameters of Transis- tors," IEEE Intern. Conv. Record, pt. 5, p. 27 (1965). 16. D. L. Scharfetter and H. K. Gummel, "Large-Signal Analysis of a Silicon Read Diode Oscillator," Solid-State Device Research Conference, Evanston, June 1966. 16a. R. L. Johnston, D. L. Scharfetter, and D. J. Bartelink, "High-Efficiency Subtransit lime Oscillations in Germanium Avalanche Diode," Proc. IEEE, 56 (1968). 17. M. F. Hines, " Noise Theory for Read Type Avalanche Diode," IEEE Trans Electron Devices, ED-13, 158 (1966). 260 Impact-Avalanche Transit-Time Diodes (IMPATT Diodes) 18. H. K. Gummel and J. L. Blue, "A Small-Signal Theory of Avalanche NoiseonlMPATT Diodes," IEEE Trans. Electron Devices, ED-14, 569 (1967). 19. R. L. Rulison, G. Gibbons, and J. G. Josenhaus, "Improved Performance of IMPATT Diodes Fabricated From Ge," Proc. IEEE, 55, 223 (1967). 20. C. B. Swan, T. Misawa, and C. H. Bricker, "Continuous Oscillations at Millimeter Wavelengths With Silicon Avalanche Diodes," Proc. IEEE, 55, 1747 (1967). 21. B. C. DeLoach and R. L. Johnston, "Avalanche Transit-Time Microwave Oscillators and Amplifiers," IEEE Trans. Electron Devices, ED-13, 18 (1966). 22. T. Misawa and L. P. Marinaccio, "A 1/4 Watt Si p-v-n X-Band IMPATT Diode," Inter. Electron Device Meeting, Washington, D.C. (Oct. 1966). 23. D. E. Iglesias, "Circuit for Testing High Efficiency IMPATT Diodes," Proc. IEEE, 55, 2065 (1967). 24. J. G. Josenhaus and T. Misawa, "Experimental Characterization of a Negative- Resistance Avalanche Diode," IEEE Trans. Electron Devices, ED-13, 206 (1966). 25. L. S. Bowman and C. A. Burrus, Jr., "Pulse-Driven Silicon p-n Junction Avalanche Oscillators for the 0.9 to 20 mm Band," IEEE Trans. Electron Devices, ED-14, 411 (1967). 26. D. E. Iglesias and W. J. Evans, "High Efficiency CW IMPATT Operation," Proc. IEEE (1968). 27. H. J. Prager, K. K. N. Chang, and S. Weisbrod, " High Power, High Efficiency Silicon Avalanche Diodes at Ultrahigh Frequencies," Proc. IEEE, 55, 586 (1967). 28. S. R. Kovel and G. Gibbons, "The Effect of Unswept Epitaxial Material on the Microwave Efficiency of IMPATT Diodes," Proc. IEEE, 55, 2066 (1967). 29. C. B. Swan, T. Misawa, and L. Marinaccio, "Composite Avalanche Diode Structures for Increased Power Capability," IEEE Trans. Electron Devices, ED-14, 684 (1967). 30. F. M. Magalhaes and W. O. Schlosser, "A Series Connection of IMPATT Diodes," Inter. Solid. State Circuit Conf., Philadelphia (Feb. 1968). 31. H. Fukui, "Frequency Locking and Modulation of Microwave Silicon Avalanche Diode Oscillators," Proc. IEEE, 54, 1475 (1966). 32. Hewlett-Packard Electronic Test Instruments, Hewlett-Packard Co., Palo Alto, California, (1961). 33. R. Svensson, private communication. 34. S. M. Sze and R. M. Ryder, " Microwave Avalanche Diodes," Proc IEEE, Special Issue on Microwave Semiconductor Devices (August 1971). ■ INTRODUCTION ■ STATIC CHARACTERISTICS ■ MICROWAVE TRANSISTOR ■ POWER TRANSISTOR ■ SWITCHING TRANSISTOR ■ UNIJUNCTION TRANSISTOR 6 Junction Transistors I INTRODUCTION Of all semiconductor devices the junction transistor is the most important. The invention of the transistor (contraction for transfer resistor) by a research team of the Bell Laboratories in 1948 has had an unprecedented impact on the electronic industry in general and on solid-state research in particular. Prior to 1948 semiconductors had found application only as thermistors^ photodiodes, and rectifiers. In 1948 the development of the point-contact transistor by John Bardeen and Walter Brattain was announced. 1 In the following year William Shockley's classic paper on junction diodes and transistors was published. 2 Since then the transistor theory has been extended to include high-frequency high-power, and switching behaviors. Transistor technology has enjoyed many breakthroughs, particularly in the alloy-junction 3 and grown-junction techniques 33 and in zone-refining, 3b diffusion, 3 *' d ' e epitaxial, 4 planar, 5 beam-lead, 6 and ion implantation 7 technologies. These breakthroughs have helped to increase the power and frequency capabilities of transistors, as well as their reliability, by millions of times. In addition, application of semi- conductor physics, transistor theory, and transistor technology has broadened our knowledge and improved other semiconductor devices as well. It is important to point out that transistors and related semiconductor devices are not mere replacements for vacuum tubes. The true essence of these devices lies in their overwhelming potential to create for science and industry novel developments that could never have been derived from tubes alone. Transistors are now key elements, for example, in high-speed com- 261 262 Junction Transistors puters, in space vehicles and satellites, and in all modern communication and power systems. Because of the importance of transistors, over 250'books have been written to date on the subjects of transistor physics, design, and application. Among them are standard texts by such editors and authors as Biondi, 8 Shive, 9 Philips, 10 Gartner, 11 and Pritchard, lla and a series of books 12 (Vol. 1 through 4) by the Semiconductor Electronics Education Committee (SEEC) which gives a lucid and penetrating presentation of transistor theory and circuits. In Section 2 of this chapter we discuss briefly the static characteristics of a transistor. The high-frequency and microwave transistor are considered in Section 3 in which emphasis has been placed on device geometry, cutoff frequency, power gain, and noise figures. In Section 4 we consider the power transistor where the main concern is with the absolute values of power and the limitation of operation imposed by second breakdown. The switching transistor is considered in Section 5 in which the important parameters are current gain and switching speed. The classification of junction transistors in the above categories, however, is quite arbitrary. For example, since the power-frequency product is mainly limited by material parameters, 13 there is no clear-cut boundary between power and microwave transistors. In Section 6 we discuss the unijunction transistor which is a three-terminal device having one emitter junction and two base contacts. It can exhibit negative-resistance characteristics and is used in timing and switching circuits. 2 STATIC CHARACTERISTICS (1) Basic Current- Voltage Relationship In this section we shall consider the basic dc characteristics of p-n-p and n-p-n junction transistors. Figure 1 shows the symbols and nomenclatures for p-n-p and n-p-n transistors. The arrow indicates the direction of current flow under normal operating conditions, i.e., forward-biased emitter junction and reverse-biased collector junction. A transistor can be connected in three circuit configurations depending on which lead is common to the input and output circuits. Figure 2 shows the common-base, common emitter, and common-collector configurations for a p-n-p transistor. The current and voltage conventions are given for normal operations. All the signs and polarities should be inverted for an n-p-n transistor. In the following dis- cussion we shall consider p-n-p transistors ; the results are applicable to the n-p-n transistor with an appropriate change of polarities. 2 Static Characteristics 263 EMITTER BASE COLLECTOR P + + (a) p-n-p TRANSISTOR EMITTER BASE COLLECTOR P + (b) n-p-n TRANSISTOR Fig. 1 Symbols and nomenclatures of n-p-n and p-n-p transistors. Figure 3(a) is a schematic of a p-n-p transistor connected as an amplifier with common-base configuration. A schematic doping profile for the transistor with regions of uniform impurity density is shown in Fig. 3(b), and the corresponding band diagram under normal operating conditions is shown in Fig. 3(c). The static characteristics can be readily derived from the p-n junction theory discussed in Chapter 3. To illustrate the major properties of a tran- sistor, we shall assume that the current-voltage relationship of the emitter and collector junctions is that given by the Shockley equation, 2 i.e., the 264 Junction Transistors V C B |I« (a) COMMON-BASE CONFIGURATION *-0 + (b) COMMON-EMITTER CONFIGURATION (c) COMMON-COLLECTOR CONFIGURATION Fig. 2 Three configurations of a p-n-p transistor. effects due to recombination-generation, series resistance, and high-level injection are neglected. These effects will be considered later. As in Fig. 3(b) where all the potential drops occur across the junction depletion region, the equations that govern the steady-state characteristics are those of continuity and current density. For the neutral base region these equations are given by P — Pr d 2 p T R ox (1) 2 Static Characteristics 265 EMITTER BASE COLLECTOR VCB N n~ N A A (c) -O ; OUTPUT -O Fig. 3 (a) A p-n-p transistor connected in common-base configuration for amplifier application. (b) Doping profiles of the transistor with abrupt impurity distributions. (c) Energy band diagram under normal operating conditions. J p =- q D B ^- ox J n = «Aot + q£> B dp dx (2a) (2b) where p B is the equilibrium minority carrier density in the base, J tot is the total conduction current density, and r B and D B are the minority-carrier 266 Junction Transistors lifetime and diffusion coefficients respectively. The conditions at the emitter depletion-layer edges for the excess carrier concentrations are p'(0) = p(0) - p B = Pb "'(-*£) = n(- x E ) -n E = n E exp (3) where n E is the equilibrium minority carrier density (electrons) in the emitter. A similar set of equations can be written for the collector junction, i.e., p'(W) = p{W)-p B =p B n'(x c ) = n(x c ) -n c = n c exp i i (4) The solutions for the minority carrier distributions, i.e., the hole distri- bution in the base from Eq. (1) and electron distributions in the emitter and collector, are given by 11 p(x) = p B + p'(W) - p'(0)«?" W/L B n(x) = n E + n'( — x E ) exp n(x) = n c + n'(x c ) exp 2 sinh(WlL B ) (x + x E ) e x/L B _ p'(W) - p'(0)e w/LB 2 smh(W/L B ) ,-x/Lb (x - x c ) X < — X, X *> Xq (5) (6) (7) where L B = ^t b D b is the diffusion length of holes in the base, and L E and L c are the diffusion lengths in the emitter and collector respectively. Equa- tion (5) is important because it correlates the base width W to the minority carrier distribution. If H 7 -* oo or W\L B > 1, Eq. (5) reduces to p(x) = p B + p(0)e- x/LB (8) which is identical to the case of a p-n junction. In this case there is no com- munication between the emitter and collector currents which are determined by the density gradient at x = and x = W respectively. The "transistor" action is thus lost. From Eqs. (2) and (3) we can obtain the total dc emitter current as a function of the applied voltages : 2 Static Characteristics I E = AJ p (x = 0) + AJ„(x = -x E ) and for the total dc collector current I c = AJ p (x = W) + AJ„(x = x c ) 267 ,qVc B /kT (9) -(-«*!LM-*SL) -^(e— -l) (10) where ^ is the cross-sectional area of the transistor. The difference between these two currents is small and appears as the base current: 'b — If. — Ir - (11) We shall now modify the doping distribution in the base layer of Fig 3(b) and consider a more general base impurity distribution 14 as shown in Fig 4 A transistor with such doping distribution is called a drift transistor since there is a built-in electric field to enhance the hole drift in the base The donor density N and the electron density in the base for N > n- are given by N = tii exp "4# ~ 4>) kT (12) where n t is the intrinsic carrier concentration, <f> the Fermi potential and if, is the intrinsic Fermi potential. From Eq. (12) we obtain for the built-in field dx kT}_dN q N dx (13) 268 Junction Transistors nS-Na COLLECTOR Fig. 4 Transistor doping profile with an impurity gradient in the base region. (After Moll and Ross, Ref. 14.) The hole current density is given by J P = q»Bp£ -qDb dp dx Substitution of Eq. (13) into (14) yields J P = -qD B p dN dp N dx dx (14) (15) The steady-state solution to Eq. (15) with the boundary condition that/? = at x = W is J 1 w qD B N(x) J x The hole concentration at x = is given by p(x = 0) = — ^ f N(x) dx ^ p BO exp(— -^ ) qD B n BO J \ kT J (16) (17) where n BO is defined as the donor concentration at x = 0, and p BO is the equilibrium hole concentration at x = (so that n BO p BO = n ( 2 ). The 2 Static Characteristics current I p = AJ P , where A is the area, is given by _ qAD B n t 2 (qV EB \ (qV EB \ J o The total collector current is given by + 1, 269 (18) (19) where I 2 is the saturation current. A typical experimental result 15 is shown in Fig. 5. We note that the exponential law of Eq. (19) is very closely obeyed at currents low enough that the voltage drop of the base current flowing through the base resistance is negligible. The constant l t can be obtained ICr 4 -m Ic / / // / / A '/ /qV EB \ ' EXP — \ 2kT / I0" a /// ' / / io-io l V 10" 12 T=300"K v CB =o h ,0-14 / / '— li 0.4 0.6 V EB (VOLTS) Fig. 5 Collector and base current as a function of emitter-base voltage. (After Iwersen et al., Ref. 15.) ^70 Junction Transistors by subtracting the saturation current I 2 from the measured collector current and by plotting the difference in a semilog plot as indicated in Fig. 5. The number of impurities per unit area (the so-called Gummel number) 16 can be obtained from Eqs. (18) and (19): w N B = f N(x) dx = j- AD B n, 2 . (20) (2) Current Gain The static common-base current gain a , also referred to as h FB from the four-terminal hybrid parameters (where the subscript Fand B refer to /or ward and common-ftase respectively), is defined as «o = h FB = ^ (for/->0). (21) The static common-emitter current gain p , also referred to as h FE , is defined as Po = h FE = -^ (for/^0). (22) From Eq. (11) we note that a and /? are related to each other by A plot of f$ versus a is shown in Fig. 6. We note that as a approaches unity, the value of /? increases extremely rapidly. For a 1 % change in a , from 0.98 to 0.99, the value of /? increases by about 100%, from 48 to 99. Under normal operation V EB > and V CB -4 0, so that the terms in Eqs. (9) and (10) associated with V CB can be neglected. The current gain a can be obtained from Eqs. (9) and (10) as a = ya r (24) where „ . . hole current from the emitter y (emitter efficiency) = : total emitter current J P (x = 0) 1 J p (x = 0) + J n (x = -x E ) \p B D B J L E \L B (25) 2 Static Characteristics and 271 a r (transport factor) = hole current reaching collector total emitted hole current into the base \dx/ x=zW ^ 1 \dx) x=0 C ° S \L B ) (26) Both y and a T are less than unity, and the extent to which they depart from unity represents an electron current which must be supplied from the base contact. 1000 03. 00 = -^- / — — "" 0.88 COMMON-BASE CURRENT GAIN, a Fig. 6 Common-emitter current gain vs. common-base 0.96 0.98 current gam. 272 Junction Transistors In Eq. (25) the dominant factor is the ratio n E jp B ^ N B jN E where N B and N E are the impurity doping concentrations in the base and emitter respec- tively. For y-+ 1, it is required that N B /N E < 1, or that the emitter should be much more heavily doped than the base. The transport factor a T , Eq. (26), is determined by the ratio of the base width to the diffusion length in the base. To improve a T , one must reduce this ratio. The current gain in Eq. (24) is independent of emitter current density. This is true only under the assump- tions of ideal junctions and low-injection level. For a practical transistor, however, a varies with the emitter current. At very low emitter currents the contribution of the recombination-generation current (the so-called Sah-Noyce-Shockley current) 17 in the emitter depletion region as well as of the surface leakage current may be large compared with the useful diffusion current of minority carriers across the base, so that the emitter efficiency is low. With increasing total emitter current the diffusion current begins to dominate over the recombination-generation current, and the emitter efficiency increases. For still higher emitter current (the high- injection condition where the injected minority carrier density approaches the majority carrier density in the base), the injected carriers effectively increase the base doping, which, in turn, causes the emitter efficiency to decrease. The detailed analysis can be obtained by solving the continuity equation and current equations with both diffusion and drift components. The decrease of current gain with increasing I E is referred to as the Webster effect. 18 Thus the current gain goes through a maximum and continues to decrease for higher current. A typical result is shown in Fig. 7. It is of interest to point out that while the value of P varies from about 60 to a maximum of 65 then to 20 at I E = 25 ma, the value of a varies only from 0.983 to 0.984 then to 0.954. (3) Common-Base Configuration In the previous section we have seen that the currents in the three terminals of a transistor are related by the minority carrier distribution in the base region. For a transistor with high emitter efficiency, the expressions for the dc emitter and collector currents, Eqs. (9) and (10), reduce to terms propor- tional to the minority-carrier gradient, (dp/dx), at x = and x — W respec- tively. We can thus summarize the fundamental relationships of a transistor as follows : (a) the applied voltages control the boundary densities through the terms exp(qVlkT), (b) the emitter and collector currents are given by the minority (hole) density gradients at the junction boundaries, i.e., x = and x = W, and 2 Static Characteristics 273 Ql 1 KJ ■ 60 ( 50 40 oS. CALCULATED O EXPERIMENTAL 30 20 ~--^o 10 i i 1 1 20 25 If (ma) Fig. 7 Variation of dc common-emitter current gain with emitter current. (After Webster, Ref. 18.) (c) the base current is the difference between the emitter and collector currents. Figure 8 shows the hole distribution in the base region of a p-n-p transistor for various applied voltages; 19 all dc characteristics can be interpreted by means of these diagrams. For a given transistor the emitter current I E and collector current I c are functions of the applied voltages V EB and V CB , i.e., from Eqs. (9) and (10) h=f\(V EB , V CB ) and I c =f 2 (V EB , V CB ). To give all the relationships be- tween the terminal voltages and currents, two sets of curves are thus required. Of the many possible characteristics the input and output current-voltage curves are of*greatest practical importance. A typical set of common-base characteristics is shown in Fig. 9. The input characteristics I E versus V EB with V CB as a parameter, as shown in Fig. 9(a), are similar to those of a forward-biased p-n junction. The emitter character- istic depends slightly on the collector voltage V CB because of the variation of the collector depletion width with V CB . This is referred to as the Early effect. 20 In Fig. 8(b), as V CB increases, the depletion layer edge moves from W to W. The gradient at x = is s slightly increased; this, in turn, causes a slight increase of the emitter current for a given emitter voltage. 274 Junction Transistors V,r=0 r (Ap) E It M no ^ \ h \ V EB =0 w w NORMAL POLARITIES V CB =CONST V EB VARYING I c = I c >0 BOTH JUNCTIONS FORWARD BIAS NORMAL POLARITIES V EB = CONST V CB VARYING (b) l'r CO 'v EB =o W !cO CONDITIONS WITH CURRENTS IcO & Ico (e) POSITIVE v (c) BOTH JUNCTIONS REVERSE BIAS (f ) Fig. 8 Hole density in the base region of a p-n-p transistor for various applied voltages. (After Morant, Ref. 19.) The common-base output characteristics [7 C versus V CB with I E as a parameter as shown in Fig. 9(b)] show that the collector current is practically equal to the emitter current (a « 1) and virtually independent of V CB . The collector current remains practically constant, even down to zero voltage where the excess holes are still extracted by the collector as indicated by the hole profile shown in Fig. 8(c). To reduce the collector current to zero it is necessary to apply a small forward voltage ( ~ 1 volt for Si) to the collector. This sufficiently increases the hole density at W to make it equal to that of the emitter at x = 0, as shown in Fig. 8(d). The collector saturation current I co (also denoted by I C bo) is measured with the emitter open circuit. This current is considerably smaller than the ordinary reverse current of a p-n junction because the presence of the emitter junction with a zero hole gradient at x = (corresponding to zero emitter current) reduces the hole gradient at x = Was shown in Fig. 8(e). The current I co is therefore smaller than when the emitter junction is short-circuited (V EB — 0). The current Iq is associated with the common-emitter con- figuration and will be considered later. 2 Static Characteristics 275 o 1 V CB =40V | , 20V i 10V i r / / -> w 0.1 0.2 0.3 0.4 V ES (VOLTS) (a) l E = 5 ma 4 ma 3 mc 2ma ' ,1ma J ( r r co X 'VCBO 2 I . "5 I0 20 ^ 30 40 50 60 V CB (VOLTS) (b) Fig. 9 (a) Input characteristic and (b) output characteristic of a typical p-n-p transistor in common-base configuration (Ref. 19.) As V CB increases to the value V CBO the collector current starts to increase rapidly. Generally this is due to the avalanche breakdown of the collector- base junction, and the breakdown voltage is similar to that considered in Chapter 3 for p-n junctions. For a very narrow base width or a base with relatively low doping, the breakdown may also be due to the punch-through 276 Junction Transistors effect, i.e., the neutral base width is reduced to zero at a sufficient V CB and the collector depletion region is in direct contact with the emitter depletion region. At this point the collector is effectively short-circuited to the emitter, and a large current can flow. (4) Common-Emitter Configuration We now consider the I-V characteristics of the common-emitter con- figuration. The only difference between the common-emitter and common- base configurations is that in one case the voltages are referred to the emitter and in the other to the base. Therefore, the I- V characteristics of a common- emitter configuration can be completely derived from those of the common- base configuration discussed previously. The common-emitter input (I B versus V BE ) and output (I c versus V CE ) characteristics of a typical p-n-p transistor are shown in Fig. 10(a) and 10(b) respectively. From the sign convention of Fig. 2 the base current is given by I B = I E -I C = I E - (I co + tx I E ) = (l-oc )/ £ -/ co . (27) The base current therefore has two components: the current (1 — a )/ £ due to an inward flow of electrons to replace those lost in the hole injection and diffusion processes, and the leakage current of the collector I co . Thus for a given V CE the base current is essentially proportional to the emitter current. However as shown in Fig. 10(a), its magnitude is reduced by (1 — a ) and it is displaced along the current axis by an amount I co . Since the sum of the voltages around a closed loop is zero, for a given V BE , as V CE increases, V CB will decrease. The current I E is thus reduced, Fig. 8(b); this in turn causes a reduction of I B as V CE increases. For the common-emitter output characteristics we note that in Fig. 10(b) there is considerable current gain since, for a « 1, the common-emitter current gain fi >l. The saturation current I co ' , which is the collector current with zero base current (base open-circuited), is much larger than I co . This is because, from Eq. (27), the emitter current for zero base current is given by IeVb = 0) = -^-. (28) 1 -a Since the emitter and collector currents are equal in this condition, Fig. 8(e), Ico — Ie an d therefore I ceo — ^co = T\ \ ~ Po Ico = Po Icbo (29) (1 ~ a ) for a « 1 {I c0 ' may also be denoted as I C eo)- 2 Static Characteristics 277 20 -10 1 VCE ■fr\ JIh i r ' J / 1 i A # > 0.1 0.2 V BE (VOLTS) (a) 0.3 0.4 Fig. 10 (a) Input characteristic and (b) output characteristic of a typical p-n-p transistor in common-emitter configuration. (Ref. 19). Because of the variation of base width with collector voltage, j5 also increases with V CE . The lack of saturation in the common-emitter output characteristic is due to the large increase of fi with V CE . For small collector- emitter voltages the collector current falls rapidly to zero. The voltage V CE is divided between the two junctions to give the emitter a small forward bias 278 Junction Transistors and the collector a larger reverse bias. To maintain a constant base current, the potential across the emitter junction must remain essentially constant. Thus when V CB is reduced below a certain value (~ 1 volt for the Si transistor), the collector junction will reach zero bias as shown in Fig. 8(c). With further reduction in V CE the collector is actually forward-biased as shown in Fig. 8(d), and the collector current falls rapidly because of the rapid decrease of the hole gradient at x = W. The breakdown voltage under the open-base condition can be obtained as follows. Let M be the multiplication factor at the collector junction and be approximated by M = 1 -(— V \VcBoJ (30) where V CBO is the common-base breakdown voltage, and n is a constant. When the base is open-circuited, we have I E = I c = /. The currents I co and a I E as shown in Fig. 11 are multiplied by M when they flow across the collector junction. We have M(I co + oc I) = I D ^ — j u T Fig. 11 Breakdown voltage V CBO and saturation current l co for common-base configuration, and correrponding qualities V C eo and l co ' for common-emitter configuration. (After Gartner, Ref. 11.) 3 Microwave Transistor 279 or I = MI CO 1 — a M (31) Current 7 will be limited only by external resistances when cc M = 1 . From the condition a M = 1 and Eq. (30), the breakdown voltage V CEO for the common-emitter configuration is given by *o) 1/n . For OLr VcEO — VcBO\\ 1 , the value of V CEO is much smaller than V CBO , (32) 3 MICROWAVE TRANSISTOR (1) Device Geometry In this section we shall consider transistors operated in the high-frequency region where the range goes up to a few GHz. Figure 12 shows two typical geometries for high-frequency transistors. Both are made using planar tech- nology. An epitaxial wafer of n on n + is used as the substrate. An insulating layer is formed on the surface (such as Si0 2 thermally grown on Si). The T*fr*W"r" 7 COLLECTOR COLLECTOR (a) RING BASE (b) STRIPE BASE Fig. 12 Two typical device geometries for high-frequency and switching transistors. 280 Junction Transistors base-layer diffusion pattern is then cut into the insulating layer employing the photoresist method. After the p-type base diffusion the emitter-layer pattern is formed using similar methods. The emitter junction can be formed by diffusion (in which case the device is called a double-diffused transistor) or by alloy (in which case the device is called a diffused-base transistor). A final metallization process is used to make ohmic contacts to the emitter, base, and collector. A particularly important metallization process is the use of beam-lead technology. 6 Figure 13 shows a silicon high-frequency beam- lead transistor with stripe-base geometry as shown in Fig. 12(b). Metal leads which are about 10 /mi thick are used for structural support of the silicon chip as well as for electrical contacts. This technology also permits making integrated circuits with excellent reliability and electrical performance. Variations in horizontal geometry (such as employing various numbers of BASE COLLECTOR Fig. 13 Beam-lead transistor structure (a) schematic view (b) top view of an actual transistor. (After Lepselter, Ref. 6.) 3 Microwave Transistor 281 emitter and base stripes) yield the different current capabilities of the tran- sistor while changes in doping profiles result in frequency and breakdown voltage differences. For high-frequency applications it is essential that an epitaxial substrate be used in order to reduce the collector series resistance. Processes similar to those described above can be used to fabricate p-n-p transistors. The choice of an n-p-n or p-n-p transistor, as well as the selection of semiconductor material, depends on the circuit application and device technology. We shall compare the performance of n-p-n and p-n-p transistors in Ge, Si, and GaAs in later sections. The differences between a low-frequency transistor and a microwave transistor are in the dimensions of the active areas, and in the control of the wafer and package parasitics. To achieve microwave capability, the dimen- sions of the active areas and the parasitics should be considerably reduced. For microwave applications the stripe-base geometry as shown in Fig. 12(b) is preferred, and the two critical dimensions are the emitter stripe width (S) and the base thickness W B . The reduction of these dimensions over the period from 1952 to 1968 is shown in Fig. 14. Also indicated are the major events (Icm) 1000 < 10 1972 Fig. 14 Reduction of the two critical dimensions, emitter-stripe width and base-layer thickness, over the period 1952 to 1968. Also indicated are the major events associated with transistor development. (After Edwards, Ref. 29.) 282 Junction Transistors associated with transistor development which have been discussed in Section 1. Of particular interest is the development of the diffusion process which is mainly responsible for the reduction of these critical dimensions. At the present time the emitter stripe width can be reduced to less than 1 pirn, and the base thickness, to about 0. 1 pirn. (2) Cutoff Frequency The cutoff frequency f T is an important figure-of-merit for high-frequency transistors and is defined 21, 22 as the frequency at which the common emitter, short-circuit current gain h fe ( = dI c j6I B ) is unity. The cutoff frequency is related to the physical structure of the transistor through the emitter-to- collector delay time, x ec , by A= i- (33) Delay time x ec represents the sum of four delays encountered sequentially by the minority carriers as they flow from the emitter to the collector, as follows. A. The Emitter Depletion-Layer Charging time kT r E = r e \C e + C c + C p ] « — [C e + C C + C p ] (34) where r e is the emitter resistance, C e the emitter capacitance, C c the collector capacitance, C p any other parasitic capacitance connected to the base lead, and I E the emitter current which is essentially equal to the collector current I c . The expression for r e is obtained by differentiation of the Shockley equation with respect to the emitter voltage. B. The Base-Layer Charging Time W 2 X ° = Ws (35> where r\ = 2 for the uniformly doped base layer. The expression Eq. (35) can be obtained by substituting L B = *Jd b t b /(1 +jcox B ) in Eqs. (25) and (26) to give the small-signal common-base current gain: 23 coshjw A+>M 1+ ^ V V D B x B ) 2D B x t (36) 3 Microwave Transistor 283 The charging time x B is defined as l/27i/ a where f a is generally called the alpha cutoff frequency at which the gain has fallen to If \/2 of its low-frequency value. In Eq. (36) the contribution of the emitter efficiency y to the charging time is small and is neglected. For a nonuniformly doped base, e.g., the drift transistor shown in Fig. 4, the factor r\ in Eq. (35) should be replaced by a larger number. If the built-in field S hi is a constant the factor r\ is given by 24,25 3/2- n i + (37) where S = 2D r \\l b W. For S hi jS = 10, rj is about 60; thus considerable re- duction in x B can be achieved by a large built-in field. This built-in field can be obtained automatically in a practical transistor using the base-diffusion process. A typical example is shown in Fig. 15 for a high-frequency double- diffused epitaxial n-p-n transistor. Doping in the base varies from about 10 17 to less than 10 15 cm -3 within 2 /mi; this gives rise to a built-in field of about 150 V/cm [Eq. (13)]. C. Collector Depletion-Layer Transit Time (Fig. 3) (x c -W) T c = — z (3o) 2v s i where v sl is the scattering-limited drift velocity in the collector. D. Collector Charging Time T c ' = r c C c (39) where r c is the collector series resistance and C c the collector capacitance. For epitaxial transistors, r c can be substantially reduced and the charging time Xq can be neglected in comparison with other delay times. The time constant r b C c does not appear in f T but does affect high-fre- quency gain. [See Eqs. (53)-(55).] The alpha cutoff frequency f a defined in Eq. (36) is meaningful for noise calculations, Eq. (56), in which phase relations between emitter and collector current are important. For calculations of cutoff frequency f T , however, we should consider the sum of the delay times, Eqs. (34), (35), and (38): Tec = T £ + T B + T c . (40) For microwave transistors, r B can be comparable or even smaller than other delay times. The cutoff frequency f T is given by: 2nx or , kT(C e + C c + C p ) + W^_ + (x e - W) ql c r)D B 2v s (41) 284 Junction Transistors / (EMITTER) ' (BASE)' /" (EPITAXIAL LAYER) (SUBSTRATE) io'- i a 2 4 6 8 10 12 14 16 DISTANCE [p.m) Fig. 15 One-dimensional double-diffused n-p-n transistor for high-frequency operation. It is clear from the above equation that, to increase the cutoff frequency, the transistor should have a very narrow base thickness, which is one of the critical dimensions shown in Fig. 14, and a narrow collector region, and should be operated at a high-current level. As the collector width decreases, however, there is a corresponding decrease in breakdown voltage. Therefore compromises must be made for high-frequency and high-voltage operation. 3 Microwave Transistor 285 As the operating current increases, the cutoff frequency decreases because the emitter charging time x E is inversely proportional to the current. However, as the current becomes sufficiently high that the injected minority carrier density is comparable to or larger than the base doping concentration (the so-called high-injection level), the high-field region originally located at the transition region between the base and the epitaxial layer is relocated to the interface between the epitaxial layer and the substrate, i.e., the effective base thickness increases from W B to W B + W c (see Fig. 15). This high-field- relocation phenomenon is referred to as the Kirk effect 26 which may con- siderably increase the delay time x ec . It is important to point out that under a high-injection condition where the currents are large enough to produce substantial fields in the collector region, the classic concept of well-defined transition regions at emitter-base and base-collector junctions is no longer valid. One must solve the basic differential equations (current density, con- tinuity, and Poisson's equations) numerically with boundary conditions applied only at the electric terminals. The computed results 27 of the electric field distributions for |F CB | = 2 volts and various collector current densities are shown in Fig. 16 for the doping profile of Fig. 15. We note that, as the current increases, the peak electric field moves from point A to point B. Figure 17 shows the corresponding hole and electron distributions for | V CB \ = 2 volts. We note that, as the current increases, the boundary between the base and collector junction becomes less well-defined. Figure 18 shows the calculated emitter-to-collector delay time x ec which is defined in its most rigorous sense as dQ/dJ c where Q is the total charge per unit area of all the holes in the device (for an n-p-n transistor), i.e., of those carriers that com- municate with the base terminal. At low current densities, x ec decreases with J c as predicted by Eq. (41), and the collector current J c is carried mainly by the drift component such that Jc^qficNc^c (42) where pi c » ^C) an d $c are the mobility, impurity doping, and electric field respectively in the collector epitaxial layer. As the current increases, delay time x ec reaches a minimum and increases rapidly around J x where J t is the current at which the largest uniform electric field i c = (V co + \ V CB \)/ W c can exist where V co is the collector built-in potential and V CB is the applied collector-base voltage. Beyond this point the current cannot be carried totally by the drift component throughout the collector epitaxial region. The current J t is given from Eq. (42) as Ji = qVcN c (V co +\V CB \)IW c . (43) Because of the above-mentioned Kirk effect, there is an optimum collector 286 Junction Transistors W B h w c " n + P n (SUBSTRATE) Fig. 16 Electric field vs. distance for | V CB \ = 2 volts and various collector current den- sities. The doping profile is shown in Fig. 15. (After Poon et al., Ref. 27.) current which gives the maximum cutoff frequency. It should be pointed out that as \V CB \ increases the corresponding value of / t will also increase. We shall now compare the theoretical and experimental cutoff frequencies of various transistors on the basis of unique device geometry and typical material parameters. 28 ' 29 The device geometry that we shall use is shown in Fig. 12(b) with state-of-the-art dimensions of W B = 0A5 /mi, W c = 1/rni, and S = 1 im\. The typical material parameters to be used for the calculation are listed in Table 6. 1 . The theoretical cutoff frequencies [as calculated from Eq. (41) with J c = 1000 amp/cm 2 ] and the experimental results are listed in Table 6.2. We note that, for a given semiconductor, the n-p-n transistor has a higher cutoff frequency than does the p-n-p transistor. This is mainly because 3 Microwave Transistor 287 DISTANCE (/im) Fig. 17 Carrier concentrations vs. distance for [ V CB \ = 2volts and various collector current densities. The doping profile is shown in Fig. 15. (Ref. 27.) I v cb| --Z VOLTS o <s> |0"9 u h io-io i I Ji I0 2 J c (AMP/cm ; I0 3 I0 4 Fig. 18 Emitter-collector delay time r ec as a function of collector current density for the device shown in Fig. 15. (Ref. 27.) 288 Junction Transistors TABLE 6.1 PARAMETERS FOR CALCULATION OF TRANSISTOR PERFORMANCE Parameters Unit Ge Si GaAs /*„ (for N B = 4 x 10 17 cm- 3 ) cm 2 /V-sec 2300 480 2800 Up (for N B = 4 x 10 17 cm- 3 ) cm 2 /V-sec 540 270 200 v sl (electrons) cm/sec 6 x 10 6 10 7 10 7 v s i (holes) cm/sec 6 x 10 6 6 x 10 6 10 7 Dielectric constant 16 12 12 Breakdown field <? m (foriV c = 3 x 10 15 cm- 3 ) V/cm 2 x 10 5 3.4 x 10 s 3.8 x 10 5 TABLE 6.2 CUTOFF FREQUENCY f T (GHz) Transistor Ge Si GaAs Theoretical n-p-n 10.4 8.6 18.5 p-n-p 6.7 5.2 5.0 Experimental n-p-n >7 >8 1.4 p-n-p >6 >5 0.7 the minority carrier (electron) mobility in the base region and the majority carrier (also electron) scattering-limited velocity in the collector region are larger for an n-p-n transistor than the corresponding quantities for a p-n-p transistor. Among the three semiconductors considered, the GaAs n-p-n transistor can theoretically give the highest cutoff frequency, and Ge transistors have some margins over Si transistors. In practice, however, the Si transistor with its more advanced device and material technology, gives a performance com- parable or superior to that of the Ge transistor. The GaAs transistors suffer from many technological problems which include poor starting material (an epitaxial substrate with a high density of defect and trapping centers), diffi- culty in control of the impurity profile, difficulty in the insulator masking process, thermal conversion (e.g., it converts from p-type to «-type under high-temperature treatment), and copper contamination. 293 In addition the 3 Microwave Transistor 2g9 GaAs transistors also suffer from fundamental physical limitations such as low hole mobility, low thermal conductivity, and low minority-carrier life- time (as a result of its direct band gap). Nevertheless, it should be pointed out that if the technological problems of GaAs are solved eventually, one will be able to take advantage of many interesting properties of GaAs to extend the Ge and Si attainable performance (a) to higher frequencies because of the high n„ and v sl in GaAs, (b) to higher power because of its high breakdown field and wide band gap, and (c) to cryogenic operation because of the shallow impurity ionization energies in GaAs (refer to Fig. 12 in Chapter 2). (3) High-Frequency Characteristics There are various approaches to characterizing the performance of high- frequency transistors. The most common approach is a combination of internal-parameter and two-port (four-terminal) analyses. We shall use the simplified equivalent circuits as shown in Fig. 19 with the following internal parameters: emitter resistance r e , base resistance r b , emitter depletion-layer capacitances C e , collector depletion-layer capacitance C c , and small-signal common-base current gain a. We shall consider the stripe-base geometry shown in Fig. 12(b) with emitter stripe width S, length L, and spaced S from the base stripes on either side. The collector capacitance can be approximated by C c - C SL where C is the collector capacitance per unit area. The base resistance for this geometry is approximately r b = r SjL with r Q ~p B \W where p B is the average resistivity of the base layer. The small-signal common-base current gain a is defined as dl c fe = dT B - < 45 ) " = h » = ar E - (44) Similarly the small-signal common-emitter current gain fi is defined as '-«.-£ From Eqs. (21), (22), (44), and (45) we obtain a = a + I E — ° di E e-h + iM dI B and '.-(7^- (46) 290 Junction Transistors '"•b (a) COMMON BASE O ► VvY- INPUT — lb) COMMON EMIT T ER OUTPUT"^ Z L OUTPUT — ■ Z L Fig. 19 Simplified high-frequency equivalent current for (a) common-base and (b) common-emitter configurations. At low-current levels both a and ft increase with current as shown in Fig. 7, and a and /? are larger than their corresponding static values. At high-current levels, however, the opposite is true. We shall now define several figures of merit for a high-frequency transistor: A. Power Gain: The ratio of power into load impedance Z L to the input power into the two-port network. In terms of hybrid two-port para- meters, i.e., v; ~hu h l2 ~ h 21 h 22J L r 2j (47) 3 Microwave Transistor 291 we have G p (Power Gain) = W^f @e£(h ll+ A h Z L )(l + h 22 Z L )*-] K > where 0le means the real part, A* = (h xl h 22 - h 12 h 21 ), Z L is the load impe- dance, and the asterisk denotes the complex conjugate. B. Stability Factor: The value of the stability factor K which is indi- cative of whether or not a transistor will oscillate upon application of a com- bination of passive load and source admittance with no external feedback. The factor is given by s \_2^e{h lx )0te{h 22 )- 0te{h l2 h 2l )] \h 12 h 21 \ (49) If K> 1, the device is unconditionally stable, i.e., in the absence of external feedback, a passive load or source impedance will not cause oscillation. If K < 1, the device is potentially unstable, i.e., the application of certain com- binations of passive load and source impedance could induce oscillation. C. Maximum Available Gain (MAG): The maximum power gain that can be realized by a particular transistor without external feedback. It is given by the forward power gain of the transistor when the input and output are simultaneously and conjugately matched. MAG is denned only for an unconditionally stable transistor (K> 1), and is stated: MAG Jh^hnM. m It is obvious from Eq. (50) that, when K< 1, the denominator becomes a complex number and MAG is not defined. The measured MAG's for state- of-the-art transistors 29 are shown in Fig. 20. At 4 GHz, about 5-dB MAG has been realized in both Si and Ge transistors. The GaAs device is a junction field-effect transistor (JFET) with metal-semiconductor gate contact. This device will be discussed in Chapter 8. Also shown are the noise figures to be discussed later. D. Unilateral Gain: The forward power gain in a feedback amplifier having its reverse power gain set to zero by adjustment of a lossless reciprocal feedback network around the transistor. Unilateral gain is independent of header reactances and common-lead configuration. It is defined as u s l^ + M' 292 Junction Transistors 5 6 7 8 9 10 Fig. 20 Maximum available gain (MAG) and noise figure (NF) vs. operating frequency for Ge, Si junction transistors and GaAs junction field-effect transistor. (After Edwards, Ref. 29. ) For the equivalent circuit shown in Fig. 19(a) the gain is given by 30 u = 2nfr e C c ( LTifr C *nfr b C e {-Sm[a(fy] + 1+4 J f m 2ri (52) where /m[a(/)] is the imaginary part of the common-base current gain. If a(/) can be expressed as a /(l +jflfr)> an( i if /</r> ^w[a(/)] can De approximated by — cc SISt or — a o ft)T ec • The gain is then given by C7~ <x «o// 2 ~ 16n 2 S 2 r C rf c (53) where the relationships r b = r SjL and C c = C SL have been used, and t* c is the sum of x ec and r e CJa . If a « 1 and x ec > r e C c , Eq. (53) reduces to the simplified form Sr StIS 2 u = Snf 2 r b C c SnS 2 r C (54) 3 Microwave Transistor 293 E. Maximum Oscillation Frequency: The frequency at which uni- lateral gain becomes unity. From Eqs. (53) and (54) the extrapolated value of /max is given by • /max " 4kS or f ~ J max — 2S . r ^O^e fl 1/2 2nr C 1/2 (55a) (55b) We note that both unilateral gain and maximum oscillation frequency will increase with decreasing S. This is the reason that the emitter stripe width S is one of the critical dimensions for microwave application. F. Noise Figure: The ratio of total mean square noise voltage at the output of the transistor to mean square noise voltage at the output resulting from thermal noise in source resistance R g . At lower frequencies the dominant noise source in a transistor is due to the surface effect which gives rise to the 1// noise spectrum. At medium and high frequencies the noise figure is given by 30a NF= 1 +-£ + t , r^ (l-a )[l+(l-« )- 1 (///J 2 ](/g <t + r b + r e f R„ 2R. + 2a r e R, (56) where R g is the generator resistance. From Eq. (56) it can be shown that at medium frequencies where f<f a , the noise figure is essentially a constant determined by r b , r e , (1 - « ), and R g . There is an optimum termination R g which can be calculated from the condition d(NF)/dR g = 0. For a low- noise design, a low value of (1 - a ), that is, a high p , is very important. At high frequencies beyond the "corner" frequency /= VF^a /« the noise figure will increase approximately as/ 2 . The calculated unilateral gain from Eq. (54) and the optimum noise figure at 4 GHz are listed in Table 6.3. We have used the device geometry and material parameters considered in Section 3(2) and Table 6.1. We note that for a given semiconductor the p-n-p transistor has a slightly higher unilateral gain. This is mainly due to the smaller resistance r b in an «-type base. The same reason is also responsible for the lower noise figure in p-n-p transistors. The noise figure as a function of frequency in the microwave frequency region is shown in Fig. 20. The Ge p-n-p transistor with its small base resistance shows the lowest noise figure. Figure 21 shows the optimum noise figure versus frequency for a state-of-the-art Ge transistor. We note that the curve 294 Junction Transistors 30 uj 20 o 10 - Ge p -n-p TRANSISTOR - /" f NOISE REGION - 6dB/0CTAVE 1 N REGION - L "W HUE" NOISE REGION \ / / / 1 1 i 1 l 10' 10° 10 3 10' FREQUENCY (Hz) 10" Fig 21 Optimum noise figure vs. frequency for a Ge microwave transistor. (After Sevick, Ref. 45.) TABLE 6.3 UNILATERAL GAIN AND NOISE FIGURE OF MICROWAVE TRANSISTORS AT 4 GHz (dB) U and NF Type Ge Si GaAs Unilateral Gain n-p-n 18.1 12.4 16.1 p-n-p 22.1 12.6 19.8 Optimum Noise Figure n-p-n 3.6 5.0 3.3 p-n-p 2.5 4.8 2.3 can be roughly divided into three regions: the 1// noise region, the "white" noise region in which the noise figure is independent of frequency, and the 6-dB/octave noise region in which the term (fjf d ) 2 dominates. 4 Power Transistor 295 4 POWER TRANSISTOR (1) General Consideration Power transistors are designed for power amplification and for handling large amounts of power. Although there is no well-defined boundary between power transistors and microwave transistors, usually power gain and efficiency are the prime considerations for a power transistor while cutoff frequency and noise figure are the prime considerations for a microwave transistor. Power output versus frequency for Si transistors 31 is shown in Fig. 22. At higher frequencies the power output varies approximately as l// 2 as a result of the limitations 13 of avalanche breakdown field and carrier scattering- limited velocity as discussed in Chapter 5. At lower frequencies, however, the limitation on power output is mainly due to the thermal effect. As the power increases, the junction temperature 7, increases The maximum 7} is limited by the temperature at which the base region becomes intrinsic. Above 7} the transistor action ceases, since by then the collector is effectively short-cir- cuited to the emitter. To improve transistor performance, one must improve the encapsulation sufficiently to provide an adequate heat sink for efficient thermal dissipation, and must use materials with large band gaps which will allow higher-temperature operation. Because of these requirements Ge transistors have only limited application, and most power transistors are made from Si. GaAs transistors, despite their technological problems, have already shown excellent temperature per- formance and potentials as high-power transistors. 32-35 Figure 23 illustrates the temperature dependence of the dc common-emitter current gain and the 50-MHz small-signal power gain of a double-diffused (zinc for base dopant and tin for emitter dopant) n-p-n GaAs transistor. 32 The power gain decreases only about 3 dB from room temperature to 350°C. The current gain remains essentially constant over the whole temperature range. This excellent per- formance at high temperatures can be expected for GaAs because of its wide' band gap. It has also been established that the above transistor can be fully operated at liquid helium temperature (4°K); this is mainly because the impurity levels are shallow enough that no substantial carrier "freeze-out" occurs at 4°K. We shall now compare the performances of Ge, Si, and GaAs power transistors using the device geometry shown in Fig. 12(b), and the material parameters listed in Table 6.1. To handle a large amount of power, the stripe width (S) and the base thickness (W B ) should be appropriately ad- justed. In addition, more stripes for emitter and base contacts or overlay structures 31 should be used to handle the large input current and to distri- 296 Junction Transistors 01' 1 1 MIN I 0.01 0.1 f(GHz) Fig. 22 Power output vs. frequency for silicon transistors. (After Carley, Ref. 31.) bute the current more uniformly. The overlay structure consists of (a) many small separate emitter elements, instead of a continuous emitter stripe, to increase the overall emitter periphery, (b) an extra diffused base region to distribute base current uniformly over all the separate emitter segments, and (c) an emitter metallization which overlies the base region and connects all the separate emitter elements in parallel. The basic comparison is shown in 4 Power Transistor 297 oa / PG -X /3o ^*-x • — •— ^ X L •^^^ \ GaAs n-p- I c = 80 ma V CB = 20 V n 100 T; CO 200 300 400 Fig. 23 Common-emitter current gain and power gain vs. temperature for a GaAs n-p-n transistor. (After Becke et al., Ref. 32.) TABLE 6.4 PERFORMANCE OF POWER TRANSISTORS Quality Ge (p-n-p) Si (n-p-n) GaAs (p-n-p) Band Gap (eV) at 300°K 0.66 1.12 1.43 Operating Voltage (volts) 20 50 55 Max. Junction Temp. (7}) 100°C 200°C 450°C Thermal Cond. (k) 0.5 : 1 : 0.3 <f V 2 x 10 11 4x 10 u V Power x Impedance /s — ^-^- (V/sec) 27T 4.6 x 10 11 Table 6.4. It is apparent from this table that, for a given collector doping profile, the operating voltage increases with the semiconductor band gap, E g , since the breakdown voltage 36 increases with E g . The maximum junction temperature is the temperature at which the base region becomes intrinsic. 2'8 Junction Transistors In this respect GaAs is superior by far in comparison with Ge and Si. For heat dissipation, an important parameter is thermal conductivity; among the three best-known semiconductors, Si has the largest value. The ultimate limitation 13 on power-frequency performance is given by the expression S m v s ij2n where i m is the breakdown field and v sl is the scattering-limited velocity. Of the three semiconductors considered, Ge has the lowest value, and values for Si and GaAs are comparable. With the improvement of device technology it is expected that in the near future a substantial increase in output power can be achieved in the whole frequency spectrum and in par- ticular in the microwave region as shown in Fig. 22 in which the power transistor and microwave transistor emerge. (2) Second Breakdown The use of power transistors and other semiconductor devices is often limited by a phenomenon called "second breakdown" whose initiation is manifested by an abrupt decrease in device voltage with a simultaneous internal constriction of current. The second breakdown phenomenon was first reported by Thornton and Simmons, 37 and has since been under exten- sive study in high-power semiconductor devices. 38,39 For high-power tran- sistors it is important to operate the device within a certain safe region so that one can avoid the permanent damage caused by the second breakdown. The general features of the I c versus V CE characteristics of a transistor under second breakdown conditions are shown 38 in Fig. 24. The symbols F, 0, and R stand respectively for constant forward-, zero-, and reverse-base current drive. The initiation of second breakdown for each of the three base drive conditions is indicated by the abrupt drop in V CE at the instability points 1(F), 1(0), and I(R). The experimental results can generally be treated as consisting of four stages : the first stage leads to instability, J, at the breakdown or breakover voltage, the second, to switching from the high- to the low- voltage region, the third to the low- voltage high-current range; the fourth stage to destruction as marked by D in Fig. 24. The initiation of instability is mainly due to the temperature effect. When a pulse with given power P = I c • V CEO is applied to a transistor, there is a time delay before the device is triggered into the second breakdown condition. This time is called the triggering time. A typical plot 40 of the triggering time versus applied pulse power for various ambient temperatures is shown in Fig. 25. For the same triggering time t, the triggering temperature T tr , which is the temperature at the "hot" spot prior to second breakdown, is found to be approximately related to the pulse power P at different ambient tempera- tures T by the thermal relation: T tr -T = QP (57) 4 Power Transistor 299 SECOND BREAKDOWN I.tF) 1(0) I(R) V CE (VOLTS) Fig. 24 Collector current vs. collector-emitter voltage under second breakdown condition. F, 0, or R indicates forward-, zero-, or reverse-base drive, respectively. / and D indicate the initiation of instability and destruction, respectively. (After Schafft, Ref. 38.) where Q is a constant. From Fig. 25 we note that for a given ambient tem- perature the relationship between the pulse power and the triggering time is given approximately as t ~ exp[— C 2 P~\ where C 2 is a constant. Substitution of Eq. (57) into the above equation yields exp L C x (T tr - T ) (58) (59) 300 Junction Transistors 2x10 L V \ i 1 I35°C ' A YC- 87 ° 20°C C C 7°C 5 \\w\ 5 10 15 APPLIED PULSE POWER (WATTS) 20 Fig. 25 Second breakdown triggering time vs. applied pulse power for various ambient temperatures. (After Melchior and Strutt, Ref. 40.) The triggering temperature T tr depends on various device parameters and geometry. For most silicon diodes and transistors it is found that T tr is the temperature at which the intrinsic concentration n { equals the collector doping concentration. The location of the "hot" spot is usually near the center of the device. For different doping concentrations the values of T tr will vary, and for different device geometries the value of C 2 \C X will vary. This results 4 Power Transistor 301 in a large variation of the triggering time as a result of its exponential de- pendence on the above parameters in Eq. (59). After instability the voltage collapses across the junction, and this is the second stage of the breakdown process. During this stage the resistance of the breakdown spot becomes drastically reduced. In the third low-voltage stage the semiconductor is at high temperature and is intrinsic in the vicinity of the breakdown spot. As the current continues to increase, the breakdown spot will melt, resulting in the fourth stage of destruction. To safeguard a transistor from permanent damage it is necessary to specify the safe operating area. A typical example is shown in Fig. 26 for a silicon power transistor operated in common-emitter configuration. 41 The collector load lines for specific circuits must fall below the limits indicated by the applicable curve. The data are based upon a peak junction temperature Tj of 1 50°C. The solid curves are the upper limits imposed by the second break- for dc and various pulse operating conditions with a 10% duty cycle and with indicated pulse durations. For example, for V CE = 50 volts and a pulse width of 1 ms, the maximum collector current for reliable operation should be about 1 amp. There are two other limitations which are also indicated in Fig. 26. One is the first breakdown voltage V CEO as indicated by the vertical dotted line. The other is the thermal limitation as indicated by the horizontal cr 3 07 §0.5 K (J w 3 _i o " 0.2 Tj = I50 o C SECOND BREAKDOWN LIMITATION THERMAL LIMITATION 2 3 5 7 10 20 30 50 70| COLLECTOR-EMITTER VOLTAGE ,V CE (VOLTS) ' 100 VCEO Fig. 26 Limitations on transistor operation. The vertical dotted lines indicate the maximum voltage due to avalanche breakdown. The horizontal dotted lines indicate the maximum currents due to thermal effect. The solid lines indicate the limitations imposed by second breakdown for various pulse widths of 10% duty cycle. (After Lehner, Ref. 41.) 302 Junction Transistors dotted lines. At high ambient temperatures the thermal limitation reduces the power which can be handled to values less than the limitation imposed by the second breakdown. 5 SWITCHING TRANSISTOR A switching transistor is a transistor, designed to function as a switch, which can change its state, say from the high-voltage low-current (off) con- dition to the low-voltage high-current (on) condition, in a very short time. The basic operating conditions of switching transistors are different from that of microwave transistors. This is because switching is a large-signal transient process, while microwave transistors are generally concerned with small-signal amplification. The basic device geometries, however, are similar to those for microwave transistors as shown in Fig. 12(a) and (b). The most important parameters for a switching transistor are current gain and switching time. To improve the current gain, usually lower doping in the base region is used. The transistor can be doped with gold to introduce mid- gap recombination centers and thus reduce the switching time. A switching transistor can be operated in various switching modes. The three basic modes and their corresponding load lines are shown in Fig. 27(a) and are classified as saturated, current, and avalanche modes which are determined by the portion of the transistor output characteristic curve utilized. 42 The output characteristic curve can be divided into four regions : Region I: cutoff region, collector current off, emitter and collector junc- tions reverse-biased, Region II : active region, emitter forward and collector reverse-biased, Region III : saturation region, emitter and collector both forward-biased, Region IV: avalanche region, collector junction under avalanche break- down. The corresponding minority carrier distributions 43 in the base for the first three regions are shown in Fig. 27(b). For all switching modes the switch-off condition is characterized by an excursion of the load line into the cutoff region of the transistor. The oper- ating mode, therefore, is determined primarily by the direct current level in the switch-on condition and by the location of the operating points. The most common mode of operation is the saturated mode, which most nearly duplicates the function of an ideal switch. The transistor is virtually open- circuited between the emitter and collector terminal in the off condition and short-circuited in the on condition. The current-mode operation is useful for high-speed switching, since the storage delay time associated with the excur- 5 Switching Transistor 303 OFF COLLECTOR VOLTAGE, (a) EMITTER COLLECTOR (b) Fig. 27 (a) Operation regions and switching modes of a switching transistor. (After Roehr and Thorpe, Ref. 42.) (b) Minority carrier densities in the base for cutoff region (I), active region (II), and satura- tion region (III). (After Moll, Ref. 43.) sion of the transistor into the saturation region is eliminated. The avalanche mode operation utilizes the negative-resistance characteristics of transistors which result from operation in the common-emitter breakdown region. How- ever, because of instability problems associated with the negative resistance region, the avalanche-mode circuits do not find general use at the present time. We shall now consider the switching behavior of a transistor based on the Ebers-Moll model. 44 Referring to Eqs. (9) and (10) derived previously, one can write the following general expressions for the total emitter and collector 304 Junction Transistors current: h = a i 1 {e qVEBlkT - 1) + a x 2 (e qVcB/kT - 1) (60) I c = a 2l (e qVEBlkT - 1) + a 22 (e« KcB/fcT - 1). (61) The coefficient a's can be determined from the following four quantities which can be directly measured: I EO : the reverse saturation current of the emitter junction with collector open-circuited, e qVEBlkT <l, and I c = 0. I co : the reverse saturation current of the collector junction with the emitter open-circuited, e qVcB/kT <1, I E = 0. ocjv : the normal current gain under the normal operating conditions where the emitter is forward-biased, and the collector is reverse-biased. The collector current is given by I c = — % I E + I co . (Xji the inverse current gain under inverted operating conditions, i.e., emitter reverse-biased and collector forward-biased. The emitter current is given by I E = — aj/ c + I eo . For most transistors a N > a 7 . Because the emitter area is usually smaller than the collector area, the latter is much more effective in collecting the carriers which diffuse away from the emitter than vice versa. From the above quantities and from Eqs. (60) and (61), we obtain the co- efficients : a - - (1 -ajva 7 ) M co (1 -a^) a / (62) a N l EO «22 = - (1 -CL N aj) Ico (1-a^aj) It can be shown that a l2 = #2i> tn i s a iho = a Jv^£o • In Regions I and II the collector junction is reverse-biased. Equations (60) through (62) reduce to j _Jeo_ eqVEB/kT + V-«s)Ieo ^ (63a) 1 — ct N cc t 1 — a N aj = ct N I EO eqVEB/kT + (1 ~ «iVco (63b) 1 — a^aj 1 — ct N Ui 5 Switching Transistor 305 qV EB /kT 1-auCt, o EO ► i VW 1 r EL -o (I-OnUeo l-a N a T o -V\Ar o x co -o c (a) REGION 181 I E r EV E O * VvV- V EB Q b ♦ IB B (b) REGION HI Fig. 28 Equivalent circuits for switching transistor (a) in Regions I and II, (b) in Region III. (After Ebers and Moll, Ref. 44.) r cv r c -W/\/ * — oc Q V CB The equivalent circuit corresponding to Eq. (63) is shown in Fig. 28(a). In this circuit, base resistance r b , emitter leakage resistance r EL , and collector leakage resistance r CL have been added to account for the finite resistivity of the semiconductor and the finite junction conductances. In Region III it is most convenient to consider the currents as independent variables. From Eqs. (60) through (62) we obtain 306 Junction Transistors Ie + cl^c kT t V CB = — In I C + 0C N I E + 1 (64a) + 1 (64b) The equivalent circuit for this region is shown in Fig. 28(b) where we have also added the base resistance r b , the emitter body (volume) resistance r EV , and the collector body resistance r cv . Equations (60) through (62) form the basis on which a nonlinear large-signal switching problem can be analyzed. The above approach is based on a nonlinear two-diode model and is referred to as the Ebers-Moll model. To characterize a switching transistor, we must consider the following five quantities: current-carrying capability, maximum open-circuit voltage, off impedance, on impedance, and switching time. The current-carrying cap- ability is determined by the allowable power dissipation and is related to the thermal limitation as it would be to a power transistor. The maximum open- circuit voltage is determined by the breakdown or punch-through voltage discussed previously. The impedance at the off or on condition can be ob- tained from Eqs. (60) through (62) using appropriate boundary conditions. For example, for a common-base configuration the off and on impedances are given by V c II c (oS, Region I) ^d -«„«,) (6J) VCO ~ a N 1 EOJ and Vclldon, Region III) = ^ ln(- kl^ill) . (66) qic \ ico ) It is apparent from Eq. (65) that the off impedance will be high for small reverse saturation currents I co and I EO of the junctions. The on impedance, Eq. (66), is approximately inversely proportional to the collector current I c , and is very small when I c is large. In practice the ohmic resistances as shown in Fig. 28(b) will contribute to the total impedance of the transistor and must be added. We shall now consider the switching time, which is that required for a transistor to switch from the off to the on condition or vice versa, where in general the turn-on time is different from the turn-off time. 43 Figure 29(a) shows a switching circuit for a transistor connected in the common-base configuration. When a pulse is applied to the emitter terminal as shown in Fig. 29(b), from time t = to t u Fig. 29(c), the transistor is being "turned on" and the transient is determined by the active region parameters (Region 5 Switching Transistor 307 t-2 t 3 t 4 (c) Fig. 29 (a) Switching circuit using an n-p-n switching transistor. (b) Input emitter current pulse. (c) Corresponding collector current response. r is the turn-on time, Tl the storage time and t 2 the decay time. ' (After Moll, Ref. 43.) II) of the transistor. At time t x the operating point enters the current satura- tion region (Region III). The period of time required for the current to reach 90% of its current saturation value (= V cc jR L ) is called the turn-on time x At time t 2 the emitter current is reduced to zero, and the turn-off transient begins. From t 2 to t 3 the minority carrier density in the base layer is large 308 Junction Transistors corresponding to operation in Region III, Fig. 27(b), but decaying toward zero. During the time r x the collector has a low impedance, and the collector current is determined by the external circuit. At t 3 the carrier density near the collector junction is nearly zero. At this point the collector junction impedance increases rapidly, and the transistor begins to operate in active Region II. The time interval x x is the carrier storage time. After time t 3 transient behavior is calculated from the active region parameters. At time t 4 the collector current has decayed to 10% of its maximum value. The interval of time x 2 , from t 3 to t 4 , is called the decay time. The turn-on time t can be obtained from the transient response in the active region. For a step input function I El the Laplace transform is given by I E1 [s. If the common-base current gain a is expressed as cc N /(l +jco/co N ) where co N is the alpha cutoff frequency at which a/a N = 1/^/2, the Laplace transform of the current gain is 0^/(1 + slco N ). Thus the collector current in the Laplace transform notation is given by 1 + sja> N s The inverse transform of the above equation is given by I c = I El a N (l - *-»*). ( 68 ) If we denote I C1 « V C cI r l as the saturation value of the collector current, t is given from Eq. (68) by setting I c = 0.9 I c x : *• -- b (i — Kkrr-)- (69) (o N Mei ~ q - 9i ciI<Xn/ Based on a similar approach as outlined above, the storage time and decay time for common-base configurations, as obtained by Moll, are given as follows : 43 ^L±^l ln( lE1 ~ lE2 \ (70) w N a> I (l -a N aj) ( I C1 i i a N t 2 = — In— —I (71) co N \0.lI cl -a N I E 2/ where (Oj is the inverted alpha cutoff frequency and I El and I E2 are indicated in Fig. 29. From Eq. (70) we note that the storage time x t becomes equal to zero if the transistor does not enter saturation Region III (as in current mode), because in this case / C1 = a N l E1 . For the common-emitter con- figuration the above equations can be used with some appropriate changes of quantities : for t and t 2 , co N is replaced by its corresponding beta cutoff 5 Switching Transistor 309 frequency, or <o N (l - a N ), I El and I E2 are replaced by I Bl and I B2 respec- tively, and <x N by a w /(l - a A ); for x x the latter two operations apply: I El and I E2 are replaced by I Bl and I B2 respectively, and a N by a N /(l - <%). It is apparent from the above equations that the switching times, i.e., the turn-on time t and the turn-off time fa + t 2 ), are inversely proportional to the cutoff frequencies. To increase the switching speed one must increase the cutoff frequencies. It is important to point out that the cutoff frequencies of most switching transistors (particularly the double-diffused transistors) are limited by the collector storage capacitance which should be reduced in order to increase the cutoff frequency. The switching times are also functions of the emitter and collector current and increase with the current levels. This is the reason that it is difficult to obtain high speed and high current at the same time. Figure 30 shows a plot of the current versus speed for some state-of-the-art switching transistors. 45 We note that for a switching speed of 1 ns (10~ 9 sec) the maximum current level is limited to about 40 ma. For a speed of 1 jis, however, one can operate the transistor at a current of about 10 amp. With improvement in device and material technology a factor-of-five increase in current handling cap- ability is expected in the near future. SWITCHING SPEED (SEC) Fig. 30 Collector current vs. switching speed (ti + t 2 ). for the state-of-the-art transistors. Also shown is the expected performance in the near future. (After Sevick, Ref. 45.) 310 Junction Transistors 6 UNIJUNCTION TRANSISTOR In this section we shall briefly consider a different kind of bipolar transistor called the unijunction transistor which is a three-terminal device having one emitter junction and two base contacts. The unijunction transistor (UJT) has evolved from the alloyed germanium bar structure originally discussed by Shockley et al., 46 At that time the structure was called a filamentary transistor. As the device developed through the cube UJT, 47 the diffused planar structure, 48 and the epitaxial planar structure, 49 the terms double-base diode 50 and finally unijunction transistor 48 ' 51, 52 were coined for the device. A schematic diagram of a UJT is shown in Fig. 31(a). The two base ohmic contacts are called base one (Bl) and base two (52). The p-n junction located OHMC CONTACT ^L */ EMITTER OHMC , . . , CONTACT " iB ' B2 (BASE 2) Bl (BASE I) (a) (b) Fig. 31 Schematic diagram and nomenclature of unijunction transistors. 6 Unijunction Transistor 311 between B\ and B2 is called the emitter junction. The symbol and nomen- clature of a UJT are shown in Fig. 31(b). Figure 32 shows a diffused and an epitaxial UJT structure fabricated using the planar technology. 49 The operation of UJT is mainly dependent upon the conductivity modu- lation between the emitter and the base one contact. In the normal operating condition, the base one terminal is grounded and a positive bias voltage, V BB , is applied at base two as shown in Fig. 31(a). The resistance between B\ and B2 is designated by R BB , that between B2 and A by R B2 , and that between A and B\ by R Bl (R BB = R B2 + Rbi)- The applied voltage estab- -EMITTER BASE OXIDE (a) BASE ONE EMITTER OXIDE n- EPITAXY (b) Fig. 32 (a) Diffused planar structure and (b) epitaxial planar structure of unijunction transistor. (After Sen house, Ref. 49.) 312 Junction Transistors lishes a current and an electric field along the semiconductor bar and produces a voltage on the n side of the emitter junction which is a fraction r\ of the applied voltage V BB . The fraction y\ is called the intrinsic stand-off ratio and is given by !/ = &B1 Rb\ + Ri Rbb (72) When the emitter voltage V E is less than rj V BB , the emitter junction is reverse-biased and only a small reverse saturation current flows in the emitter circuit. If the voltage V E exceeds r\ V BB by an amount equal to the forward voltage drop of the emitter junction, holes will be injected into the bar. Because of the electric field within the semiconductor bar these holes will move toward base one and increase the conductivity of the bar in the region between the emitter and base one. As I E is increased, the emitter voltage will decrease because of the increased conductivity and the device will exhibit a negative resistance characteristic. The emitter characteristic is shown in Fig. 33. The two important points on the curve are the peak point and the valley point. At these two points the slope dV E jdI E = . The region with current less than I P is called the cutoff region. The region between the peak and valley part is called the negative resistance region ; here the conductivity modulation is important. The region with current larger than I v is called the saturation region. The switching time from the peak to the valley point depends on the device geometry and the biasing condition. It has been found that the time is proportional to the distance between the emitter and the base one contact. 53 SATURATION REGION PEAK POINT Fig. 33 Emitter current-voltage characteristic of UJT. 6 Unijunction Transistor 313 |IB2 G 2 = l/R B2 v E o- ■>h g,si/r bi : Gp-i/R p : G n si/ Rn : Ji £ Fig. 34 Equivalent circuit of UJT, (After Clark, Ref. 52.) The basic emitter characteristic can be derived using the equivalent circuit shown in Fig. 34 where G„ and G p are the excess electron and hole con- ductances between the emitter and base one. 52 We shall denote y as the emitter efficiency with which holes move from the emitter to the base one contact. We shall neglect the diffusion, recombination, and surface effects. The current node equations for the top point (at voltage V BB ) and the central point (at voltage V 2 ) are Ibi = (V bb -V 2 )G 2 h + I B 2 = V 2 (G X + G p + G n ). In addition there are the following relationships iff = ^L G P ti P V 2 G p 1 1? (73) (74) (75) 314 Junction Transistors Combination of the above equations yields Me -g +1 -i) v ,^. (76) The emitt er voltage V E is given by the sum of V 2 and V F which is the voltage drop across the diode and is obtainable from the ideal diode equation: where I s is the diode saturation current. We have from Eqs. (76) and (77) v E ^v BB i^ + l _%^ lB + tIJk) (7g) \fip v r bb q \i a / At the peak point, dV E jdI E = 0, we obtain from the above equation: kT qy 1 M _1_\ \»p y) (79) kT /I P \ ^p^riV BB + — \nij\. (80) It is clear from Eq. (79) that, to reduce I P , one must employ semiconductor bars with high resistivity. For a small I P the peak voltage V P is approximately given by r\V BB which is essentially independent of temperature. The valley current can be obtained from Eq. (76) under the condition that V 2 « 0: r(* + i-i) At the valley point the injection level is high, and the value of the emitter efficiency y is reduced. Figure 35 shows some experimental results 54 of a unijunction transistor with Y] = 0.6 and R BB = SkQ. When the base two contact is open (I B2 = 0), the 1-V curve shows essentially the forward characteristic of a simple p-n junction. As V BB increases, the peak voltage point V P and the valley current point also increase. We note that the emitter characteristics are fairly insensitive to temperature variation. This is in agreement with Eqs. (80) and (81). References 315 IN 1 1 1 _ II 1 1 1 1 25°C I25°C Ib2 = ^ 1 1 A 1 1 | \\ V ' ^;V BB =20V \ ' V poV > ■ ^v J ^ ^^3 V E (VOLTS) Fig. 35 Measured emitter characteristics of UJT with 0.6 intrinsic stand-off ratio (77), and R BB = 8kQ. (After Sylvan, Ref. 54.) REFERENCES 1. J. Bardeen and W. H. Brattain, "The Transistor, A Semiconductor Triode," Phys. Rev., 74, 230 (1948). 2. W. Shockley, "The Theory of p-n Junctions in Semiconductors and p-n Junction Transistors," Bell Syst. Tech. J., 28, 435 (1949). 3. R. N. Hall and W. C. Dunlap, "p-n Junctions Prepared by Impurity Diffusion," Phys. Rev., 80, 461 (1950). 3a. G. K. Teal, M. Sparks, and E. Buehlor, "Growth of Germanium Single Crystals Containing p-n Junctions," Phys. Rev., 81, 637 (1951). 3b. W. H. Pfann, "Principles of Zone-Refining," Trans. AIME, 194, 141 (1952). 3c. M. Tanenbaum and D. E. Thomas, "Diffused Emitter and Base Silicon Transistor," Bell Syst. Tech. J., 35, 1 (1956). 3d. C. A. Lee, "A High Frequency Diffused Base Germanium Transistor," Bell Syst. Tech. J., 35, 23 (1956). 3e. C. J. Frosch and L. Derrick, "Surface Protection and Selective Masking During Diffusion in Silicon," J. Electrochem. Soc, 104, 547 (1957). 4. H. C. Theuerer, J. J. Kleimack, H. H. Loar, and H. Christenson, "Epitaxial Diffused Transistors," Proc. IRE, 48, 1642 (1960). 5. J. A. Hoerni, "Planar Silicon Transistor and Diodes," IRE Electron Devices Meeting, Washington, D. C. (1960). 316 Junction Transistors 6. M. P. Lepselter and R. W. MacDonald, "Beam-Lead Devices," also M. P. Lepselter, H. A. Waggener, and R. E. Davis, "Beam-Leaded and Intraconnected Integrated Circuits," IEEE Electron Device Meeting, Washington, D.C. (1964); and M. P. Lepselter, "Beam-Lead Technology," Bell Syst. Tech. J., 45, 233 (1966). 7. W. Shockley, U.S. Patent 2,787,564 (1954). For a view on ion implantation see J. F. Gibbons, "Ion Implantation in Semiconductors — Part I, Range Distribution Theory and Experiments," Proc. IEEE, 56, 295 (1968). 8. F. J. Biondi, Ed. Transistor Technology, Vol. I and II, D. Van Nostrand Co., Inc., Princeton, N.J. (1958). 9. J. N. Shive, The Properties, Physics and Design of Semiconductor Devices, D. Van Nostrand Co., Inc., Princeton, N.J. (1959). 10. A. B. Phillips, Transistor Engineering, McGraw Hill Book Co., Inc., New York (1962). 11. W. W. Gartner, Transistors, Principle, Design and Application, D. Van Nostrand Co., Inc., Princeton, N.J. (1960). 11a. R. L. Pritchard, Electrical Characteristics of Transistors, McGraw Hill Book Co., (1967). 12. SEEC (Semiconductor Electronics Education Committee), Vol. 1-4 (1) R. B. Adler, A. C. Smith, and R. L. Longini, Introduction to Semiconductor Physics, SEEC Vol. 1, John Wiley & Sons, Inc., New York (1966). (2) P. E. Gray, D. DeWitt, A. R. Boothroyd, and J. F. Gibbons, Physical Electronics and Circuit Models of Transistors, SEEC Vol. 2, John Wiley & Sons, Inc. , New York (1966). (3) C. L. Searle, A. R. Boothroyd, E. J. Angelo, P. E. Gray, and D. O. Pederson, Elementary Circuit Properties of Transistors, SEEC Vol. 3, John Wiley & Sons, Inc., New York (1966). (4) R. D. Thornton, D. DeWitt, E. R. Chenette, and P. E. Gray, Characteristics and Limitations of Transistors, SEEC Vol. 4, John Wiley & Sons, Inc., New York (1966). 13. E. O. Johnson, "Physical Limitations on Frequency and Power Parameters of Transistors," IEEE Interc. Conv. Record, Pt. 5, p. 27, (1965). 14. J. L. Moll and I. M. Ross, "The Dependence of Transistor Parameters on the Distri- bution of Base Layer Resistivity," Proc. IRE, 44, 72 (1956). 15. J. E. Iwersen, A. R. Bray, and J. J. Kleimack, "Low-Current Alpha in Silicon Transis- tors," IRE Trans. Electron Devices, ED-9, 474 (1962). 16. H. K. Gummel, "Measurement of the Number of Impurities in the Base Layer of a Transistor," Proc. IRE, 49, 834 (1961). 17. C. T. Sah, R. N. Noyce, and W. Shockley, "Carrier Generation and Recombination in p-n Junction and p-n Junction Characteristics," Proc. IRE, 45, 1228 (1957). 18. W. M. Webster, "On the Variation of Junction-Transistor Current Amplification Factor with Emitter Current," Proc. IRE, 42, 914 (1954). 19. M. J. Morant, Introduction to Semiconductor Devices, Addison- Wesley Publishing Co. Inc., Reading (1964). 20. J. M. Early, "Effects of Space-Charge Layer Widening in Junction Transistors," Proc. IRE, 40, 1401 (1952). References 317 21. R. L. Pritchard, "Frequency Response of Grounded-Base and Grounded-Emitter Transistors," AIEE Winter Meeting (Jan. 1954). 22. R. L. Pritchard, J. B. Angell, R. B. Adler, J. M. Early, and W. M. Webster, "Transistor Internal Parameters for Small-Signal Representation," Proc. IRE 49, 725 (1961). 23. J. L. Moll, Physics of Semiconductors, McGraw-Hill Book Co. (1964). 24. H. Kroemer, "Transistor-I," RCA Laboratories, p. 202 (1956). 25. A. N. Daw, R. N. Mitra, and N. K. D. Choudhury, "Cutoff Frequency of a Drift Transistor," Solid State Electron., 10, 359 (1967). 26. C. T. Kirk, "A Theory of Transistor Cutoff Frequency (f T ) Fall-Off at High Current Density," IEEE Trans. Electron Devices, ED-9, 164 (1962). 27. H. C. Poon, H. K. Gummel, and D. L. Scharfetter, "High Injection in Epitaxial Tran- sistors," to be published. 28. R. Edwards and R. L. Pritchett, "Planar Germanium Microwave Transistors," NEREM Record, p. 246 (1965). 29. R. Edwards, "Fabrication Control Is Key to Microwave Performance," Electronics, pp. 109-113 (Feb. 1968). 29a. C. S. Fuller and K. B. Wolfstrin, "Cu-Doubling Effect in Gallium Arsenide," J. Phys. Chem. Solids, 27, 1889 (1966). 30. S. M. Sze and H. K. Gummel, "Appraisal of Semiconductor-Metal-Semiconductor Transistors," Solid State Electron., 9, 751 (1966). 30a. E. G. Nielson, "Behavior of Noise Figure in Junction Transistors," Proc. IRE, 45, 957 (1957). 31. D. R. Carley, "A Worthy Challenger for rf Power Honors," Electronics, pp. 98-102 (Feb. 1968). 32. H. Becke, D. Flatley, and D. Stolnitz, "Double Diffused Gallium Arsenide Transis- tors," Solid State Electron., 8, 255 (1965). 33. H. Statz, "Double Diffused p-n-p GaAs Transistor," Solid State Electron., 8, 827 (1965). 34. W. Von Munch, H. Statz, and A. E. Blakeslee, "Isolated GaAs Transistors on High- Resistivity GaAs Substrate," Solid State Electron., 9, 826 (1966). 35. W. Von Munch, "Gallium Arsenide Planar Technology," IBM Journal, p. 348 (Nov. „ 1966). 36. S. M. Sze and G. Gibbons, "Avalanche Breakdown Voltages of Abrupt and Linearly Graded p-n Junctions in Ge, Si, GaAs, and GaP," Appl. Phys. Letters, 8, 111 (1966). 37. C. G. Thornton and C. D. Simmons, "A New High Current Mode of Transistor Operation," IRE Trans. Electron Devices, ED-5, 6 (1958). 38. H. A. Schafft, "Second-Breakdown — A Comprehensive Review," Proc. IEEE, 55, 1272 (1967). 39. N. Klein, "Electrical Breakdown in Solids," a chapter in Advances in Electronics and Electron Physics, Ed. by L. Marton, Academic Press (1968). 40. H. Melchior and M. J. O. Strutt, "Secondary Breakdown in Transistors," Proc. IEEE, 52, 439 (1964). 318 Junction Transistors 41. L. L. Lehner, "A Discrete Transistor That Is a Powerhouse," Electronics, pp. 105-108 (Feb. 1968). 42. W. D. Roehr and D. Thorpe, Editors, Switching Transistor Handbook, Motorola Semiconductor Product Inc., Phoenix (1966). 43. J. L. Moll, "Large-Signal Transient Response of Junction Transistors," Proc. IRE, 42, 1773 (1954). 44. J. J. Ebers and J. L. Moll, "Large-Signal Behavior of Junction Transistors," Proc. IRE, 42, 1761 (1954). 45. J. Sevick, unpublished results. 46. W. Shockley, G. L. Pearson, and J. R. Haynes, "Hole Injection in Germanium- Quantitative Studies and Filamentary Transistors," Bell Syst. Tech. J., 28, 344 (1949). 47. V. A. Bluhm and T. P. Sylvan, "A High Performance Unijunction Transistor Using Conductivity Modulation of Spreading Resistance," Solid State Design, 5, pp. 26-31 (1964). 48. L. E. Clark, "Unijunction Transistor," Patent 3,325,705 (1967). 49. L. S. Senhouse, "A Unique Filamentary-Transistor Structure," IEEE Electron Device Meeting, Paper 23.6, Washington D.C. (Oct. 1967). 50. I. A. Lesk and V. P. Mathis, "The Double-Base Diode — A New Semiconductor Device," IRE Conv. Rec, Part 6, p. 2 (1953). 51. F. N. Trofimenkoff and G. J. Huff, "DC Theory of the Unijunction Transistor," Int. J. Electronics, 20, pp. 217-225 (1966). 52. L. E. Clark, "Now, New Unijunction Geometries," Electronics, 38, pp. 93-97 (1965). 53. D. L. Scharfetter and A. G. Jordan, "Reactive Effects in Semiconductor Filaments Due to Conductivity Modulation and an Extension of the Theory of the Double-Base Diode," IRE Trans. Electron Devices, ED-9, 461 (1962). 54. T. P. Sylvan The Unijunction Transistor Characteristics and Applications, Application Note, Semiconductor Products Department, General Electric Co. (May 1965). INTRODUCTION SHOCKLEY DIODE AND SEMICONDUCTOR-CONTROLLED RECTIFIER JUNCTION FIELD-EFFECT TRANSISTOR AND CURRENT LIMITER 7 p-n-p-n and Junction Field-Effect Devices I INTRODUCTION The operations of four-layer p-n-p-n devices are intimately related to the junction transistor (also called the bipolar transistor) in which both electrons and holes are involved in the transport processes. This is in contrast to the junction field-effect devices which are unipolar devices with predominantly majority carriers participating in the current conduction mechanism. Al- though these two classes of devices differ from each other in their funda- mental operation principles, they do have several aspects in common: both were invented by W. Shockley 1 ' 2 in the early 50's, and both can be operated as two-, three-, or four-terminal devices. Following Shockley's concept of the "hook" collector, 1 Ebers 3 developed a two-transistor analogue to explain the p-n-p-n characteristics. The detailed device principles and the first working p-n-p-n devices were reported by Moll et al. 4 This work has since served as the basis for all succeeding work in this field. As a two-terminal device, the Shockley diode (or p-n-p-n diode) possesses the properties of a classical switch which can change from a high- impedance off state to a low-impedance on state or vice versa. The three- terminal p-n-p-n device is called the semiconductor-controlled rectifier (SCR) or thyristor, since in many respects the electrical characteristics are similar to those of the gas thyratron. Because of their two stable states (on and off) and their low power dissipation in these two states, p-n-p-n devices have found unique usefulness in applications requiring latching action and power- handling capability. They have been extensively used as static switches, phase 319 320 p-n-p-n and Junction Field-Effect Devices controllers, power inverters, and dc choppers. These p-n-p-n devices are now available with current ratings ranging from a few milliamperes to hundreds of amperes, and voltage ratings extending above 1000 volts. A comprehensive and authoritative treatment on p-n-p-n device principles and applications has been written recently by Gentry et al. 5 Based on Shockley's theoretical treatment of the "unipolar" transistor, 2 the first working junction field-effect transistor (JFET), has been reported by Dacey and Ross 6 who have also considered the effect of mobility saturation. The generalized theory for JFET with arbitrary charge distributions has been developed by Bockemuehl 7 whose analysis has contributed significantly to the understanding of JFET behavior. As a matter of fact, the insulated-gate field-effect transistor (1GFET), to be considered in Chapter 10, is essentially a JFET with a delta function charge distribution. Because of their high input and output impedance and their square-law transfer characteristics, the JFET's are useful circuit components, particularly for low-noise, low-dis- tortion amplification of low-frequency signals from high-impedance sources. The basic JFET circuit applications have been discussed in detail by Sevin. 8 In this chapter we shall consider the current-voltage characteristics of p-n-p-n and junction field-effect devices under various operating conditions. In addition we shall present graphical solutions for both classes of devices whereby a family of I-V curves can be generated when a single curve is measured. 2 SHOCKLEY DIODE AND SEMICONDUCTOR- CONTROLLED RECTIFIER (1) Basic Characteristics A simple four-layer p-n-p-n structure is shown in Fig. 1. There are three p-n junctions, Jl, J2, and J3 in series. The contact electrode to the outer p layer is called the anode and that to the outer n layer is called the cathode. For a general p-n-p-n device there may be two gate electrodes (also referred to as base) connected to the inner n and p layers. If there is no gate electrode, the device is operated as a two-terminal p-n-p-n, or Shockley, diode. With one gate electrode the device then has three terminals and is commonly called the semiconductor-controlled rectifier (SCR) or thyristor. A typical doping profile of an alloy-diffused p-n-p-n device is shown in Fig. 2(a). An w-type wafer is chosen as the starting material. Then a diffusion step is used to form the p\ and p2 layers simultaneously. Finally an w-type layer is alloyed (or diffused) into one side of the wafer to form the nl layer. A cross-sectional view 5 of a medium-current SCR is shown in Fig. 2(b). The copper block serves as the heat sink. 2 Shockley Diode and Semiconductor-Controlled Rectifier 321 nl T T Jl I J2 \ J3 GATE 2 GATE I (a) GENERAL p-n-p-n I p n P n I p- (b) SHOCKLEY DIODE TT (c) SEMICONDUCTOR-CONTROLLED RECTIFIER (SCR) Fig. 1 (a) General four-layer p-n-p-n structure with anode, cathode, and two gate electrodes. There are three p-n junctions in the series J1, J2, and J3. Current gain <*! is for the p-n-p transistor and oc 2 is for the n-p-n. Under normal bias conditions, as shown, the center junction J2 is reverse-biased and serves as a common collector for the p-n-p and n-p-n transistors. (b) Two-terminal p-n-p-n structure (Shockley diode). (c) Three terminal p-n-p-n structure (semiconductor-controlled rectifier, SCR). The basic current-voltage characteristic of a p-n-p-n device (with or without any gate electrodes) is shown in Fig. 3 which has a number of complex regions. In region 0-1 the device is in the forward blocking or "off" state with very high impedance. The forward breakover (or switching) occurs at 322 p-n-p-n and Junction Field-Effect Devices pi nl P2 n2 10 20 I 1 1 | 1018 -~^\ f 1 10 16 ' f ' 10 l4 r 1 1 x = x=W (a) SILVER COPPER TUNGSTEN SOLDER SILICON SOLDER TUNGSTEN — SILICON Fig. 2 (a) Typical doping profile. The most important parameters are the doping concentration N D and the width W of the n1 layer. (b) A cross-sectional view of a medium-current SCR. (After Gentry et al., Ref. 5.) the place where dVjdl = 0, and we define a switching voltage V s and a switching current I s . Region 1-2 is the negative resistance region, while 2-3 is the forward conducting or " on" state. At point (2) where again dVjdl = 0, we define the holding current /,, and holding voltage V h . Region 0-4 is in the reverse blocking state, while 4-5 is the reverse breakdown region. A p-n-p-n device when operated in the forward region is thus a bistable device which can switch from a high-impedance low-current state to a low- impedance high-current state or vice versa. To understand the basic switching phenomena, we shall use the method of the two-transistor analogue. 3 From Fig. 1 we see that the device can be considered as a p-n-p and an n-p-n tran- sistor connected with the collector of one transistor attached to the base of 2 Shockley Diode and Semiconductor-Controlled Rectifier 323 (4)' (5)- (0) -(3) FORWARD REGION (+) ON pi J I) V h V, REVERSE REGION (-) ON pi Fig. 3 Current-voltage characteristics of a p-n-p-n device. In the forward region (anode positively biased) 0-1 is the forward blocking region. V s and l s are the switching voltage and switching current respectively. 1-2 is the negative resistance region. V h and l h are the holding voltage and holding current respectively. 2-3 is the forward conduction region. 0-4 is the reverse blocking region and 4-5 is the reverse breakdown region. the other and vice versa, as shown in Fig. 4(a) and 4(b) for a three-terminal p-n-p-n device. The center junction acts as the collector of holes from Jl and of electrons from J3. The relationship between emitter, collector, and base currents (I E , I c , and I B respectively) and the dc common-base current gain ct t for a p-n-p transistor is shown in Fig. 4(c) where I co is the collector-base reverse saturation current. Similar relationships can be obtained for an n-p-n transistor, except that the currents are reversed. From Fig. 4(b) it is evident that the collector of the n-p-n transistor provides the base drive for the p-n-p transistor. Also the collector of the p-n-p transistor along with gate current I g supplies the base drive for the n-p-n transistor. Thus a regeneration situation results when the total loop gain exceeds unity. The base current of the p-n-p transistor is I Bl = (1 - ^)I A - I col (1) which is supplied by the collector of the n-p-n transistor. The collector current 324 p-n-p-n and Junction Field-Effect Devices ANODE <? lR1 = If GATE (a) GATE O — — * — |c<2 la Ie JI B M1-^)I E -I C0 (C) Fig. 4 (a) Two-transistor approximation of a three-terminal p-n-p-n device. (b) Same as (a) using transistor notations. (c) Current relationships in a p-n-p transistor. (After Ebers, Ref. 3.) of the n-p-n transistor with a dc common-base current gain a 2 is given by I C2 = cc 2 I K + I C0 2 • ( 2 ) By equating I Bl and I C2 , we obtain (/ - ol^)I a - I C oi = a 2^K + hoi ■ Since I K = I A + 1 9 ^ from Eq. (2) we obtain Ia = <XiI„ + Irni +1 ^2*g l C02 1 - (a t + a 2 ) (3) It will be shown later that both a t and a 2 are functions of the current I A and generally increase with increasing current. The above equation gives the static characteristic of the device. We note that all the current components in the numerator of Eq. (3) are small, hence I A is small unless (a t + a 2 ) approaches unity. At this point the denominator of the equation approaches zero and switching will occur. It is worthwhile to point out that if the polari- 2 Shockley Diode and Semiconductor-Controlled Rectifier 325 ties of the anode and cathode are reversed, then junctions Jl and J3 are reverse-biased while J2 is forward-biased. Under this condition there is no switching action, since only the center junction acts as an emitter, and no regenerative process can take place. The depletion-layer widths and the corresponding energy-band diagrams for the equilibrium, forward off state, and forward on state are shown in Fig. 5(a), (b), and (c) respectively. In equilibrium there is at each junction a depletion region with a built-in potential which is determined by the impurity doping profile. When a positive voltage is applied to the anode, junction J2 will tend to become reverse-biased, while Jl and J 3 will be forward-biased. Wi W. 1 BJ ni U P 2 ^n2 m m (a) EQUILIBRIUM (b) FORWORD "OFF" + V. Pi -v 2+ + v 3 i\ p2 l] nz \ — K s s : E C •E V (c) forword"on" Fig. 5 Energy band diagrams for forward regions (a) equilibrium condition, (b) forward "off" condition where most of the voltage drops across the center junction J2, and (c) forward "on " condition where all three junctions are forward-biased. 326 p-n-p-n and Junction Field-Effect Devices The anode-to-cathode voltage drop is approximately equal to the algebraic sum of the junction drops: V AK =V l + V 2 +V 3 . (4) As the voltage increases, the current will increase. This in turn causes a t and a 2 to increase. Because of the regenerative nature of these processes, switching eventually occurs and the device is in its on state. Upon switching, the current through the device must be limited by an external load resistance ; otherwise, the device would destroy itself if the supply voltage were sufficiently high. In this on state, J2 is also forward-biased, as shown in Fig. 5(c), and the voltage drop V AK is given by {V x - \V 2 \ + V 3 ) which is approximately equal to the voltage drop across one forward-biased p-n junction plus a saturated transistor. Switching of a p-n-p-n device occurs when dV AK /dI A = 0. This condition is generally reached before (a t + a 2 ) = 1. We shall now show that the switching will begin when the sum of the small-signal alphas reaches unity. 9 Let us consider the situation which results when the gate current I g is increased by a small amount AI g . As a consequence of this increase the anode current will increase by an amount AI A , so the incremental cathode current is given by AI K = AT A + AI g . (5) The small-signal alphas are defined as dl c ,. AI C a^ — = hm — -, (6a) 01 A AI A ^0 Ai A dl c t . AI C a ^aT = hm AT- (6b) The hole current collected by J2 will be SiAT^ and the electron current will be a 2 AI K . Equating the change in anode current to the change in current across J2, we obtain AI A = aiAT^ + a 2 AI K . (7) Substitution of Eq. (7) into (5) yields AI A a 2 AI g !-(«!+ a 2 ) (8) When (#! + a 2 ) becomes unity, any small increase in I g will cause the device to become unstable, since from Eq. (8) a small increase in I g will cause an infinite increase in I A . Although gate current was used in the analysis, the same effect can be obtained with a slight increase in temperature or voltage. 2 Shockley Diode and Semiconductor-Controlled Rectifier 327 (2) Variation of Alphas With Current* The dc common-base current gain cc t of a transistor is given by a 1= a T 7 (9) where a T is the transport factor defined as the ratio of the injected current reaching the collector junction to the injected current and y is the injection efficiency defined as the ratio of the injected current to the total emitter current. From Fig. 4(c) we have the relationship I c = olJ e + I co . (10) By differentiating Eq. (10) with respect to emitter current, we obtain the small-signal alpha : dl c da t x '^dFr a ' + lE eF E - (11) Substitution of Eq. (9) into Eq. (11) yields The simplest approximations for oc T and y are given by (12) ^ _ W 2 I w \~ ~' cosh «r = T-STT <**-&;> (12^) '(-T=) 1 + N K L t where W is the base width, D and r are, respectively, the diffusion coefficient and lifetime of minority carriers in the base, N B and N E are the base and emitter concentrations respectively, and L E is the diffusion length in the emitter. To obtain large values of alpha, one must use small values of W/y/Dr and N B [N E . To investigate the dependence of dc alphas and small-signal alphas on current we must use the more detailed calculation, considering both diffusion * This subsection is similar to that presented in 2(2) of Chapter 6. However, here we are primarily concerned with a common-base current gain that is substantially less than unity. We are also interested in the wide variation in current gain. 328 p-n-p-n and Junction Field-Effect Devices and drift current components. The hole currents at junctions Jl and J2 can be calculated from the equation I p (x) = qA s (p n » p £ - D p ^j (13) where A s is the area of the junction. The continuity equation for the n\ region as shown in Fig. 2(a) is given by 3P„ P„ ~ Pno n * 8 Pn, n d2 Pn ~« ~8T = T p ^te +D >-d^- (14) And the boundary conditions are p n (x = 0) = p no expiflV) where /? = q/kT, and p„(x = W) = 0. The steady-state solution of the above equation subject to the boundary conditions is />,(*) =P„ exp( i SF>xp[(C 1 + C 2 )x-] - p no iexp(pV)exp(C 2 W) + exp( - C t ^)]exp(CiA:)csch(C 2 W) sinh(C 2 W) (1 5) where 1/2 Cl ±c 2 = ^—± 2D p \2DJ D B 1 From Eqs. (13), (14), and (15) we obtain for the transport factor = CtexpjCtW) aT C 1 smh(C 2 W) + C 2 cosh(C 2 W)' K The injection efficiency is given by I P h = IpoWfflV) (l7) 7 I p + I n + I r ~ I P + Ir I po exp(pV) + I R ™vWlri) where I p and /„ are the injected current flowing into the base and emitter regions respectively, I r is the space-charge recombination current given by I R exp(pvirj) where I R and r\ are constants (generally 1 < r\ < 2), and I p0 = qD p A i p„(C l + C 2 coth C 2 W). For the doping profile of Fig. 2(a), Ppoipl) ^ n no {n\), the current /„ can be neglected in Eq. (17). We can now calculate cc t from Eqs. (16) and (17) as a function of the emitter current and the base layer width (W). In addition we can combine Eqs. (12), (16), and (17) to give the small-signal alpha. The results are shown in Fig. 6 for the doping profile shown in Fig. 2(a) and for some typical para- meters of silicon. 10 We note that, for the current range shown, the small- signal alpha is always greater than the dc alpha. The ratio of the base width to diffusion length, WjL, is an important device parameter in determining the variation of gain with current. For small values of WjL, the transport factor 2 Shock ley Diode and Semiconductor-Controlled Rectifier 329 Fig. 6 Small-signal alpha and dc alpha as functions of current and base width for a transistor with the following parameters n„ = 3 x 10 14 cm" 3 , p no = 7.5 x 10 5 cm" 3 , A s = 0.16 mm 2 , u„ = 1400 cm 2 /V-sec, fx p = S00 cm 2 /V-sec, D p = 13 cm 2 /sec, t p = 0.5 usee, L p = 25.5 urn, l R = 2.5 x 10" 10 amp, and v = 1.5. (After Yang and Voulgaris, Ref. 10.) is independent of current and the gain varies with current only through the injection efficiency. This condition applies to the narrow base-width section of the devices (n-p-n section). For larger values of WjL both the transport factor and the injection efficiency are functions of current (p-n-p section). Thus the value of gain can, in principle, be tailored to the desired range by choosing the proper diffusion length and doping profile. (3) Generalized Current-Voltage Characteristics We shall now use a graphical method 11,12 to analyze the I-V characteristics of generalized p-n-p-n devices. Figure 7 shows a general device with leads connected to all four layers. Reference directions for voltages and currents are shown in the figure. We assume that the center junction of the device remains reverse-biased. We also assume that the voltage drop V 2 across this junction is sufficient to produce avalanche multiplication of carriers as they travel across the depletion region. We denote the multiplication factor for electrons by M„ and that for holes by M p \ both are functions of V 2 . Because of the multiplication, a steady hole current 7 p (;q) entering the depletion region at jq becomes M p I p (x t ) at x = x 2 . A similar result will be obtained for an electron current 7„(x 2 ) entering the depletion layer at x 2 . The total 330 p-n-p-n and Junction Field-Effect Devices i^ PRIMARY HOLE CURRENT (M p -l)ip(X | )««- ^1 M D i D (X,) X 2 PRIMARY M n 'n( x 2 W ELECTRON CURRENT -~in(X 2 ) (Mn-l)i n (X 2 ) Fig. 7 Generalized p-n-p-n device. The current flowing through the center junction is /. There are electron, /'„, and hole, i p , primary currents which generate, respectively, M„i n and M p i p current under avalanche multiplication conditions. current / is given by I = M p Ux x ) + M n I n {x 2 ). (18) Since Ipixj) is actually the collector current of the p-n-p transistor, we can express I p {x x ) as Fig. 4(c), I p (x) = ot l (I A )I A + I col . (19) Similarly, we can express the primary electron current I n (x 2 ) as 4(*) = oc 2 (I K )I K + I C02 . (20) Substitution of Eqs. (19) and (20) into Eq. (18) yields / = M p [ ai (/J/ A + / col ] + M„[a 2 (/ K )/ K + I C02 ]. (21) If we assume that M p = M n = M, Eq. (21) reduces to 1 = <*i(Ia)Ia XiJIkVk h m . M(V 2 ) III ( ; 2 Shockley Diode and Semiconductor-Controlled Rectifier 331 where / = I col + I CQ2 . This assumption of an equal multiplication factor is valid for Ge, GaAs, and GaP, since for each semiconductor the ionization rates of electrons and holes are about equal (refer to Fig. 30 of Chapter 2). For Si the assumption is not generally valid; however, the basic I-V charac- teristics still can be predicted reasonably well. A. Shockley Diode. Based on Eq. (22) we shall first derive the I-V characteristics of a Shockley diode. Since I g = I g2 = 0, and I = i A = i K , Eq. (22) reduces to 1 = «!(/) + a 2 (J) + I /I = /(/). (23) M{V 2 ) The graphical solution of Eq. (23) is illustrated in Fig. 8. We shall make the following assumptions: / is some known constant, a x and a 2 are known functions of current similar to those shown in Fig. 6, and M can be expressed as M(F2)= rfer (24) where V BD is the breakdown voltage and n is a constant (~3 for silicon) We first obtain the function /(/) by adding the three curves as shown in Fig. 8(a). Figure 8(b) is a plot of 1 \M versus M with the vertical scale identical to that in Fig. 8(a) and the horizontal scale identical to that in Fig 8(c) which is a plot of Eq. (24). We now choose a value / in Fig. 8(d) at which we want to know the voltage drop. We project vertically upward to find the corresponding value of /(/), point (1). Then we project horizontally to the left and locate a point on the \\M versus M plot, point (2). With known M we can project vertically downward to find the required value (V 2 /V BD ) in Fig. 8(c), point (3), and horizontally back to point (4). This gives the nor- malized voltage drop required to sustain the given current /. The entire I-V characteristic can thus be obtained by repeating this geometrical construction process. The result is shown in Fig. 8(d). We note from Fig. 8 that the switching point (/., V s ) occurs at the location where the function /(/) reaches its minimum. The holding point is defined as the low-voltage, high-current point at which dV/dl = 0. The above analysis does not enable us to find this point. However, the holding point can be approximately related to the coordinates (7 l5 0) at which /(/) = 1. At/(7) = 1 M(V 2 ) = 1, this means that voltage V 2 is zero. If V 2 = 0, the saturation current I of the center junction goes to zero. Then from Eq. (23) we have «iC0 + « 2 (I) = 1. For known a t and a 2 the current at which the center junction reaches zero bias can be determined. The voltage across the entire 332 p-n-p-n and Junction Field-Effect Devices Fig. 8 Graphical solution of current-voltage characteristics of a Shockley diode. (After Gibbons, Ref. 12.) device at this point will simply be the sum of forward voltage drops across the two outer junctions (about 1.2 to 1.4 volts for silicon devices.) For current larger than I x the entire junction becomes forward-biased. (The above analysis cannot be extended to the forward case, since we have assumed that the junction J2 remains reverse-biased.) As the current increases beyond I u the voltage drop across the entire device continues to decrease and the device continues to exhibit negative dynamic resistance up to current I h . Above this current the center junction voltage drop is comparable to the emitter junction voltage, and the dynamic resistance of the entire device again becomes positive. 13 Beyond the point (I h , V h ) the device exhibits an 1- V characteristic which is essentially identical to a single forward-biased p-n junction diode, 7~ exp(qV/kT). B. Thyristor. For a three-terminal p-n-p-n device with one gate elec- trode, Eq. (22) can now be expressed as = /(/, /.)■ (25) 2 Shockley Diode and Semiconductor-Controlled Rectifier 333 In Eq. (25) the current I K is replaced by / + I g and I g2 = 0. This equation would be identical to Eq. (23) if I g were equal to zero. The/(7, I g ) curve and /- V characteristics of the structure for I g = are shown in Fig. 9. The /- V characteristics for various values of I g are obtained by replotting oc 2 (I + I g ) for each value of I g and including the term <x 2 (/ + /,)// in/(/, I g ). This gener- ates a set off (I, I g ) curves. We note that as l g increases, the switching voltage decreases. This gives rise to the gate turn-on property of the structure. f(l. ig) fd.i„,) UJl) (v 2 /v BD ) <Ig, <Ig','<Ig ( " (b) Fig. 9 Graphical solution of current-voltage characteristics of a gate-controlled SCR. (After Gibbons, Ref. 12.) 334 p-n-p-n and Junction Field-Effect Devices (4) Triggering Methods To switch a p-n-p-n device from the off to the on state requires that the current be raised to a level high enough to satisfy the condition a x = a 2 = 1 (or <*! + a 2 « 1). There are a number of methods whereby p-n-p-n devices can be triggered from the off to the on state: gate, temperature, radiation, and voltage triggering. The gate-triggering method for an SCR has already been discussed in the last section. The complete /- V characteristics are shown in Fig. 10. Note that in the forward blocking state, the family of curves is similar to that shown in Fig. 9(b) except for a change of coordinates. The temperature triggering method uses the fact that as temperature increases, more hole-electron pairs are generated and collected by the blocking junction J2. The sum of alphas then rapidly approaches unity with increasing temperature. A typical I-V characteristic of an SCR is shown in Fig. 11 for four different temperatures. We note that as temperature increases the blocking current increases approximately as Kexp(aT) where K and a are constants. The breakover voltage remains essentially the same up to a certain temperature (in the present case ~ 100°C) and then decreases with increasing temperature. Electron-hole pairs may also be produced when light impinges on a semi- conductor. For a given wavelength X with absorption coefficient a(X), the <Ig, <Ig, <l' g Fig. 10 Effect of gate current on current-voltage characteristics of an SCR. (After Gentry et a!., Ref. 5.) 2 Shockley Diode and Semiconductor-Controlled Rectifier 335 T, < J, < T, < T 4 Fig. 11 Effect of temperature on the current-voltage characteristics of an SCR. (Ref. 5.) generated current is proportional to <!> {l - exp[-a(A)H / T ]} where <D is the light intensity and W T is approximately the total device thickness. The basic switching mechanism and the I- V characteristic due to light triggering are essentially the same as temperature triggering. The p-n-p-n devices employing the light-triggering method are called light-activated SCR, or LASCR. Other forms of radiation, such as y-rays, electrons, and x-rays, can be used to trigger a p-n-p-n device. However, great care must be exercised in their use, since the radiation may cause permanent damage to the semiconductor crystal lattice. Voltage triggering is the most important method of switching a p-n-p-n device, especially for the Shockley diode. Voltage triggering can be accom- plished in two ways: by slowly raising the forward voltage until the break- over voltage is reached, or by applying the anode voltage rapidly (referred to as dV\dt triggering). The breakover voltage, V BO , can be obtained from Eqs. (23) and (24) under the condition that I> I , and we obtain Vbo = V BD {\ -a,- a 2 ) 1/n (26) where V BD is the breakdown voltage to be discussed in the next section. In the dVjdt triggering, the rapidly varying anode voltage gives rise to a dis- placement current d(CV)/dt where C is the capacitance of the collector junction J2. This current in turn can cause (a t + a 2 ) -► 1 ; then switching occurs. 336 p-n-p-n and Junction Field-Effect Devices (5) Forward and Reverse Blocking Characteristics There are basically two factors which limit the reverse breakdown voltage and the forward breakover voltage: avalanche multiplication or depletion- layer punch-through. 14, 14a Consider the reverse blocking characteristics first. For the doping profile shown in Fig. 2(a), most of the applied reverse voltage will drop across the junction Jl as indicated in Fig. 12(a). Depending on the thickness of the n\ layer, W n , the breakdown will be due to avalanche multiplication if the depletion-layer width at breakdown is less than W n , or due to punch-through if the whole width W„ is filled out first by the depletion layer at which the junction Jl is effectively shorted to J2. Using the one-sided abrupt junction (a) REVERSE BLOCKING 1 1 Si (300°K) \av ALA MC iE E RE/ WDOWIV <v /V • vfo /-&> '* o /£> U / V ll ]0 I3 | I4 | I5 | 16 (b) DOPING CONCENTRATION N (cm-3) Fig. 12 Reverse blocking capability of a p-n-p-n device. The avalanche breakdown line indicates the maximum voltage attainable in the n1 layer with doping concentration as a parameter. The parallel lines indicate the breakdown conditions due to punch-through of n1 layer for various layer widths. (After Herlet, Ref. 14.) 2 Shockley Diode and Semiconductor-Controlled Rectifier 337 approximation, the punch-through voltage is given by ^l (27) when N D is the n-layer doping concentration and s s is the permittivity. The avalanche breakdown voltages have been considered previously in Chapter 3. Figure 12(b) shows the fundamental limit of the blocking capability of silicon p-n-p-n devices. For example, for W n = 80/mi, the maximum breakdown voltage is about 1000 volts which occurs at N D = 2 x 10 14 cm -3 ; for lower dopings the breakdown voltage is limited by punch-through and for higher dopings by avalanche breakdown. 15 For forward blocking, most of the applied voltage will drop across the center junction J2, as shown in Fig. 13(a). The breakover voltage can be obtained by combining Eq. (26) and Fig. 12(b). A typical result is shown in Fig. 13(b) for W„ = 80/rni, n ~ 3, and various values of (o^ + a 2 ). For small values of (a x + a 2 ), the breakover voltage is essentially the same as the reverse breakdown voltage. For values of (a x + a 2 ) close to 1, the breakover voltages are substantially less than V BD . It has been shown in Chapter 3 that the breakdown voltage increases with increasing temperature. This fact coupled with Fig. 13(b) can help to explain the I-V characteristics shown in Fig. 11. The reverse characteristics are simply due to the temperature effect on breakdown voltage. For the forward charac- teristics, with temperatures slightly higher than room temperature, the tem- perature effect dominates, thus the breakover voltage increases slightly with temperature. 16 At higher temperatures, however, the variation of alphas with temperature dominates, and the breakover voltage decreases. (6) Transient Operations The anode current through a p-n-p-n device does not respond immediately to the application of gate current. The anode current can be characterized by a turn-on time as shown in Fig. 14(a). Because of the regenerative nature of a p-n-p-n device, the turn-on time is approximately the geometric mean value of the diffusion times in the n\ to p2 regions, or ton = y/hh (28) where h = W n 2 \2D p , t 2 = W P 2 I2D„, W n and W p are the layer widths of the n\ and p2 regions respectively, and D p and D„ are the hole and electron diffusion coefficients respectively. The above result can be derived from Fig. 4(b) with the help of the charge- control approach. We shall assume the stored charges in the p-n-p and n-p-n transistors are Q± and Q 2 respectively. The collector currents in the tran- 338 p-n-p-n and Junction Field-Effect Devices V, J2 J3 (a) FORWARD BLOCKING ° 1000 (b) DOPING CONCENTRATION N D (cm-3) Fig. 13 Forward breakover voltage as a function of the n1 layer doping concentration and width for various values of (a! + a 2 )- For small (a t + ol 2 ) the breakover voltage is essentially the same as that for reverse breakdown. For large values of (ai + a 2 ), however, the break- over voltages are substantially reduced. sistors are then given by l c2 ^ Q 1 /t 1 and I cl ~ Q 2 lt 2 respectively. Under the ideal condition that dQ l /dt = I c2 and dQ 2 jdt = I g + I cl , we obtain the following equation : d 2 Q x dt 2 tit 2 t 2 (28a) It is then obvious that the solution of the above equation is of the form exp( — tlt on ) with the time constant, t on , given by Eq. (28). In order to reduce the turn-on time, one must employ devices with narrow n\ and p2 layer widths. This requirement, however, is in contrast to that for large break- 2 Shockley Diode and Semiconductor-Controlled Rectifier 339 I 2 TIME (/isec) (a) TURN-ON pi + V P - n2 ^R R L -v/v P2 ■€> *• t (b) TURN-OFF Fig 14 (a) Turn-on characteristic when a current step \ g is applied to an SCR. (b) Turn-off characteristics where the voltage suddenly changes polarity. (After Gentry et al., Ref. 5.) down voltage. This is the reason that high-power, high-voltage thyristors have long turn-on times. When a p-n-p-n device is in the on state, all three junctions are forward- biased. Consequently, in the device there are excess minority and majority 340 p-n-p-n and Junction Field-Effect Devices carriers which increase with forward current. To switch back to the blocking state, these excess carriers must be swept out by an electric field or must decay by recombination. 17,18 A typical turn-off current waveform is shown in Fig. 14(b). The major time delay is due to the recombination time in layer nl. Since the hole current through the structure is proportional to the excess charge in nl, we can write / = / F exp(--^ (29) where / = I F at t = 0, and x p is the minority-carrier lifetime. This current must drop below the holding current I h to permit the device to block forward voltage. Thus, the turn-off time is f off = T p ln-^. (29a) 1 h To obtain a small turn-off time, we must reduce the lifetime in layer nl. This can be achieved by introducing recombination centers such as gold in silicon during the diffusion process. 3 JUNCTION FIELD-EFFECT TRANSISTOR AND CURRENT LIMITER (1) Basic Characteristics A schematic diagram of a junction field-effect transistor (JFET) is shown in Fig. 15. It consists of a conductive channel provided with two ohmic contacts, one acting as the cathode (source) and the other as the anode (drain) with an appropriate voltage applied between drain and source. The third electrode (or electrodes), the gate, forms a rectifying junction with the channel. Thus the JFET is basically a voltage-controlled resistor and its resistance can be varied by varying the width of the depletion layer extending into the channel. Since the conduction process involves predominantly one kind of carrier, the JFET is also called a " unipolar " transistor in order to distinguish it from the bipolar (or junction) transistors in which both types of carriers are involved. In Fig. 15 the basic dimensions of the device are the channel length L, channel width Z, half-channel depth at zero bias a, and depletion-layer width h. Three biasing conditions are shown in Fig. 16 for a/?-channel JFET. The polarities are inverted for an n-channel JFET. The source electrode is generally grounded, and the gate and drain voltages are measured with respect to the source. When V G = V D = 0, the device is in equilibrium condition and 3 Junction Field-Effect Transistor and Current Limiter 341 GATE DRAIN SOURCE Fig. 15 Schematic diagram of a p-channel junction field-effect transistor (JFET) with channel length L, channel width Z, and channel depth 2a. The source electrode is taken as the reference. Under normal operation the gate voltage has opposite polarity as compared to that of the drain. (After Shockley, Ref. 2.) no current flows. For a given V G (zero or positive values), as the magnitude of the drain voltage increases (negative with respect to source), more current flows from source to drain. For sufficiently large V D , the depletion layers near the drain end penetrate the entire/? region. This is the pinch-off condition corresponding to V D = V Dsat at which the channel depth at L is reduced to zero and the conducting path between source and drain is pinched off. For even larger V D , the point P will move towards the source end. The current will, however, remain essentially the same as the saturation current. This current flows because of carriers injected into the depletion region from the channel at the point P where the depletion regions touch. This is similar to a bipolar transistor in which carriers are injected from the emitter to a reverse- biased collector. The basic current-voltage characteristics of a JFET are shown in Fig. 17 where the drain current is plotted against the drain voltage for various gate voltages. We can divide the characteristic into three regions : the linear region where the drain voltage is small and I D is proportional to V D , the saturation region where the current remains essentially constant and is independent of V D , and the breakdown region where the drain current increases rapidly with a slight increase of V D . As V G increases, both the saturation current and 342 p-n-p-n and Junction Field-Effect Devices JT V e =0 \//////////'/ c -y/////// / \ 2E" DEPLETION REGION r -••••• -• ' ••••"*•• -:•:••:••>::• "* u y i v D =o (a) EQUILIBRIUM (b) AT PINCH -OFF V G >0 V D = v D SAT V n <V r (c) BEYOND PINCH-OFF Fig. 16 Cross-sectional views of a JFET (a) equilibrium condition, (b) at pinch-off point where the depletion layers penetrate into the channel and meet at the drain end, and (c) beyond pinch-off, the point (P) moves toward the source. the saturation voltage decrease. This is because of reduced initial channel width which results in larger initial resistance. We shall now consider the detailed current-voltage characteristics for a JFET with an arbitrary charge distribution. Because of the symmetry shown in Fig. 16, we need only consider the upper half of the device as shown in Fig. 18 where h is the depletion-layer width at an arbitrary point and y x and y 2 are the widths at the source and drain electrodes respectively. 3 Junction Field-Effect Transistor and Current Limiter 343 Id sat BREAKDOWN REGION SATURATION REGION V„ =0 V„ = V„/2 'D SAT v D SAT v " P bi (=v D -v K .) Fig. 17 Basic l-V characteristics of a JFET which includes the linear region, saturation region, and breakdown region. V p is the pinch-off voltage. For a given V G , the current and voltage at the point where saturation occurs are designated by / Dsat and V Dsat respectively. (SOURCE)i V G (GATE) -V D (DRAIN) Fig. 18 Cross-sectional view of the upper-half portion of a JFET. y t and y 2 are the depletion layer widths at the source and drain ends. (After Bockemuehl, Ref. 7.) 344 p-n-p-n and Junction Field-Effect Devices We shall define an integral form of the charge density Q ( Y) as Q(Y)= p(y) dy Coul/cm 2 or Q(h)= p(y)dy Coul/cm 2 j (30a) (30b) where p{y) is the charge density in Coul/cm 3 . The dependence of the reverse bias voltage V(h) on h and p{y) can be derived from Poisson's equation. Under the conditions of gradual-channel approximation, i.e., the depletion layer width h varies only gradually along the channel (x-direction), we have d 2 V di v p(y) -—2 = -^ = — (31) dy' where S y is the electric field in the y direction and e s is the permittivity. Inte- gration of the above equation from y = to y = h yields = - — = - p(y) dy + const. (32) The integration constant can be determined from the boundary condition that S y — at y = h for an abrupt depletion layer, and is obtainable from 1 r" Eq. (32) to be p(v) dy. We thus have from Eqs. (30) and (32) £ s J o dV 1 OV 1 r" f' ■r- = - P(y) dy - p(y) dy dy s s L J o J o = - [Q(h) - Q(y)l (33) Integrating once more from y = to y = h, we obtain the voltage V(h) across the depletion layer which includes both the applied and the built-in voltages : V(h) = - or Q(h)jdy-JQ(y)dy = j[hQ(h)-fQ(y)dy] V{h) = - f yp(y) dy. E. Jn £ s J o (34) (35) 3 Junction Field-Effect Transistor and Current Limiter 345 The right-hand expression in Eq. (35) can be readily shown to be identical to that of Eq. (34) using integration by parts. The maximum value for the upper limit of the integration occurs at the point where h = a and the corresponding voltage is called the pinch-off voltage as defined previously. Beyond this point the channel current remains essentially at a constant value. The pinch-off voltage is given by 1 r a F P (pinch-off voltage) = V(h = a) = - yp(y) dy. (36) e s Jo Differentiation of Eq. (35) yields dV[dh = hp{h)l& s (37) which shows that the voltage change required to move the depletion boundary a given distance, increases with the value h and is proportional to the space- charge density at that boundary. The junction capacitance per unit area is given by C.mWV^QQ f/cm*. 08) The depletion layer thus acts as a plane capacitor with plate distance h, and the capacitance is independent of the charge distribution profile. We next consider the current-voltage characteristics and the transcon- ductance. The current density in the x-direction (transport along the channel) is given by the simple ohmic-law equation J x = a{x)S x (39) where J x is the current density, a(x) the conductivity, and S x the electrical field along x direction {-dVjdx). The channel (or drain) current is then given by dV r a I D = 2Zfi — ^p(y)dy, (40) or I D dx = 2Z\i{dV\d\i) dh f p(y) dy (40a) J h where \i is the drift mobility in the channel and the factor 2 is from the con- tribution of the lower half of the device. Substituting Eq. (37) and inte- grating with the boundary conditions h = y x at x = and h= y 2 at x = L, we obtain \ L I D dx = I D -L = ^ \ L hp{h) dh fp(y) dy (41) 346 p-n-p-n and Junction Field-Effect Devices or l»=~ ClQia) ~ Q(h)-]hp(h) dh. (42) Equation (42) is the fundamental equation of the JFET. From Eq. (42) we can derive two important device parameters, namely the transconductance, g m , and the channel conductance (also called the drain conductance), g D : ^SI 2= SI 2 dy ± SI £ dy 1 9m 8V G dy,dV G dy 2 dV G (4Jj The partial derivatives are obtained from Eqs. (37) and (42): 2Zu 9m = -£- My 2 ) - Q(y i)l (44) which shows that g m is equal to the conductance of the rectangular section of the semiconductor extending from y — y t to y = y 2 . The channel con- ductance can be obtained from Eqs. (37) and (42) in a similar manner: 9 D = ^ = ^LQ(a)-Q(y 2 )l (45) This value approaches zero as y 2 ~ a at which V D + V G = V P — V bi , where V bi is the built-in potential. It is interesting to compare Eq. (44) with Eq. (45). For V D -+ 0, we have y 2 -> y x and g D is proportional to \_Q(a) — QiyJ]. On the other hand, when V D + V G > V P , y 2 ^a then g m is also proportional to the same charge difference. Hence we obtain the following useful expression for any arbitrary charge distribution: 9do(V d -> 0) = gJL\V D \ > \V P \) = ^ [(2(a) - Q{yJ] = 9r where \ Q(yJ Q(a) (46) max = -jj Oka). (47) (2) Specific Charge Distributions We shall use the above equations to derive the current-voltage charac- teristics for some specific functions of p(y), in particular for the uniformly 3 Junction Field-Effect Transistor and Current Limiter 347 doped charge distribution. For a uniformly doped semiconductor with doping N D the function Q(h) is given by qN A h. Equation (42) can then be written as 2Z\i ^ £ s^ " yi 2Znq 2 N A 2 In = — -^ J qN A (a - h)hqN A dh e«L '?(»'->')- 5^ 3 -4 (48) The depletion layer widths y 2 and y x for an abrupt junction are given by y 2 = \2e s {V d + V g + V bi )lqN A Y 12 (49a) yi = l2s s (V bi +V G )lqN A V /2 (49b) where V bi is the built-in potential given by kT/q ln(A^/« f ) for an abrupt n + p junction. Note that under normal operation of a /^-channel device, V G is positive, and V D is negative. We shall use the absolute value of V D in Eq. (49a) and also in the subsequent equations. Substitution of Eqs. (49a) and (49b) into Eq. (48) yields Id — #max{ ^D — W~ l(V D +V G + V bi ) 3/2 - (V bi + V G fH (50) where g max = 2Z\iqN A ajL as given from Eq. (47). The maximum current, ^z>sat> f°r a given V G occurs at the point where the channel is pinched off. This current is obtainable from Eq. (48) by setting y 2 = a: ^Dsat 2Zfiq 2 N A 2 & S L 2Zm 2 N a 2 s s L 2Zfiq 2 N A 2 a 3 f (*-»') -if..-^ 2 3 Jl 6s s L 1-3 1 - PS*) + 2 v bi + v G yi 2 (51) where I P and V P are the pinch-off current and the pinch-off voltage [which includes the built-in potential, Eq. (36)] which are given by 2^3 I P = 2Z\iq N A a 6s s L qN A a 2 V„ = 2e. (52a) (52b) 348 p-n-p-n and Junction Field-Effect Devices It is clear from Eq. (52a) that in order to increase the current I P , one can employ device geometry with a large ratio of channel width to channel length (Z/L), high mobility, and low doping concentration. The last require- ment comes about because of the fact that the depletion-layer width at breakdown is approximately proportional to (A^) _1 ; this makes the terms N A 2 a 3 in I P proportional to (iV A ) _1 . From Eq. (52b), the pinch-off voltage V P will also vary as (iV^)" 1 . The transconductance and drain conductance can be directly obtained fromEqs. (44) and (45): 9 m = ^^ (y 2 -y 1 ) = 7 ^ j2s s qN A (J V D + V G + V bi - Jv bi + V G ). (53a) 2 ^^(a-y 2 ) = 2 4^^^(JV P -Jv D + v G+ v bl ). g D = T ... „, L (53b) The current-voltage characteristics calculated from Eq. (50) are shown in Fig. 19 where the saturation current I Dsat is given by Eq. (51) and the satura- tion voltage is given by V Dsat =V P - V bi -V G = — ^ HNJnd - V G . (54) 2e s q In the linear region (V D ^0) the drain conductance is given from Eq. (46) or (53) as • dD o(V D -+0) = g max \l-j qNAa2 j. And this value is also equal to the transconductance in the saturation region as pointed out in Eq. (46). Other charge distribution profiles can be calculated in a similar manner. Table 7.1 summarizes the results for three cases. 7 Case B represents the uniform charge distribution discussed previously. Cases A and C represent two limiting cases in which the charge distributions are delta functions located at y = 2a and y = respectively. We note that the dimensionless ratio g max Vp/Ip depends only on the charge distribution parameters. However, this ratio is limited to the range of 2 to 4. It can also be shown that for case A, the current-voltage relationship is given by 2 '•--'-['-m (55) 3 Junction Field-Effect Transistor and Current Limiter 349 i v° / / / / / 0.5 / / /// 1 1 1.0 1.5 m 2.0 2.5 IVJ (VOLTS) Fig 19 Theoretical l-V output characteristics of a silicon p-channel JFET with Z/L = 200, fi = 750 cm 2 /V-sec, a = 2/^m, and N A = 10 15 cm" 3 . TABLE 7.1 FIELD-EFFECT EQUATIONS FOR SPECIFIC CHARGE DISTRIBUTIONS IN A RECTANGULAR STRUCTURE FOR REFLECTED-TYPE JFET (TOTAL CHANNEL DEPTH 2a) Common Factor Multiplying Factors for Specific Distributions Parameter A. All Charge at y = 2a B. Uniform C. All Charge at j = 9mai 1Z\ipa L 1 1 1 v P 4pa 2 1 4 1 8 h 8Zp,p 2 a 3 1 8 1 24 9m»x ' p Ip 1 2 3 4 350 p-n-p-n and Junction Field-Effect Devices A comparison of Eqs. (55) and (51) is shown in Fig. 20. We note that there is a surprisingly narrow range of possible transfer characteristics as indicated by the shaded region. It can be shown that the shaded region can be repre- sented by [-(v»r where n varies 19 between 2 and 2.25. Because of this narrow range of n (~2) the square-law approximation to the JFET's transfer characteristic can be very useful for many circuit applications. It is also interesting to note that the current-voltage characteristics for one value of V G are sufficient to completely describe the device behavior for any channel impurity profile. This can be shown easily from Eq. (42) which is now rewritten as 20 Id(V g ,V d )=\ F(h) dh = f F{h) dh. (56) 0.2 DELTA FUNC D1STR TION CHARG BUTION E UNIFOR DISTRIBUT ION — / 0.4 0.6 Fig. 20 Transfer characteristics for two specific charge distributions. (After Middlebrook and Richer, Ref. 19.) 3 Junction Field-Effect Transistor and Current Limiter 351 The integral can be split into two terms to yield MV d + Vg) MO) Id(V g ,V d )= F(h) dh + | F(h) dh (57) J y(0) J y(V G ) or Id(V g , V D ) = I D (0, V D + V G ) - I D {0, V G ). (57a) Equation (57a) states that if the relationship between I D and V D is known for the case of V G = 0, the right-hand side of Eq. (57a) permits the calcu- lation of I D for any combination of V D and V G . One can thus use a graphical method to generate the complete I-V characteristics. An example is shown in Fig. 21. For a given I D (0, V D ), curve (1), the first term on the right-hand side of Eq. (57) is the curve I D (0, V D ) displaced by an amount V G along the V D axis [Fig. 21(a) is for an n channel so that V G has negative values]. The second term is a constant in the I D -V D plane and represents a displacement along the I D axis such that the resulting characteristic curve always passes through the origin of the coordinates. The graphical steps are illustrated in Fig. 21(a) for an ^-channel JFET. A comparison between theoretical and experimental results is shown in Fig. 21(b). The agreement is better than 5 % at all data points. From the above discussion we conclude that the basic characteristic of a JFET is essentially independent of the charge distributions in the channel. The JFET has approximately a square-law transfer characteristic. In addition, the family of I-V curves of a JFET can be generated by knowing the I D -V D characteristic for only one value of V G . We shall now consider some modi- fication of the basic static characteristics and the dynamic behavior at high frequencies. (3) Static Characteristics A. Channel Conductance. A planar junction field-effect transistor, shown in Fig. 22, is generally made by the use of two successive diffusion processes. A typical output characteristic (I D vs V D ) is shown in Fig. 23. The constant-current approximation in the pinch-off region is reasonably valid. The slight upward tilt of the current (corresponding to a nonzero channel conductance) is mainly due to the reduction of the effective channel length as indicated in Fig. 16. The potential at the end of the channel (point P) is fixed at the value V Dsat as given by Eq. (54). As the drain voltage increases, the depletion-layer width also increases. This causes the point P to move towards the source. 21 The voltage at P remains at the same value (F Dsat ), but the effective distance from the source to the drain is reduced. This results in the finite value of the channel conductance in the saturation region. 352 p-n-p-n and Junction Field-Effect Devices I D (0,V D + V G (a) ' 4 / /// / / 6 / / I -7 -6 -5 -4 12 3 4 5 (VOLTS) (b) Fig. 21 (a) Graphical solution of l-V characteristics of a JFET. (b) Comparison between theory and experiment. (After Wedlock, Ref. 20.) B. Breakdown Voltage. As the drain voltage increases, eventually avalanche breakdown of the gate-to-channel diode occurs, and the drain current will suddenly increase. The breakdown occurs at the drain end of the channel where the reverse voltage is highest: K B (breakdown voltage) = | V D \ + V G . (58) 3 Junction Field-Effect Transistor and Current Limiter 353 GATE CONTACT I O SOURCE CONTACT DRAIN CONTACT &K&SK1 n+ DIFFUSION- p-TYPE DIFFUSION (GATE 2) n-TYPE SUBSTRATE Fig. 22 Typical cross-sectional view of a double diffused JFET. P-type impurities (e.g., boron) are first diffused into the n-type substrate. Then n-type impurities (e.g., phosphorous) are diffused into the p-type layer. The channel length and depth are indicated by L and la respectively. E - 1.2 0.8 \ / G = -0.2 = >/' ' if T = 25°C 0.2 0.4 0.6 0.8 1.0 Y~ 1.2 p-CH ANNEL r ' 1.4 — 15 20 |V n | (VOLTS) Fig. 23 l-V characteristics of a p-channel JFET. (After Sevin, Ref. 8.) 354 p-n-p-n and Junction Field-Effect Devices For example, in Fig. 23 the breakdown voltage is 27 V for V G = 0. At V G = 1 V, the breakdown voltage is still 27 K and the drain voltage at break- down is (V B — V G ) or 26 volts. C. Input Resistance. The current in the reverse-biased gate-to- channel junction can be expressed as I G = I s lexp(qV G lt 1 kT)-ll (59) where r\ is a constant which equals 1 for ideal current and 2 for generation- recombination current. The input resistance is given by Rin ~ g in WJ t]kT (60) At I G — 0, the input resistance at room temperature is about 250 MQ. for I s = 10" 10 amp, and will increase with the reverse bias. It is obvious that the JFET has a very high input resistance. D. Series Resistances. Because of the finite distances between the gate and the source and drain contacts as shown in Fig. 24, there are series re- sistances R s (source resistance) and R D (drain resistance) outside the channel region. These resistances, which cannot be modulated by the gate voltage, SOURCE Q GATE Q DRAIN O f ' / ::\ J. p-TYPE DEPLETION LAYER n-TYPE SUBSTRATE Fig. 24 Schematic diagram to show the series resistances at the source end (R s ) and drain end (R D ). The gate and drain voltages can only modulate the channel conductance g D0 . 3 Junction Field-Effect Transistor and Current Limiter 355 introduce an IR drop between the gate and the source and drain contacts and reduce the drain conductance as well as the transconductance. The voltages V D and V in Eq. (50) should then be replaced by V D — I D (R S + R D ) and (V G — I D R S ) respectively. In the linear region the resistances R s , l/g DO , and R D are in series, and the measured drain conductance is given by <7do/[1 + C^s + Rd)9do]- A similar result can be obtained for the measured transconductance. In the saturation region, however, the transconductance is affected only by the source resistance. The drain resistance R D will cause an increase of the drain voltage at which current saturation occurs. Beyond that voltage, V D > V D sat , the magnitude of V D has no effect on the drain current, thus R D has no further effect on g m , so the transconductance measured isequalto# m /(l + R s g m ). E. Effects of Temperature and Mobility. If the density of the ionized donors remains essentially the same over a certain temperature range, then the voltage V P , Eq. (52b), will be constant. However, the current I P , Eq. (52a), will vary with temperature because of mobility variation. A typical result is shown in Fig. 25 where I P decreases with increasing temperature, and varies as T~ 2 . The effect of temperature on I D can be obtained from Eq. (50) and is mainly due to two quantities, /j, and V bi . Both quantities cause I D to decrease with increasing temperature. In the previous derivations it is assumed that the channel mobility is a constant. However, as the electric field increases, the mobility tends to decrease. Equation (42) should be slightly modified by placing pi within the integral sign. This results in a decrease of the drain current. 6 ' 22 ' 23 The general behavior of the I D versus V D , however, remains essentially the same. (4) Dynamic Characteristics A. Cutoff Frequency. Under high-frequency operation there are two factors which limit the frequency response of a JFET: the transit time and the RC time constant. The transit time effect is due to the finite time required for carriers to travel from source to drain. For the constant mobility case the transit time is given by x ~ii* x *nV D m (61) And for the constant velocity case (under a large electric field) r^L/v sl (62) where v sl is the scattering-limited velocity. Usually the above transit time is 356 p-n-p-n and Junction Field-Effect Devices 2.0 i l0 M °" 0.9 0.8 0.7 0.6 0.5 0.4 0.3 Ip~T- 100 1000 Tl°K) Fig. 25 Temperature dependence of the maximum drain current i r (After Sevin, Ref. 8.) small compared to the RC time constant resulting from the input capacitance C in and the transconductance. A schematic common-source configuration of a /^-channel JFET is shown in Fig. 26(a). For an w-channel JFET the arrow is inverted. The corresponding equivalent circuit is shown in Fig. 26(b) where C in and g in are the input capacitance and input conductance respectively. C out and g out are the output capacitance and conductance respectively, g GD is a feedback capacitance, and g m V G is the current generator. Under normal operating conditions the two most important terms are C in and g m V G . The maximum operating frequency can then be defined as the frequency at which the current through C in is equal to the current of the current 3 Junction Field-Effect Transistor and Current Limiter 357 generator g m V G : riZ m N A a \ f m = ^-<^ L LS^, (63) 2% (H For high operating frequencies one should reduce the channel length L. Equation (63) also indicates that an n-channel Si JFET has a higher maximum operating frequency than a /7-channel Si JFET with the same device geo- metry. This is because the electron drift mobility is higher than that of holes in silicon. B. Noise. 23 ~ 27 There are three noise sources in JFET : shot noise from the gate leakage current, thermal noise generated in the conductive channel, and the generation-recombination type noise due to surface effect. The shot-noise current is given by l 2 sh = 2qI G B (64) where B is the bandwidth and I G is the gate current, Eq. (59). Since the gate current under reverse bias is very small, of the order of 10~ 10 amp, this noise source makes only a small contribution to the total noise. The approxi- mated thermal noise is given as an equivalent noise voltage : Vl = \k'T{g^B (65) where g m is the transconductance. The generation-recombination noise is an additional noise source which is given by the noise voltage modified by a \\f frequency dependence, V t 2 h f c jf, where f c is the corner frequency at the low end of the frequency spectrum. It is clear that for high-frequency operation, the dominant noise source is the thermal noise which can be substantially reduced by increasing the transconductance. (5) Current Limiter In this section we shall consider two classes of current-regulator diodes which are two-terminal field-effect devices. They are the field-effect diode and the limiting-velocity diode. The operation principle of a field-effect diode (FED) 28 ' 29 is the same as that of a shorted-gate-to-source junction field-effect transistor. Its I-V charac- teristic is shown in Fig. 27 which is similar to the curve shown in Fig. 23 for V G = 0. We shall consider four important parameters pertinent to the opera- tion of current limiters : the limiting current /, , the saturation voltage V sat , the slope g t in the limiting range, and the breakdown voltage. For an FED 358 p-n-p-n and Junction Field-Effect Devices (a) COMMON-SOURCE CONFIGURATION (p-CHANNEL) 9gd v G c, N -r g, N 9m v g ® f 90UT t- c (b) EQUIVALENT CIRCUIT OF JFET Fig. 26 (a) Common-source configuration. (b) Equivalent circuit of a JFET. I i I. . Fig. 27 Basic characteristics of a current limiter where /, is the limiting current, V sat the saturation voltage, g, the conductance in the limiting region, and V B the breakdown voltage. 3 Junction Field-Effect Transistor and Current Limiter 359 all the above parameters have already been discussed in connection with the junction field-effect transistor. To reduce V sat , one can use devices with a small channel depth a, and a low channel doping concentration Eq. (52b). To reduce /j , one can reduce N A and a, or increase the channel length L, Eq. (52a). To decrease g t , one must increase L. To increase V B , a low channel doping concentration should be used. For the limiting- velocity diode 30 the current-limiting characteristic is obtained by employing the effect that at high electric fields the carrier drift velocity saturates. A schematic geometry is shown in Fig. 28 where a p-type Ge substrate is used. The high-field region is a shallow n-type diffused layer about 0.5 /mi deep and 3 /mi long. The reason for choosing Ge is that its velocity saturation characteristics occur at low field (~4 kF/cm) in contrast to that in Si (~30 kK/cm). The four important parameters as shown in Fig. 27 will now be discussed. The limiting current is given by I l =qN D v sl A+I s (66) where v sl is the scattering-limited velocity, A the area, and / s the p-n junction reverse-biased saturation current. The current I s increases with increasing temperature while the velocity v sl decreases with temperature. A minimum in /, is thus expected when these two competing mechanisms cancel. The saturation voltage F sat is given by V aat = *,L + I l R e (67) where $ s is the electric field at the onset of velocity saturation, and R c is the residual resistance associated with the contacts. In an ideal limiter V sat is zero; in a practical limiter V sat should be as small as possible. The slope g t results from two effects: first, the electron drift velocity in the saturation range is not completely field independent, and secondly there is a space-charge-limited resistance due to injected carriers. This resistance is given by (L 2 /2e s v sl A) as considered in Chapter 5. The breakdown voltage depends on the impact ionization in the con- duction channel. The electric field will approximately increase linearly from the negative contact to a peak value S p at the positive contact, and the breakdown voltage is given by V B *^L (68) where (<f p /2) is the average field in the channel. For Ge., S p is about 1.5 x 10 5 F/cm at breakdown. The breakdown voltage is then expected to be about 20 volts for a channel length of 3 /mi. The experimental results are shown in Fig. 29 for a Ge current limiter 360 p-n-p-n and Junction Field-Effect Devices METAL CONTACT -, / sio 2 [iCZlJ / /. n+ CONTACT-' L n + CONTACT 0.5 j"- n-DIFFUSION Ge in -cm p-TYPE Fig. 28 Schematic geometry of a current limiter (limiting-velocity diode). (After Boll et al., Ref. 30.) 6 8 10 12 14 16 18 VOLTAGE (VOLTS) (a) 40 80 120 TEMPERATURE (°C) (b) Fig. 29 Experimental results for the device shown in Fig. 28 (a) l-V characteristics and (b) temperature dependence of the limiting current l t (at 2 volts). (Ref. 30.) 200 240 References 361 with geometries shown in Fig. 28. Figure 29(a) shows the current- voltage characteristic at room temperature. We note that the current is reasonably saturated at about 2 volts, and the breakdown occurs near 18 volts in agree- ment with the expected values. Figure 29(b) shows the temperature depen- dence of the limiting current I t (at 2 V) with minimum current occurring at about 120°C. The limiting- velocity diode can be operated at higher speed than the field-effect diode because, for the same current level /, , the depletion- layer with the former can be made much greater than that of the corre- sponding FED so that the shunt-capacitance of a limiting-velocity diode is smaller than the input capacitance of the field-effect diode. REFERENCES 1 . W. Shockley, Electrons and Holes in Semiconductors, D. Van Nostrand Co. Inc. , p. 1 1 2 (1950). 2. W. Shockley, "A Unipolar Field-Effect Transistor," Proc. IRE, 40, 1365 (1952). 3. J. J. Ebers, "Four-Terminal p-n-p-n Transistors," Proc. IRE, 40, 1361 (1952). 4. J. L. Moll, M. Tanenbaum, J. M. Goldey, and N. Holonyak, "p-n-p-n Transistor Switches," Proc. IRE, 44, 1174 (1956). 5. F. E. Gentry, F. W. Gutzwieler, N. H. Holonyak, and E. E. Von Zastrow, Semi- conductor Controlled Rectifiers, Prentice-Hall, Inc., Englewood Cliffs, N. J. (1964). 6. G. C. Dacey and I. M. Ross, "The Field-Effect Transistor," Bell Syst. Tech. J., 34, 1149 (1955), and "Unipolar Field-Effect Transistor," Proc. IRE, 41, 970 (1953). 7. R. R. Bockemuehl, "Analysis of Field-Effect Transistors With Arbitrary Charge Distribution," IEEE Trans. Electron Devices, ED-10, 31 (1963). 8. L. J. Sevin, Field Effect Transistors, McGraw-Hill Book Co., New York (1965). 9. F. E. Gentry, "Turn-on Criterion for p-n-p-n Devices," IEEE Trans. Electron Devices, ED-11, 14 (1964). 10. E. S. Yang and N. C. Voulgaris, " On the Variation of Small-Signal Alphas of a p-n-p-n Device With Current," Solid State Electron., 10, 641 (1967). 11. Y. Kawana and T. Misawa, "A Silicon p-n-p-n Power Triode," J. Electronics and Control, 6, 324 (1959). 12. J. F. Gibbons, " Graphical Analysis of the /- V Characteristics of Generalized p-n-p-n Devices," Proc. IEEE, 55, 1366 (1967). 13. J. F. Gibbons, "A Critique of the Theory of p-n-p-n Devices," IEEE Trans. Electron Devices, ED-11, 406 (1964). 14. A. Herlet, "The Maximum Blocking Capability of Silicon Thyristors," Solid State Electron, 5, 655 (1965). 14a. W. Fulop, "Three Therminal Measurement of Current Amplification Factors of Controlled Rectifiers," IEEE Trans. Electron Devices, ED-10, 120 (1963). 362 p-n-p-n and Junction Field-Effect Devices 15. S. M. Sze and G. Gibbons, "Avalanche Breakdown Voltages of Abrupt and Linearly Graded p-n Junctions in Ge, Si, GaAs, and GaP," Appl. Phys. Letters, 8, 111 (1966). 16. C. R. Crowell and S. M. Sze, "Temperature Dependence of Avalanche Multiplication in Semiconductors," Appl. Phys. Letters, 9, 242 (1966). 17. E. S. Yang, "Turn-off Characteristics of p-n-p-n Devices," Solid State Electron., 10, 927 (1967). 18. T. S. Sundresh, " Reverse Transient in p-n-p-n Triodes," IEEE Trans. Electron Devices, ED-14, 400 (1967). 19. R. D. Middlebrook and I. Richer, "Limits on the Power-Law Exponent for Field- Effect Transistor Transfer Characteristics," Solid State Electron., 6, 542 (1963). 20. B. D. Wedlock, "On the Field-Effect Transistor Characteristics," IEEE Trans. Electron Devices, ED-15, 181 (1968). 21. J. R. Hauser, "Characteristics of Junction Field-Effect Devices with Small Channel Length-to-Width Ratios," Solid State Electron., 10, 577 (1967). 22. J. M. LeMee, "Influence of Carrier Mobility and Design Parameters on Field Effect Transistor Characteristics," IEEE Trans. Electron Devices, ED-15, 110 (1968). 23. H. E. Halladay and A. Van Der Ziel, "DC Characteristics of Junction Field-Effect Transistors," IEEE Trans. Electron Devices, ED-13, 531 (1966). 24. C. T. Sah, "Theory of Low-Frequency Generation Noise in Junction-Gate Field- Effect Transistors," Proc. IEEE, 52, 795 (1964). 25. F. M. Klaassen, "High-Frequency Noise of the Junction Field-Effect Transistor," IEEE Trans. Electron Devices, ED-14, 368 (1967). 26. W. C. Bruncke and A. Van Der Ziel, "Thermal Noise in Junction-Gate Field-Effect Transistors," IEEE Trans. Electron Devices, ED-13, 323 (1966). 27. H. E. Halladay, and A. Van Der Ziel, "Field-Dependent Mobility Effects in the Excess Noise of Junction-Gate Field-Effect Transistors," IEEE Trans. Electron Devices, ED-14,\0 (1967). 28. R. M. Warner, W. H. Jackson, E. I. Doucette, and H. A. Stone, "A Semiconductor Current Limiter," Proc. IRE, 47, 45 (1959). 29. H. Lawrence, "A Diffused Field-Effect Current Limiter," IRE Trans. Electron Devices, ED-9, 82 (1962). 30. H. J. Boll, J. E. Iwersen, and E. W. Perry, "High-Speed Current Limiters," IEEE Trans. Electron Devices, ED-13, 904 (1966). PART III INTERFACE AND THIN-FILM DEVICES Metal-Semiconductor Devices Metal-lnsulator-Semiconductor (MIS) Diodes IGFET and Related Surface Field Effects Thin-Film Devices INTRODUCTION SCHOTTKY EFFECT ENERGY BAND RELATION AT METAL-SEMICONDUCTOR CONTACT CURRENT TRANSPORT THEORY IN SCHOTTKY BARRIERS MEASUREMENT OF SCHOTTKY BARRIER HEIGHT CLAMPED TRANSISTOR, SCHOTTKY GATE FET, AND METAL-SEMICONDUCTOR IMPATT DIODE MOTT BARRIER, POINT-CONTACT RECTIFIER, AND OHMIC CONTACT SPACE-CHARGE-LIMITED DIODE 8 Metal-Semiconductor Devices I INTRODUCTION The earliest systematic investigation on metal-semiconductor rectifying systems is generally attributed to Braun 1 who in 1874 noted the dependence of the total resistance on the polarity of the applied voltage and on the detailed surface conditions. The point-contact rectifier in various forms found practical applications 2 beginning in 1904. In 1931 Wilson 3 formulated the transport theory of semiconductors based on the band theory of solids. This theory was then applied to the metal-semiconductor contacts. In 1938 Schottky 4 suggested that the potential barrier could arise from stable space charges in the semiconductor alone without the presence of a chemical layer. The model arising from this consideration is known as the Schottky barrier. In 1938 Mott 5 also devised an appropriate theoretical model for swept-out metal-semiconductor contacts that is known as the Mott barrier. The basic theory and the historical development of rectifying metal-semiconductor con- 363 364 Metal-Semiconductor Devices tacts were summarized by Henisch 6 in 1957 in his book Rectifying Semicon- ductor Contacts. Because of their importance in direct current and microwave applications and as tools in the analysis of other fundamental physical parameters, metal-semiconductor contacts have been studied extensively. Recently, reproducible and near-ideal metal-semiconductor contacts have been fabri- cated with the help of modern transistor technology 293 and improved vacuum technology. In Section 2 we shall first consider the Schottky effect. The formation of an energy barrier between a metal and a semiconductor is discussed in Section 3. Section 4 presents the current transport theory. The measurements of the barrier heights using current-voltage, capacitance- voltage, and photoelectric methods are considered in Section 5. Section 6 considers a variety of applications using metal-semiconductor contacts including the clamped transistor, field-effect transistor, and IMPATT diode. In Section 7 the Mott barrier, point-contact rectifier, and the ohmic contact are discussed. Finally, the space-charge-limited diodes are briefly considered. 2 SCHOTTKY EFFECT In a metal-vacuum system the minimum energy necessary for an electron to escape into vacuum from an initial energy at the Fermi level is defined as the work function. This quantity is denoted by q<f) m (0„, in volts), as shown in Fig. 1 . For metals, q(f) m is of the order of a few electron volts and varies from 2 to 6 eV. The values of q4> m are generally very sensitive to surface contamination. The most reliable values 7 for clean surfaces are given in Fig. 2. When an electron is at a distance x from the metal, a positive charge will be induced on the metal surface. The force of attraction between the electron and the induced positive charge is equivalent to the force which would exist between the electron and an equal positive charge located at ( — x). This positive charge is referred to as the image charge. The attractive force, called the image force, is given by F= -f = ~<f (i) 4n(2x) 2 s 16ns x 2 where e is the permittivity of free space. The work done by an electron in the course of its transfer from infinity to the point x is given by £( X )= Fdx = -^ . (2) The above energy corresponds to the potential energy of an electron at a 2 Schottky Effect 365 , ' t q(A<£) ^ 1 ^-IMAGE / ' v POTENTIAL J - ' 1 ^v. ENERGY 's ^O \ // ^ s> \ 11 I'm 9S *R // ij ^^> ^q£X ^^. ^^ ^^^ r J r ' E F 1 N CTA L Fig. 1 Energy band diagram between a metal surface and a vacuum. The metal work function is q<^ m - The effective work function (or barrier) is lowered when an electric field is applied to the surface. The lowering is due to the combined effects of the field and the image force. distance x from the metal surface, shown in Fig. 1, and is measured down- wards from the x-axis. When an external field £ is applied, the total potential energy, PE, as a function of distance (measured downwards from the x-axis) is given by the sum PE(x) = <l 16ne x + qSx eV. (3) The Schottky barrier lowering (also referred to as image force lowering), A0, and the location of the lowering, x m (as shown in Fig. 1), are given by the condition d[PE(x)~]ldx = 0, or •*•»« — A(f> = 4ke = 2£x« cm volts. (4) (5) The lowering of the metal work function by an amount A</> as a result of the 366 Metal-Semiconductor Devices (S110A) <#>''NOIlDNnJ »aOM IVIBW <s a 2 Schottky Effect 367 image force and the electric field is called the Schottky effect. From Eqs. (4) and (5) we obtain A<£ = 0.12 V and x m c- 60 A for S = 10 5 V/cm; and A0 = 1.2 V and x m a 10 A for 8 = 10 7 V/cm. Thus at high fields there is considerable Schottky barrier lowering, and the effective metal work function for thermionic emission (qc]) B ) is reduced. The above results can also be applied to metal-semiconductor systems. However, the field should be replaced by the maximum field at the interface, and the free-space permittivity e should be replaced by an appropriate permittivity e s characterizing the semiconductor medium. This value may be different from the semiconductor static permittivity. This is because, during the emission process, if the electron transit time from the metal-semiconductor interface to the barrier maximum x m is shorter than the dielectric relaxation time, the semiconductor medium does not have enough time to be polarized, and smaller permittivity than the static value is expected. It will be shown, however, that for Ge and Si the appropriate permittivities are about the same as their corresponding static values. Because of the larger values of e s in a metal-semiconductor system the barrier lowering and the location of the potential maximum are smaller than those for a corresponding metal-vacuum system. For example, for s s = I6s , A(j> as obtained from Eq. (5) is only 0.03 V for $ = 10 5 V/cm and even smaller for smaller fields. Although the barrier lowering is small, it does have a profound effect on current transport processes in metal-semi- conductor systems. These will be considered in Section 4. The dielectric constant (eje ) in gold-silicon barriers has been obtained from the photoelectric measurement which will be discussed in Section 5. The experimental result 8 is shown in Fig. 3 where the measured barrier lowering is plotted as a function of the square root of the electric field. From Eq. (5) the image-force dielectric constant is determined to be 12+0.5. For ejs = 12, the distance x m varies between 10 A and 50 A as in the field range shown in Fig. 3. Assuming a carrier velocity of the order of 10 7 cm/sec, the transit time for these distances should be between 1 x 10 -14 sec and 5 x 10 -14 sec. The image-force dielectric constant should thus be comparable to the dielectric constant of approximately 12 for electromagnetic radiation of roughly these periods (wavelengths between 3 jum and 15 /mi). 9 The dielectric constant of silicon is essentially constant (1 1.7) from dc to X — 1 /mi, therefore the lattice has time to polarize while the electron is traversing the depletion layer. There is thus excellent agreement between the photoelectric measurements and data deduced from the optical constants. For Ge and GaAs the dependence of the optical dielectric constant on wavelength is similar to that of Si. It is thus expected that the image-force permittivities of these semiconductors in the above field range are approximately the same as the corresponding static values. 368 Metal-Semiconductor Devices 60 E - 30 -6- Au-Si i / 1 s / / / 1 / / / / / / / s/ / / / / *r 5X10 a ( V/cm) I.5X 10 Fig. 3 Measurement of barrier lowering as a function of the electric field in a Au-Si diode. (After Sze et al., Ref. 8.) ENERGY BAND RELATION AT METAL-SEMI- CONDUCTOR CONTACT (1) Ideal Condition and Surface States When a metal is making intimate contact with a semiconductor, the Fermi levels in the two materials must be coincident at thermal equilibrium. We will first consider two limiting cases; 6 a more general result will be considered later. 10 The two limiting cases are shown in Fig. 4. Figure 4(a) shows the electronic energy relations at an ideal contact between a metal and an «-type semiconductor in the absence of surface states. At far left, the metal and semiconductor are not in contact and the system is not in thermal equilibrium. If a wire is connected between the semiconductor and the metal so that charge will flow from the semiconductor to the metal and electronic equilibrium is established, the Fermi levels on both sides line up. Relative to the Fermi level in the metal, the Fermi level in the semiconductor has lowered by an amount equal to the difference between the two work functions. This potential 3 Energy Band Relation at Metal-Semiconductor Contact 369 VACUUM GAP T q<*> j-qx -— e Tl\ I qx Til F.. <#Bn jt — E C_Tl (a) ^i^-** T qx i L q<*>, T — E c q«L -8- qx Th q<A * I L ^ B £? <^B -q<£, q\ (b) Fig. 4 Energy band diagrams of metal-semiconductor contacts. (After Henisch, Ref. 6.) difference, q<j> m —q(x+ V n ), is called the contact potential where qx is the electron affinity measured from the bottom of the conduction band to the vacuum level. As the distance <5 decreases, an increasing negative charge is built up at the metal surface. An equal and opposite charge (positive) must exist in the semiconductor. Because of the relatively low carrier concentration, this positive charge is distributed over a barrier region near the semiconduc- tor surface. When 8 is small enough to be comparable with interatomic distances, the gap becomes transparent to electrons, and we obtain the limiting case as shown in the far right (Fig. 4). It is clear that the limiting value of the barrier height, q(f> Bn (neglecting the Schottky lowering) , is given by q<\> B « = q{K - x)- (6) The barrier height is simply the difference between the metal work function and the electron affinity of the semiconductor. For an ideal contact between a metal and a />-type semiconductor, the barrier height, q<f> Bp , is given by q<f> Bp = E g - q(<j> m - x). (7) 370 Metal-Semiconductor Devices For a given semiconductor and for any metals, the sum of the barrier heights on «-type and p-type substrates is thus expected to be equal to the band gap, or Violin + 4>Bp) = Eg • (8) The second limiting case is shown in Fig. 4(b) where a large density of surface states is present on the semiconductor surface. At far left, the figure shows equilibrium between the surface states and the bulk of the semicon- ductor but nonequilibrium between metal and the semiconductor. In this case the surface states are occupied to a level E F . When the metal-semi- conductor system is in equilibrium, the Fermi level of the semiconductor relative to that of the metal must fall an amount equal to the contact potential and, as a result, an electric field is produced in the gap S. If the density of the surface states is sufficiently large to accommodate any additional surface charges resulting from diminishing S without appreciably altering the occu- pation level E F , the space charge in the semiconductor will remain unaffected. As a result the barrier height is determined by the property of the semicon- ductor surface and is independent of the metal work function. (2) Depletion Layer It is clear from the above discussion that when a metal is brought into intimate contact with a semiconductor, the conduction and valence bands of the semiconductor are brought into a definite energy relationship with the Fermi level in the metal. Once this relationship is known, it serves as a boundary condition on the solution of the Poisson equation in the semi- conductor, which proceeds in exactly the same manner as in the p-n junctions. The energy band diagrams for metals on both «-type and p-type materials are shown, under different biasing conditions, in Fig. 5. Under the abrupt approximation that p ~ qN D for x < W, and p ca 0, dV/dx ^ for x > W where W is the depletion width, the results for the metal-semiconductor barrier are identical to those of the one-sided abrupt p-n junction and we obtain / 2s / kT\ ^(depletion width) = /— - \V bi -V , (9) V qN D \ q J \g(x)\ = — (W - x) = S m - — x, (10) V(x) = ^(Wx-\x 2 )-<f> Bn , (11) e c 2 3 Energy Band Relation at Metal-Semiconductor Contact 371 n - TYPE SEMICONDUCTOR p - TYPE SEMICONDUCTOR ^Bn l \f$ MA f- 6 qv bi W7/ T, q<£ Bp •qVu: (a) THERMAL EQUILIBRIUM \K1 T qV F -.4-^ M -qV F _L qiv bi -v F ) (b) FORWARD BIAS q(V b i+V R 1 (C) REVERSE BIAS Fig. 5 Energy band diagram of metal n-type and metal p-type semiconductors under different biasing conditions. where the term kTjq arises from the contribution of the mobile carriers to the electric field and S m is the maximum field strength which occurs at x = 0: , m = « x _ 0) . JM* (v u _ y „ £) . 2 {y H _ y _ *?),„, (12) The space charge £) sc per unit area of the semiconductor and the depletion- layer capacitance C per unit area are given by Qsc = qN D W = ^jlqe, N D (v bi - V - — ) coul/cm : (13) C = dQsc dV qe s N D <«■-'-?) = -£ farad/cm 2 . (14) 372 Metal-Semiconductor Devices Equation (14) can be written in the form — (15a) i$ C z qs s N D 2 {-dV) qs s N D or (15b) 2 {-dV) Nd = ^-^- (15C) te) If N D is constant throughout the depletion region, one should obtain a straight line by plotting 1/C 2 versus V. If N D is not a constant, one can use the differ- ential capacitance method to determine the doping profile from Eq. (15c). (3) General Expression for the Barrier Height The barrier heights of metal-semiconductor systems are, in general, determined by both the metal work function and the surface states. A general expression 10 of the barrier height can be obtained on the basis of the following two assumptions: (1) with intimate contact between the metal and the semi- conductor and with an interfacial layer of atomic dimensions, this layer will be transparent to electrons and can withstand potential across it, and (2) the surface states per unit area per electron volt at the interface are a property of the semiconductor surface and are independent of the metal. A more detailed energy band diagram of a metal «-type semiconductor contact is shown in Fig. 6. The various quantities used in the derivation which follows are defined in this figure. The first quantity which is of interest is the energy level q(f) . This was the energy difference between the Fermi level and the valence-band edge at the surface before the metal-semiconductor contact was formed. It specified the level below which all surface states must have been filled for charge neutrality at the surface. 11 The second quantity is q4> Bn , the barrier height of the metal-semiconductor contact ; it is this barrier which must be surmounted by electrons flowing from the metal into the semiconductor. The interfacial layer will be assumed to have a thickness of a few angstroms and will therefore be essentially transparent to electrons. We consider a semiconductor with acceptor surface states whose density is D s states/cm 2 /eV, and D s is a constant over the energy range from q<j> to the Fermi level. The surface-state charge density on the semiconductor Q ss 3 Energy Band Relation at Metal-Semiconductor Contact 373 E_ 1 *Bn = *B0 = *o = A^> = A = X = V bi = WORK FUNCTION OF METAL BARRIER HEIGHT OF METAL- SEMICONDUCTOR BARRIER ASYMTOTIC VALUE OF 4> Bn AT ZERO ELECTRIC FIELD ENERGY LEVEL AT SURFACE IMAGE FORCE BARRIER LOWERING POTENTIAL ACROSS INTERFACIAL LAYER ELECTION AFFINITY OF SEMICONDUCTOR BUILT-IN POTENTIAL PERMITTIVITY OF SEMICONDUCTOR PERMITTIVITY OF INTERFACIAL LAYER THICKNESS OF INTERFACIAL LAYER SPACE-CHARGE DENSITY IN SEMICONDUCTOR SURFACE- STATE DENSITY ON SEMICONDUCTOR SURFACE -CHARGE DENSITY ON METAL Fig. 6 Detailed energy band diagram of a metal n-type semiconductor contact with an interfacial layer of the order of atomic distance. (After Cowley and Sze, Ref. 10.) is given by Q ss = -qD s {E g -q(j) -q(f) Bn -q^4>) coul/cm 2 (16) where qA(j) is the Schottky barrier lowering. The quantity in parentheses is simply the difference between the Fermi level at the surface and q<j> . D s times this quantity yields the number of surface states above q4> which are full. The space charge which forms in the depletion layer of the semiconductor at thermal equilibrium is given in Eq. (13) and is rewritten as Q sc = j2qe s N D (^ Bn - V n + A0 - — ) — ) coul/cm 2 . (17) 374 Metal-Semiconductor Devices The total equivalent surface charge density on the semiconductor surface is given by the sum of Eqs. (16) and (17). In the absence of any space charge effects in the interfacial layer, an exactly equal and opposite charge, Q M (coul/cm 2 ), develops on the metal surface. For thin interfacial layers such effects are negligible, and Q M can be written as Q M =-(Qss+Qsc)- 08) The potential A across the interfacial layer can be obtained by the application of Gauss' law to the surface charge on the metal and semiconductor : A=-<5^£ (19) where £j is the permittivity of the interfacial layer and S its thickness. Another relation for A can be obtained by inspection of the energy band diagram of Fig. 6: A = (f> m - (X + <f>Bn + A<£). (20) This results from the fact that the Fermi level must be constant throughout this system at thermal equilibrium. If A is eliminated from Eqs. (19) and (20), and Eq. (18) is used to substitute for Q M , we obtain (^-/)-(^ n + A^) = ^^^(^ B + A0-F B -^) — (Eg ~ #0 - <l<t>Bn ~ $A0). (21) Equation (21) can now be solved for <f> Bn . Introducing the quantities _ 2qs s N D S 2 c x = ■—} (22a) £* Si (22b) to + q 2 SD s ) we can write the solution to Eq. (21) as <i>Bn = Cz&rn - X) + (1 - C 2 ){^ - * ) - Atf>] [ C1( , m _, )+(1 _ C ^_, )^_^( F „ + ^) + {-^-cl' 2 CrC*V l2 \ 3 Energy Band Relation at Metal-Semiconductor Contact 375 Equation (22a) can be used to calculate q if values of 5 and £ f are estimated; for vacuum-cleaved or well-cleaned semiconductor substrates the interfacial layer will have a thickness of atomic dimensions, i.e., 4 or 5 A. The permitti- vity of such a thin layer can be well approximated by the free space value, and since this approximation represents a lower limit for e t , it leads to an over- estimation of c 2 . For £ s « 10e , e t = e , and N D < 10 18 cm -3 , c x is small, of the order of 0.01 V, and the { } term in Eq. (23) is estimated to be less than 0.04 V. Neglecting the { } term in Eq. (23) reduces the equation to 4>Bn = ClWm - X) + (1 " C 2 )M ~ 00 J ~ ^ = ^2 0m + ^3 • If c 2 and c 3 can be determined experimentally and if % is known, then (24) and from (22b) E g (c 2X + c 3 + A(f>) 4>o = ~ 7j ~\ ( 25 > q (1 - c 2 ) (1 - C 2 )Sj c 2 8q z Using the previous assumptions for <5 and e f , we obtain D s ^ 1.1 x 10 13 (1 - c 2 )/c 2 states/cm 2 /eV. (26a) The two limiting cases considered previously can be obtained directly fromEq. (24): (A) When D s -> oo, c 2 -> then, q(j> B „ = {E g - # ) - qk<t>. (27) In this case the Fermi level at the interface is " pinned " by the surface states at the value q<j) above the valence band. The barrier height is independent of the metal work function and is determined entirely by the doping and surface properties of the semiconductor. (B) When D s -► 0, c 2 -> 1 then, q$Bn = q(.4>m - x) - q^<t>- (28) This is identical to Eq. (6) (except for the Schottky lowering term) and is for the barrier height of an ideal Schottky barrier where surface-state effects are neglected. The experimental results of the metal n-type silicon system are shown in Fig. 7. A least-square straight line fit to the data yields cf) B „ = O.2350 M - 0.352. 376 Metal-Semiconductor Devices 2.0 3.0 4.0 <£ m (VOLTS) 6.0 Fig. 7 Experimental results of barrier heights for metal n-type silicon system. (Ref. 10.) Comparing this expression with Eq. (24) and using Eqs. (25) and (26a), we obtain c 2 = 0.235, # = 0.33 eV, and D s = 4 x 10 13 states/cm 2 /eV. Similar results are obtained for GaAs, GaP, and CdS which are shown in Fig. 8 and listed in Table 8.1. We note that the values of q(j) for Si, GaAs, and GaP are very close to one-third of the band gap. Similar results are obtained for other semicon- ductors. Figure 9 shows a plot of (E c — qcj) ) versus the band gap for gold contacts on various semiconductors. The solid line is for (E c — q<j) ) = 2E g /3 which passes through most of the experimental points. 12 This fact indicates TABLE 8.1 SUMMARY OF BARRIER HEIGHT DATA AND CALCULATIONS FOR Si, GaP, GaAs, AND CdS Semi- conductor c 2 ,(V) X(F) D, x 10- (eV- 1 cm- 2 ) ^o(eV) q<f> /E g Si GaP GaAs CdS 0.27 ± 0.05 0.27 ± 0.03 0.07 ± 0.05 0.38 ±0.16 -0.55 ±0.22 -0.01 ±0.13 ±0.49 ±0.24 -1.20 ±0.77 4.05 4.0 4.07 4.8 2.7 ± 0.7 2.7 ± 0.4 12.5 ± 10.0 1.6±1.1 0.30 ± 0.36 0.27 0.66 ± 0.2 0.294 0.53 ± 0.33 0.38 1.5 ±1.5 0.6 3 Energy Band Relation at Metal-Semiconductor Contact 377 6.0 Fig. 8 Similar results for other metal-semiconductor systems. (Ref. 10.) O.l - i i ■ i i I i i 1 - Au-SEMICONDUCl roR B NO - T= 300 °K c - - SiC/ - (V i c Go OAIAS 'BP - Si._/*"AIS b - - GaSb - - G ev A InP - - - / /" i i i i O n TYPE • p TYPE A BOTH i i i i i Eg (eV) Fig. 9 Measured (E c -q<f> ) versus the band gap for Au contacts on various n-type semi- conductors. (After Mead and Spitzer, Ref. 12.) 378 Metal-Semiconductor Devices that most semiconductor surfaces have a high peak density of surface states near one-third of the gap from the valence band edge. The theoretical calcu- lation by Pugh 1 3 for < 1 1 1 > diamond indeed gives a narrow band of surface states slightly below the center of the forbidden gap. It is thus expected that a similar situation may exist for other semiconductors. For CdS, however, the value of qcf) is very large (~0.8 E g ) and the metal- CdS system behaves as if there were a low density of surface states. This may be explained by the fact that the surface states are very close to the band edge, and the Fermi level at the interface can move up or down in energy over a relatively large range without requiring any surface charge to fill or empty these states. 4 CURRENT TRANSPORT THEORY IN SCHOTTKY BARRIERS The current transport in metal-semiconductor barriers is mainly due to majority carriers in contrast to p-n junctions where the minority carriers are responsible. We shall present in this section three different approaches: (1) the simple isothermal thermionic emission theory by Bethe, 14 (2) the simple isothermal diffusion theory by Schottky, 4 and (3) the more general theory which incorporates the above two theories into a single thermionic emission-diffusion theory by Crowell and Sze. 16 Also included in this section is a discussion of the minority carrier injection ratio. (1) Thermionic Emission Theory The thermionic emission theory is derived from the assumptions that (1) the barrier height q4> Bn is much larger than kT, (2) electron collisions within the depletion region are neglected, and (3) the effect of image force is also neglected. Because of the above assumptions the shape of the barrier profile is immaterial and the current flow depends solely on the barrier height. The current density / s _ >m from the semiconductor to the metal is then given by the standard thermionic emission equation 14 _ qn(m*) *^3/2 ^oo 3 /2 oo oo oo - 2 j dv y j dv z J i? x exp {Zllkl ) --oo "-oo - vo !/2 .oo / m*ii 2 m*(v x 2 + v y 2 + v z 2 y 2kT dv„ / kT y* i «V\ 4 Current Transport Theory in Schottky Barriers 379 The velocity v 0x is the minimum velocity required in ^-direction to surmount the barrier and is given by the relation im*v 0x 2 = Q(V bi - V) (30) where V bi and Fare the built-in potential and the applied voltage respectively (V is positive for forward bias). The electron concentration n is given by / E C -E F \ J27tm*kTY' 2 ( qVA Substitution of Eq. (30) and (31) into Eq. (29) yields s->m (32) *;,2 Anqm • k ~~h 2 For free electrons, A* = 120 amp/cm 2 /°K 2 = A, which is the Richardson constant for thermionic emission into a vacuum. For semiconductors with isotropic effective mass in the lowest minimum of the conduction band such as «-type GaAs, A*/A = m*/m where m* and m are the effective mass and the free-electron mass respectively. For multiple-valley semiconductors the appropriate Richardson constant A* associated with a single energy minimum is given by 15 4i!_ l A m -4- = — (h 2 m*m* + l 2 2 m*m* + / 3 2 m/m/) 1/2 (33) where / 1? / 2 , and / 3 are the direction cosines of the normal to the emitting plane relative to the principal axes of the ellipsoid, and m x *, m*, and m* are the components of the effective mass tensor. For Ge the emission in the conduction band arises from minima at the edge of the Brillouin zone in the <111> direction. These minima are equivalent to four ellipsoids with longi- tudinal mass m* — 1.6 m and transverse mass m t * = 0.082 m . The sum of all the A t * values has a minimum in the <111> direction (^-\ = m*/m + Km*) 2 + Sm*m*y /2 /m = 1.11. (34) \ A /„-Ge<lll> The maximum A* occurs for the <100> direction: /A*\ __ A_ Urn*) 2 + 2m*m *-] 1/2 \ A /n.Ge<100> m L 3 = 1.19. (35) 380 Metal-Semiconductor Devices For Si the conduction band minima occur in the <100> directions and w,* = 0.97 m , m t * = 0.19 m . All minima contribute equally to the current in the <111> direction, yielding the maximum A*: (t), _6_ m (m*) 2 + 2m t *m? 1/2 = 2.2. /j-Si<lll> The maximum value of A* occurs for the <100> direction (36) (i-) = 2m*lm + 4(m*m*yi 2 /m = 2.1. (37) \ A /n-Si<100> For holes in Ge, Si, and GaAs the two energy maxima at k = give rise to approximately isotropic current flow from both the light and heavy holes. Adding the currents due to these carriers, we obtain -7 = (Ml* + %*)K / p-type (38) A summary of the values 15 of (A* (A) is given in Table 8.2. Since the barrier height for electrons moving from the metal into the semiconductor remains the same, the current flowing into the semiconductor is thus unaffected by the applied voltage. It must therefore be equal to the current flowing from the semiconductor into the metal when thermal equi- librium prevails, i.e., when V = 0. The corresponding current density is obtained from Eq. (32) by setting V = 0, J m ^ s = -A*r 2 exp \ kTj- (39) TABLE 8.2 VALUES OF A*/A Semiconductor Ge Si GaAs p-type 0.34 0.66 0.62 w-type <111> 1.11 2.2 0.068 (low field) «-type <ioo> 1.19 2.1 1.2 (high field) 4 Current Transport Theory in Schottky Barriers The total current density is given by the sum of Eqs. (32) and (39), 381 j„ = u*:rexp - = j.< exp <a- kT 1 where J ST = A*T 2 exp ))M£I- / Q<f>Bn\ \ kT J (40) (41) Equation (40) is similar to the Shockley equation for p-n junctions. However, the expressions for the saturation current densities are quite different. (2) Diffusion Theory 4 The diffusion theory is derived from the assumptions that (1) the barrier height is much larger than kT; (2) the effect of electron collisions within the depletion region is included ; (3) the carrier concentrations at x = 0, and and x = Ware unaffected by the current flow, i.e., they have their equilibrium values ; and (4) the impurity concentration of the semiconductor is nonde- generate. Since the current in the depletion region depends on the local field and the concentration gradient, we must use the current density equation : J x = J n = Q = qD n dn qn(x) 8V(x) dn kT dx dx (42) Under the steady-state condition, the current density is independent of x, and Eq. (42) can be integrated using exp[ — qV(x)/kT] as an integrating factor. We then have J n exp qV(x) kT dx = 4D„{n(x)exp [ - ^] } q , (43) and the boundary conditions qV(0)=-q(V n +V bi )=-qcl> Bn qV(W)=-qV n -qV £ c (0) - E F n(0) = N c exp [- kT = N c exp I kT J (44) n(W) = n = N c exp (-»)■ 382 Metal-Semiconductor Devices Substitution of Eq. (44) into Eq. (43) yields J n = qN c D n exp(g|-l w f exp qV(x) kT dx. (45) For Schottky barriers, neglecting image-force effect, the potential distribu- tion is given by Eq. (11), or qV(x) = q 2 N D ( Wx -t)~ i4>i Substituting into Eq. (45) and expressing W in terms of V bi + V, leads to J„^ kT q(V bi - V)2N D 1/2 exp - q<t>Br kT 1 — exp 2q(V bi - V) kT (46) where V has positive values for forward bias, and negative values for reverse bias. Since qV bi > kT is one of the conditions on which the present theory is based, the exponential term in the denominator can be neglected for all reverse voltages and for small forward voltages, Eq. (46) reduces to q 2 D n N c [q(V bi -V)2N D ^' 2 kT exp H-'Ml-O Q (47) The current density expressions of the diffusion and thermionic emission theories, Eqs. (40) and (47), are basically very similar. However, the "satura- tion current density," J SD , for the diffusion theory varies more rapidly with the voltage but is less sensitive to temperature in comparison with the "saturation current density," J ST , of the thermionic emission theory. (3) Thermionic Emission-Diffusion Theory 16 A synthesis of the above thermionic emission and diffusion approaches will now be considered. This approach is derived from the boundary condi- tion of a thermionic recombination velocity, v R , near the metal-semiconductor interface. In addition, effects of electron optical-phonon scattering and quantum-mechanical reflection at the metal-semiconductor interface are incorporated. The electron optical-phonon scattering between the barrier 4 Current Transport Theory in Schottky Barriers 383 energy maximum (x m ) and the metal predicts a low-field limit for applying the thermionic emission theory, i.e., for assuming that the metal acts as a perfect sink for carriers which cross the potential maximum in the direction of the metal. The effect of quantum-mechanical reflection and quantum tunneling on the recombination velocity predicts the high-field limit of validity of the thermionic emission theory and the onset of thermionic-field emission. Since the diffusion of carriers is strongly affected by the potential configura- tion in the region through which the diffusion occurs, we consider the electron potential energy, qty{x), versus distance as shown in Fig. 10 for a metal- semiconductor barrier. The origin of the barrier itself has been considered in the previous section and is due mainly to a combination of the effects of surface states and the metal work function. We will consider the case where the barrier height is large enough that the charge density between the metal surface and x = W is essentially that of the ionized donors, i.e., W is the edge of the electron depletion layer. The rounding of qxjj near the metal- semiconductor interface is due to the superimposed effects of the electric field associated with the ionized donors (shown by the dotted extrapolation of \\j) and the attractive image force experienced by an electron when it ap- proaches the metal. As drawn, the applied voltage V between the metal and the semiconductor bulk would give rise to a flow of electrons into the metal. The imref (— qcf) n ) associated with the electron current density J in the barrier is also shown schematically as a function of distance in Fig. 10. Throughout Electron Energy //?¥//)[* METAL SEMICONDUCTOR Fig. 10 Electron potential energy (qifj) versus distance for a metal-semiconductor barrier. 384 Metal-Semiconductor Devices the region between x m and W, d<j>„ '--*»*• («) where the electron density at the point x is given by n = N c e~ qi * n ~* ),kT ^ where JV C is the effective density of states in the conduction band, and T is the electron temperature. We will assume that the region between x m and W is isothermal and that the electron temperature is equal to the lattice tempera- ture. Equations (48) and (49) will not be applicable between x m and the interface (x = 0) since there the potential energy changes rapidly in distances comparable to the electron mean free path. In this region the distribution of carriers cannot be described by an imref § n nor be associated with an effective density of states. If this portion of the barrier acts as a sink for electrons, however, we can describe the current flow in terms of an effective recombina- tion velocity v R at the potential energy maximum : J = <l(n m - n )v R (50) where n m is the electron density at x m when the current is flowing. n is a quasi-equilibrium electron density at x m , the density which would occur if it were possible to reach equilibrium without altering the magnitude or position of the potential energy maximum. It is convenient to measure both <j> and ij/ with respect to the Fermi level in the metal. Then n = N c e- q<l 'BJ kT and n m = N c exp I — (51) where q<f> Bn is the barrier height, and q<p„(x„^ is the imref at x m . If n is eliminated from Eqs. (48) and (49) and the resulting expression for (f>„ is integrated between x m and W, exp q<t>n(Xm) kT Then from Eqs. (50), (51), and (52), qN c ]-^s9--otWtf)* c - (52) J = 1 + - 7, ap [-kT\[ ap [-kr)- 1 \ (53) 4 Current Transport Theory in Schottky Barriers 385 where v D = fikT exp ~^;(0 Bn + >A) dx (54) is an effective diffusion velocity associated with the transport of electrons from the edge of the depletion layer at W to the potential energy maximum. If the electron distribution is Maxwellian for x >x m , and if no electrons return from the metal other than those associated with the current density qn v R , the semiconductor acts as a thermionic emitter. Then y„ = A*T' (55) where A* is the effective Richardson constant, as shown in Table 8.2. At 300°K, v R is 7.0 x 10 6 , 5.2 x 10 6 , and 1.0 x 10 7 cm/sec for < 1 1 1 > oriented w-type Ge, <111> «-type Si, and »-type GaAs respectively. If v D ^> v R , the pre-exponential term in Eq. (53) is dominated by v R and the thermionic emission theory most nearly applies. If, however, v D <^v R , the diffusion process is dominant. If we were to neglect image-force effects, and if the electron mobility were independent of the electric field, v D would be equal to plS , where $ is the electric field in the semiconductor near the boundary. The standard Schottky diffusion result as given by Eq. (46) would then be obtained, and J * qN ct i£ exp(- ^ [ ex p(f^) " X \ (56) To include image-force effects on the calculation of v D , the appropriate expression for \J/ in Eq. (54) is •A = <t>Bn + A0 - SX - q 16ns* x (57) where A</> is the barrier lowering as given by Eq. (5) (assuming the electric field is constant for x < x m ). Substitution of Eq. (57) into Eq. (54) yields the results that v D ~ \ig for A0 < kT/q, and v D reduces to 0.3 \xi when A0 increases to 20 kT/q. In summary, Eq. (53) gives a result which is a synthesis of Schottky's diffusion theory and Bethe's thermionic emission theory, and which predicts currents in essential agreement with the thermionic emission theory if ii£(x m ) > v R . The latter criterion is more rigorous than Bethe's condition <f (x m ) > kTjqX where X is the carrier mean free path. In the previous section a recombination velocity v R associated with ther- mionic emission was introduced as a boundary condition to describe the 386 Metal-Semiconductor Devices collecting action of the metal in a Schottky barrier. In many cases there is an appreciable probability that an electron which crosses the potential energy maximum will be backscattered by electron optical-phonon scattering with a subsequent reduction in the net current over the barrier. Provided the backscattered electrons are a small fraction of the total electron flux, this effect can be viewed as a small perturbation. The optical-phonon mean free paths (X) of Ge, Si, and GaAs have been listed in Table 2.4 of Chapter 2. As a first approximation, the probability of electron emission over the potential maximum can be given by 17 ' 18 /. ca exp - = exp - 4 167re s £ 1/2 X tanhl —r- y 2kTj m. (58) The probability of more detailed calculation over a Maxwellian distribution of electrons at the potential maximum of metal-Ge, metal-Si, and metal-GaAs Schottky diodes is shown in Fig. 11 for four different temperatures. We note that for small fields (corresponding to large x m ) and high temperatures (corresponding to small X) there is a considerable reduction of the emission probability as expected from Eq. (58). A value of f p less than unity implies that v R should be replaced by a smaller recombination velocity f p v R in Eqs. (50) and (53). If we assume that values of f p less than 0.7 are indicative of failure of the thermionic emission boundary condition, then at room temperature the minimum electric fields are 2 x 10 3 , 2 x 10 2 , and 9 x 10 3 V/cm for Schottky barriers in Ge, Si, and GaAs respectively. In addition to effects of phonon scattering the energy distribution of carriers should be further distorted from a Maxwellian distribution because i.o 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 IOO°K^ /A ^\ V -200°K ^-300°K V- 4 00°K - Ge - "JK ><-l00°K \-20O°K x — 300°K \ 1 - \ — 4 00°K - Si . - IOO°K A^-2 00°K r^^ ^-300°K \— 400°K - GaAs - \0" I0 6 I0 3 I0 4 I0 5 I0 6 lO 3 I0 4 ELECTRIC FIELD (V/CM) Fig. 11 Calculated probability of electron emission over the potential energy maximum for Au-Ge, Au-Si and Au-GaAs diodes as a function of the electric field at the interface and for various lattice temperatures. (After Crowell and Sze, Ref. 18.) 4 Current Transport Theory in Schottky Barriers 387 100 90 80 70 60 50 40 30 20 10 Au-Si g=0.3 i---l0 3 V/cm „ - if/ //4xl0 5 'A i i i i Au-GQAs '£?= 0.068, // €P/ 4 _ 10- 17 /^l0 3 V/cm - ^A4xl0 5 - // J J, i i i i 4 - 10 ^ - Mxl0 5 V/cm - Au-VACUUM m "^ -4xl0 5 io i *-!0 4 ! 1 1 1 -.04 .04 .08 0.1-04 .04 .08 0.1-04 ELECTRON ENERGY (eV) Fig. 12 Calculated quantum-mechanical transmission coefficient for Au-Si, Au-GaAs, and Au-vacuum systems as a function of electron energy measured from the potential maximum. (After Crowell and Sze, Ref. 19.) of quantum-mechanical reflection of electrons by the Schottky barrier and also because of tunneling of electrons through the barrier. The predicted quantum-mechanical transmission coefficients (P Q ) for Au-Si, Au-GaAs, and Au-vacuum system are shown in Fig. 12. The electron energy is measured with respect to the potential energy maximum. We note that in a metal- semiconductor barrier for a given field and a given energy below the potential maximum, the tunneling probability increases with decreasing effective mass. The theoretical ratio f Q of the total current flow considering tunneling and quantum-mechanical reflection, to the current flow neglecting these effects is shown in Fig. 13 as a function of electric field, 19 c P a e -E/kT dE kf' (59) The field at which f Q starts to rise rapidly marks the transition between thermionic and thermionic-field (T-F) emission, since at this point the field- enhanced tunneling process becomes the dominant mechanism. These fields are listed in Table 8.3 for Ge, Si, and GaAs. We notice that/ Q (or the current) in a metal-GaAs barrier increases rapidly near 10 5 V/cm at room temperature. This is mainly due to the contribution of the tunneling component at large fields. 163 For Si and Ge, however, f Q (or the currents) remains essentially constant in the field range shown in Fig. 13. 388 Metal-Semiconductor Devices 1.25 - 0.75 0.25 - 10 10 ELECTRIC FIELD (V/cm) Fig. 13 The ratio f Q of the predicted total current flow considering tunneling and quantum- mechanical reflection to the predicted current neglecting these effects. The field at which f Q starts to increase rapidly marks the transition between thermionic and thermionic-field emission. For GaAs because of its small effective mass the transition occurs at about 10 5 V/cm. (Ref. 19). TABLE 8.3 FIELD LIMITATIONS FOR THE THERMIONIC-EMISSION MODEL AT 300°K Semiconductor Field (V/cm) $i>-t & T — F GaAs Si Ge 9 X 10 3 2 X 10 2 2 X 10 3 1 x 10 5 4x 10 5 4x 10 s 4 Current Transport Theory in Schottky Barriers 389 The complete expression of the J- V characteristics taking into account f p and/g is thus J = J s (e qVlkT - 1) (60) J s = A**T 2 exp / <l<l>Bn \ \ kTj where A** = f P f Q ** (1 +f P f Q VRlv D ) (61) (61a) Figure 14 shows 1 9a the calculated room-temperature values of the effective Richardson constant, ^4**, for metal-Si systems with an impurity concentra- tion of 10 16 cm -3 . We note that for electrons (tf-type Si), A** in the field range 10 4 to 2 x 10 5 V/cm remains essentially at a constant value of about 110 amp/cm 2 /°K 2 . For holes (p-type Si), A** in the above field range also IbO 160 s N 16 -3 T =300°K 140 120 - ELECTRONS 100 40 HOLES _^^^ 20 - 1 1 1 1 1 1 1 1 1 1 1 5X10 5X10 f (V/cm) Fig. 14 Calculated A** vs. electric field for metal Si barriers. (After Andrews and Lepselter, Ref. 19a.) 390 Metal-Semiconductor Devices remains essentially constant but at a considerably lower value (~30 amp/cm 2 /°K 2 ). We conclude from the above discussions that at room temperature in the electric field range of 10 4 V/cm to about 10 5 V/cm, the current transport mechanism in most Ge, Si, and GaAs Schottky barrier diodes is due to therm- ionic emission of majority carriers. (4) Minority Carrier Injection Ratio 20 The Schottky barrier diode is a majority carrier device under low-injection conditions. At sufficiently large forward bias, the minority carrier injection ratio, y, (ratio of minority carrier current to total current) increases with current due to the enhancement of the drift-field component which becomes much larger than the diffusion current. At steady state, the one-dimensional continuity and current density equations for the minority carriers are given by 0= - Vn - PnO 1 d J p x p q dx ' Jp = qt*pP n £ -qD p — . (62) (63) We consider the energy band diagram as shown in Fig. 15 where x x is the boundary of the depletion layer, and x 2 occurs at the interface between the «-type epitaxial layer and the n + substrate. From the rectifying theory as METAL- DEPLETION LAYER V E, QUASI -NEUTRAL REGION | 3V n-TYPE EPITAXIAL - LAYER n + SUBSTRATE Fig. 15 Energy band diagram of an epitaxial Schottky barrier. (After Scharfetter, Ref. 20.) 4 Current Transport Theory in Schottky Barriers discussed in Chapter 3, the minority carrier density at x t is Pn(Xi) = PnO exp qV kT -1 N D exp m- 391 (64) where N D is the w-type donor concentration. The quantity p„(x) at x = x t ex- pressed as a function of the forward current density can be obtained from Eqs. (60) and (64): n. pM = t D T s ' (65) The boundary condition on p n (x) at x = x 2 can be stated in terms of a trans- port velocity, v T = D p /L p , for the minority carriers Jp(x 2 ) = qv T Pn = <l\jf)Pno ex p(^j for L <$, L. (66) where D p and L p are the minority carrier diffusion constant and diffusion length respectively, and L is the distance of the quasi-neutral region. For the low-injection conditions, the minority carrier drift component in Eq. (63) is negligible in comparison with the diffusion term, and the injection ratio, y, is given by 7 = qn t 2 D t J p "+* J n J n N D L P A**T 2 exp I kTJ (67) For gold-w-type silicon diodes (0 Brt = 0.8 V), the ratio is generally much less than 0.1 % at room temperature. For sufficiently large forward bias, however, the electric field causes a significant carrier drift current component which eventually dominates the minority carrier current. From Eqs. (56), (63), and (65) we obtain for the high-current-limiting condition J n n i 2 (P-d\ J ^7^7 7- (68) For example, a gold-«-type silicon diode with N D = 10 15 cm -3 , and / s = 5 x 10~ 7 amp/cm 2 would be expected to have an injection ratio of about 5% at a current density of 350 amp/cm 2 . The intermediate cases have been considered by Scharfetter, and the computed results are shown in Fig. 16(a) where the normalization factors are given by _ qD n N D Jo = — - — , (69a) Vo = qDpni 2 N D LJ S (69b) L/Lp= 1 L/Lp=IO _2 O" =00 07 / 1 i ~^? / 1 1 ** / 1 1 io-' cr= ,o- 2 qOpfi; 2 X °" N d LJ s IO" 3 q°n N D V ^ = Dp 10 J/J (a) 10'r L/Lp= 1 L/Lp = IO" 2 en \ DP " ,o- 3 3 2 y io" 2 lu r / io" 1 IU if' '^ — >-^ F ^-* 1 — 10 1 '~^\ qn 2 L io" 1 '° N J D S 1- J/J (b) Fig. 16 (a) Normalized minority carrier injection ratio versus normalized diode current density. (b) Normalized minority carrier storage time versus normalized current density. (Ref. 20.) 392 5 Measurement of Schottky Barrier Height 393 It is clear from Fig. 16(a) that in order to reduce the minority carrier injection ratio one must use a metal-semiconductor system with large N D (correspond- ing to low resistivity material), large J s (corresponding to small barrier height), and small n t (corresponding to large band gap). Another quantity associated with the injection ratio is the minority storage time t s , which is defined as the minority carrier stored in the quasi-neutral region per unit current density : qp(x) dx *> sJSl — t -j • ( 7 °) For high current limit, t s is given by The results for t s versus the current density are shown in Fig. 16(b) where similar parameters as in Fig. 16(a) are used. For example, in a Au-Si diode with N D = 1.5 x 10 14 cm -3 , L = 1 pan, and D p /L p = 2000 cm/sec, the storage time for / = 10 amp/cm 2 is about 1 ns. If N D is increased to 1.5 x 10 16 cm -3 , the storage time would decrease to 0.01 ns even at a current density of 1000 amp/cm 2 . 5 MEASUREMENT OF SCHOTTKY BARRIER HEIGHT (1) Current- Voltage Measurement A. Forward Characteristics. From Eq. (60) one can predict the ideal forward and reverse /- V characteristics of a Schottky barrier diode. In the forward direction with V > 3kT/q, we can rewrite Eq. (60) as j = ^*T 2 ex P ' «**>\—r«(A* + n Vi^j exp L" kT (72) where (j> B0 is the zero-field asymtotic barrier height as shown in Fig. 6, A** is the effective Richardson constant, and A</> is the Schottky barrier lowering. Since both A** and A0 are functions of the applied voltage, the forward J- V characteristic (for V> 2>kTjq) is not represented by /~ oxp(qV/ kT) but rather by (qV\ \nkTj ex Pfe (72a) 394 Metal-Semiconductor Devices where the parameter n is given by dV n = kTd(lnJ) 4 dA4> kT d(ln A**) 1 H H dV q dV (73) Typical examples are shown in Fig. 17 where n = 1.02 for the W-Si diode and n = 1.04 for the W-GaAs diode. 21 The extrapolated value of current density to zero voltage gives the saturation current J s , and the barrier height can be "u. 10" 10 10" /^^-W-Si 1^ J * -/^^-W-GaAs /• O.I 0.2 V r (VOLT) 0.3 Fig. 17 Forward current density versus applied voltage of W-Si and W-GaAs diodes. (After Crowell et al., Ref. 21.) 5 Measurement of Schottky Barrier Height 395 obtained from the following equation : The value of <t> Bn is not very sensitive to the choice of A**, since at room temperature, a 100% increase in A** will cause an increase of only 0.018 volt in (f) Bn . The theoretical relationship between J s and <j) Bn (or <£ Bp ) at room temperature is plotted in Fig. 18 for A** = 120 amp/cm 2 /°K. For other values of A**, parallel lines can be drawn on this plot to obtain the proper relationship. The experimental values of the barrier heights obtained from the current-voltage measurements are listed in Table 8.4 (compiled by Mead 22 ). From Eq. (72a) we can obtain the junction resistance Rj dV nkT ol qJAj where Aj is the junction area. Typical experimental results of Rj versus / are shown in Fig. 19 for Au-Si and Au-GaAs diodes. Also shown is the result for Si point contact to be discussed later. We note for sufficiently high forward bias the junction resistance does not decrease to zero as predicted by Eq. (75) but instead approaches a constant value. This value is the series resistance R s given, see Fig. 1 5, by Rs = ^-f 2 p(x)dx + ^ + R c (76) where the first term on the right-hand side is the series resistance of the quasi- neutral region, and x t and x 2 are the depletion layer edge and the epitaxial layer-substrate boundary respectively. The second term is the spreading resistance of the metal-semiconductor barrier substrate with a resistivity p B and a circular area of radius r {A i = nr 2 ). The last term R c is the resistance due, to the ohmic contact with the substrate. An important figure of merit for microwave application of the Schottky diodes is the forward bias cutoff frequency, f c0 , which is defined as r 2iiRp Cp where R F and C F are the resistance and capacitance, respectively, at a forward bias of 0.1 V to the flat-band condition. 23 The value of/ c0 is considerably smaller than the corresponding cutoff frequency using zero-bias capacitance, and can be used as a lower limit for practical consideration. A typical result 24 is shown in Fig. 20. We note that for a given doping and a given junction diameter (e.g., 10 /mi), the Schottky diode of «-type GaAs gives the highest cutoff frequency. This is mainly due to the fact that the electron mobility is considerably higher in GaAs. 396 Metal-Semiconductor Devices id 2 -3 r4 10 < V) -5 ^10 io" 7 10 -8 ^Bn 0R ^B P (V0LTS) Bp 0.2 0.3 0.4 0.5 - T= 300° K A*=I20 AMP/cm 2 /°K 2 A / - •* L ». - t £ =3= \ > \ 1 ■V . r-A i 0.4 0.5 0.6 0.7 0.8 ^Bn 0R * B p( V0LTS ^ 10' I0 2 cvj E 10 -I 0.9 1.0 Fig. 18 Theoretical saturation current density at 300°K versus barrier height for a Richard- son constant of 120 amp/cm 2 /°K 2 . 5 Measurement of Schottky Barrier Height 397 TABLE 8.4 MEASURED SCHOTTKY BARRIER HEIGHTS (300°K) Semiconductor Metal Barrier Height (V) I-V c-v Photo w-ALAs (Vac Cleave) Au Pt 1.2 1.0 p-AlSb (Vac Cleave) Au Au (77°K) 0.53 0.59 0.55 p-BN (Chem) Au 3.1 /7-BP Au 0.87 «-CdS (Vac Cleave) n-CdS (Chem) Au Cu Ni Al (77°) Ag Pt Pt Au Pd Cu Ag 1.2 0.68 0.61 0.47 0.80 0.35 0.58 0.86 1.2 0.66 0.59 0.41 0.35 0.78 0.36 0.45 0.56 0.85 1.1 0.68 0.62 0.50 «-CdSe (Vac Cleave) Pt Au Ag Cu 0.37 0.49 0.43 0.33 n-CdTe (Vac Cleave) Au Pt Ag Al 0.71 0.76 0.81 0.60 0.58 0.66 0.76 p Diamond Au 1.35 w-GaAs (Vac Cleave) /7-GaAs (Vac Cleave) Au Pt Be Ag Cu Al Al (77°) Au Au (77°) Pt (77°) 0.95 0.94 0.82 0.93 0.87 0.80 0.88 0.48 0.46 0.48 0.90 0.86 0.81 0.88 0.82 0.80 0.42 398 Metal-Semiconductor Devices TABLE 8.4 (Cont.) Metal Barrier Height (V) I-V C-V Photo /7-GaAs (Vac Cleave) (cont.) w-GaAs Ag (77°) Cu (77°) Al Al (77°) W 0.71 0.44 0.52 0.63 0.61 0.77 0.50 0.80 p-GaP (Chem) p-GaP n-GaP «-GaP (Chem) Au Au Au Cu Al Au Pt Mg Ag 0.68 1.1 0.75 1.3 1.34 1.14 1.34 1.52 1.09 0.715 0.72 1.3 1.20 1.05 1.28 1.45 1.04 1.20 w-GaSb (Vac Cleave) /7-GaSb (Vac Cleave) Au Au (77°) Au (77°) ohmic 0.61 0.75 0.60 «-Ge (Vac Cleave) «-Ge Au Au (77°) Al W 0.48 0.45 0.50 0.48 «-InAs (Vac Cleave and Chem) p-InAs (Vac Cleave and Chem) Au, Ag, Al (77°) Au (77°) ohmic 0.47 w-InP (Vac Cleave) p-lnP (Vac Cleave) Au Au (77°) Cu (77°) Ag Ag (77°) Au Au (77°) 0.49 0.56 0.5 0.54 0.50 0.76 0.78 0.52 0.57 «-InSb (Vac Cleave and Chem) p-InSb (Vac Cleave and Chem) Au (77°) Ag (77°) Au (77°) ohmic 0.17 0.18 5 Measurement of Schottky Barrier Height 399 TABLE 8.4 (Cont.) Barrier Height (V) Semiconductor Metal I-V C-V Photo M-PbO Ag Bi Ni Pb In 0.95 0.94 0.96 0.95 0.93 n-Si (Chem) Au 0.79 0.80 0.78 p-Si (Chem) Au 0.25 «-Si (Chem)(200) Au 0.82 w-Si (Chem) Mo 0.59 0.57 0.56 H-Si (Back Sputtering) PtSi 0.85 0.86 0.85 p-Si (Back Sputtering) PtSi 0.20 n-Si (Chem) W 0.67 0.65 0.65 «-SiC (hexag) (Chem) Au Al 1.95 2.0 «-Sn0 2 Au Ag Cu 0.98 0.65 0.47 n-ZnO (Vac Cleave) Au Pt Pd Ag Cu In Al Ti 0.45 <0.3 ohmic <0.3 0.65 0.75 0.68 0.68 w-ZnS (Vac Cleave) Au Pd Pt Cu Ag In Al Ti Mg 2.0 1.87 1.84 1.75 1.65 1.50 0.8 1.1 0.82 M-ZnSe (Vac Cleave) Au Pt Cu 1.36 1.40 1.10 Mg <0.4 0.70 400 Metal-Semiconductor Devices 10 10" io K io 9 I0 8 10' w io 6 2 IO 5 t, io 4 tr. io 2 ,o 2 io 1 10° x^ Au-Si SCHOTTKY B ARRIER-0 •^Au-GaAs SCHOTTKY BARRIER Si PO NT CONTA CT — , -3.0 -1.0 V (VOLTS) 0.5 1.0 Fig. 19 The sum of the junction resistance and the series resistance versus applied voltage for Au-Si, Au-GaAs, and point-contact diodes. (After Irvin and Vanderwal, Ref. 24.) B. Reverse Characteristics. In the reverse direction the domi- nant effect is due to the Schottky barrier lowering, or J R czJ s (forV R >3kT/q) = ^T 2 exp(-^exp( + ^») (78) where If the barrier height q$ Bn is reasonably smaller than the band gap such that the depletion-layer generation-recombination current is small in comparison 5 Measurement of Schottky Barrier Height 401 a: oc I" i i i i ii i r ■ 8 JUNCTION DIAMFTFRlttm) 6 hi ' ' ' 1 i 1 T n-Ga As-w \ & -- »- .--* ^ % " 20 2 ,o 2 n- Si- ^ ■ 10 --40 ^n-Ge 8 v. * 6 \*~d — *\^- METAL f. 2 n J 0.5/im(. / ( 10 *— OHMIC CONTACT III! 1 1 J6 17 10 2 4 6 8 10" 2 4 DOPANT CONCENTRATION IN EPITAXIAL LAYER (cm" 3 ) Fig. 20 The forward-bias cutoff frequency versus doping concentration in the epitaxial layer for a 0.5 fxm epitaxial layer and with various junction diameters. (Ref. 24.) with the Schottky emission current, then the reverse current will increase gradually with the reverse bias as given by Eq. (78). For most of the practical Schottky diodes, however, the dominant reverse current component is the edge leakage current which is caused by the sharp edge around the periphery of the metal plate. This is similar to the junction curvature effect (with a"j->0) as discussed in Chapter 3. To eliminate this effect, metal-semiconductor diodes have been fabricated with a diffused guard ring as shown 25 in Fig. 21(a). The guard ring is a deep/?-type diffusion, and the doping profile is tailored to give the p-n junction a higher breakdown voltage than that of the metal-semiconductor contact. Because of the elimi- nation of the sharp-edge effect, near-ideal forward and reverse 7- V character- istics have been obtained. Figure 21(b) shows a comparison between experi- mental measurement from a PtSi-Si diode with guard ring and theoretical calculation based on Eq. (78). The agreement is excellent. The sharp increase of current near 30 V is due to avalanche breakdown and is expected for the diode with a donor concentration of 2.5 x 10 16 cm -3 . 402 Metal-Semiconductor Devices I0" 5 Id" 1 ' 1 ' ' 1 1 1 1 1 1 EXPERIH RESULT /IENTAL — v \ \ 1 1 / / 4 / > \ / A xT-*^ THEORE RESULT TICAL — ^ V R (VOLTS) (b) Fig. 21 (a) PtSi-Si diode with a diffused guard ring. (b) Comparison of experiment with theoretical prediction of Eq. (78) for a PtSi-Si diode. (After Lepselter and Sze, Ref. 25.) 5 Measurement of Schottky Barrier Height 403 (p-TYPE) THEORY XPERIMENT _LL 0. 1 1 .0 V R (VOLTS) Fig. 21 (c) Comparison of experiment with theoretical prediction. (After Andrews and Lepselter, Ref. 19a.) In some Schottky diodes there is an additional effect due to intrinsic barrier lowering, i.e., d4> BO ldS ^ 0. In other words, in addition to the image-force lowering effect the intrinsic barrier height <f) B0 is also lowered as the electric field increases. 28b Figure 21(c) shows a comparison of theory and experi- ment of the reverse characteristics for a RhSi-Si diode. The theory is cal- culated based on a value of d^ m \dS = 17 A. We note that there is general agreement particularly in the temperature dependence of the reverse charac- teristics. 193 (2) Capacitance-Voltage Measurement The barrier height can also be determined by the capacitance measurement. When a small ac voltage is superimposed upon a dc bias, charges of one sign are induced on the metal surface and charges of the opposite sign in the semiconductor. The relationship between C and V is given by Eq. (14). Figure 22 shows some typical results where 1/C 2 is plotted against the applied voltage. From the intercept on the voltage axis the barrier height can be determined: 21,26 404 Metal-Semiconductor Devices W-Si-> — W-GaAs INTERCEPT 1 1 { J I 2 V (VOLTS) Fig. 22 //C 2 versus applied voltage for W-Si and W-GaAs diodes. (After Crowell et al., Ref. 21.) kT <l>Bn=V i +V n + A0 (79) where V t is the voltage intercept, and V n the depth of the Fermi level below the conduction band which can be computed if the doping concentration is known. From the slope one can determine the carrier density, Eq. (15c). (This method can also be used to measure the doping variation in an epitaxial layer.) Table 8.4 lists some results of barrier heights measured by the capaci- tance method. 22 (3) Photoelectric Measurement The photoelectric measurement is the most accurate and most direct method of determining the barrier height. 27 When a monochromatic light is incident upon a metal surface, photocurrent may be generated. The basic setup is shown in Fig. 23. For the front illumination the light can generate excited electrons in the metal, process (1), if hv > q<f) Bn , and also can generate 5 Measurement of Schottky Barrier Height 405 electron-hole pairs in the semiconductor, process (2), if the metal film is thin enough and hv > E g . For the back illumination, photoelectrons can be generated, process (1), if hv > q<f) Bn '■> however, when hv > E g , the light will be strongly absorbed at the back semiconductor surface, and the photo- excited electron-hole pairs have very small probability of reaching the metal- semiconductor interface. The photocurrent per absorbed photon, R, as a function of the photon energy, hv, is given by the Fowler theory: 28 R JE S - hv v 2 ^2 X 71 e * - + for x>0 (80) hi/- ( FRONT ILLUMINATION) H2 X <t> SEMICONDUCTOR (BACK ILLUMINATION) Y- OHMIC CONTACT (al hvd) SEMICONDUCTOR (b) Fig. 23 (a) Schematic setup for photoelectric measurement. (b) Energy band diagram for photoexcitation processes. 406 Metal-Semiconductor Devices where hv is the barrier height (q(j) Bn ), E s the sum of hv and the Fermi energy measured from the bottom of the metal conduction band, and x = h (v — v )/kT. Under the condition that E s $> hv, and x > 3, Eq. (80) reduces to or R~(hv- hv ) 2 for h(v - v ) > 3kT JR ~ h(v - v ). (81) (81a) When the square root of the photoresponse is plotted as a function of photon energy, a straight line should be obtained, and the extrapolated value on the energy axis should give directly the barrier height. Figure 24 shows the photoresponse of W-Si and W-GaAs diodes, with barrier heights of 0.65 eV and 0.80 eV respectively. Similar results are also listed in Table 8.4 for other metal-semiconductor systems. The photoelectric measurement has been used to determine the image-force dielectric constant of Au-Si diodes. 8 The photoresponse is shown in Fig. 25 for three different applied voltages. From the values of voltage and doping concentration the electric field can be determined, Eq. (12); and the shift of the photothreshold gives directly the barrier lowering. A plot of A</> versus Mtf-Si W-GaAs 0.65eV / 0.1 3ev 1 J o° / . */ 0.6 0.7 0.8 0.9 I. hi- (eV I.I 1.2 1.3 Fig. 24 Square root of the photoresponse per incident photon versus photon energy for W-Si and W-GaAs diodes. The extrapolated values are the corresponding barrier heights. (Ref. 21.) 5 Measurement of Schottky Barrier Height 407 I* - Au-Si - T = I06°K - REVERSE BIAS VOLT v 2 — . \/Jy - _ • A/Jr \/yy ■*- (hi/-q<*> Bn ) /.A i i i 1 1 i i 0.80 0.82 0.84 0.86 0.88 0.90 0.92 0.94 0.96 0.98 \\v (eVl Fig. 25 Square root of the photoresponse per incident photon, ^/r, versus photon energy for three different biasing conditions. (After Sze et al., Ref. 8.) $ can be made and the image-force dielectric constant (e s /£ ) can be deter- mined (Fig. 3). It is important to note that if the surface states at the metal- semiconductor interface also play a role in the potential distribution, then a larger barrier lowering will result. 28 * The photoelectric measurement can also be used to study the temperature dependence of the barrier heights. 29 Figure 26(a) shows the photoresponse of Au-Si diodes at three different temperatures. The shift correlates reasonably well with the temperature dependence of the silicon band gap as shown in Fig. 26(b). This result implies that the Fermi level at the Au-Si interface is pinned in relation to the valence band edge. Another interesting example is to use the photoelectric method to measure the direct and indirect band gaps of semiconductors. Figure 27(a) shows the photoresponse (of front .17 0.85 0.90 h v (ev ) 200 300 T(°K) Fig. 26 (a) \/r versus hv at three different lattice temperatures. (b) Variation of the Au-Si barrier height with temperature. (After Crowell et al., Ref. 29.) 408 5 Measurement of Schottky Barrier Height 409 1 — i — i — Ga (As ( _ x Px) X = 0.2 2.6 1 i i ■ i ■ i i i-i | i i > i -i ■ i i . t— i 2.4 - DIRECT TRANSITION^ ht* I 2 - 2 a. g2.0 > ~ £ 1.8 Id 5 1.6 - ^/^ INDIRECT TRANSITION^" 1.4, I , i,i,i,i.i.i.i.ii 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 GaAs x(M0LE FRACTION PHOSPHORUS) GaP (W Fig. 27 (a) y/R versus hv for Au-Ga(Asi_ x P x ) diodes. (b) Measured direct and indirect band gaps from (a) as a function of the phosphorus mole fraction. (After Spitzer and Mead, Ref. 30.) illumination) for two samples of GaCASi-^PJ at room temperature. 30 The breaking points of the curves indicate the direct and indirect band-to-band transitions. The threshold energies as a function of the mole fraction of phosphorus are shown in Fig. 27(b). 410 Metal-Semiconductor Devices 6 CLAMPED TRANSISTOR, SCHOTTKY GATE FET, AND METAL-SEMICONDUCTOR IMPATT DIODE As mentioned previously, Schottky diode behavior is electrically similar to a one-sided abrupt p-n junction, and yet it can be operated as a majority- carrier device with inherent fast response. Thus the terminal functions of a p-n junction diode as considered in Chapter 3 can also be performed by a Schottky diode with one exception for the charge-storage diode. This is because the charge-storage time in a majority-carrier device is extremely small. In addition, Schottky diodes can be used (1) as the drain and source contacts in an insulated-gate field-effect transistor to be discussed in Chapter 10, (2) as the emitter and collector junctions in a hot-electron transistor in Chapter 11, (3) as photodetectors in Chapter 12, and (4) as the third terminal electrode in a Gunn oscillator to be considered in Chapter 14. In this section we shall consider three important applications of the Schottky diode: (1) in a clamped transistor, (2) as the gate electrode of a field-effect transistor, and (3) as a passivated IMPATT oscillator. COLLECTOR Q SCHOTTKY DIODE — W ' BASEO- < 6 EMITTER Fig. 28 Composite transistor with a Schottky diode con- nected between the base and collector terminals. (After Tada and Laraya, Ref. 32.) tion time 32 can be reduced to and can be shorter than 1 ns. (1) Clamped Transistor 3132 Because of its fast response a Schottky diode can be incorporated into the base-collector terminal to form a clamped (composite) transistor with a very short saturation time constant, Fig. 28. In the saturation region the collector junction of the original transistor is slightly forward-biased, instead of reverse- biased. If the forward voltage drop in the Schottky diode is much lower than the base- collector " on " voltage of the original tran- sistor, most of the excess base current flows through the diode in which minority carriers are not stored. Thus the saturation time is reduced markedly as compared with that of the original transistor. The measured satura- about 10% of that of the original transistor (2) Schottky Barrier Gate Field-Effect Transistor (FET) The feasibility of a field-effect transistor employing a Schottky barrier gate was first demonstrated by Mead. 33 Figure 29(a) shows a schematic 6 Clamped Transistor, and Metal-Semiconductor IMPATT Diode 411 GATE SEMICONDUCTOR EPITAXIAL LAYER (N D SOURCE METAL-SEMICONDUCTOR BARRIER OHMIC CONTACT (a) 35 30 25 - ,- 20 < e N D = 2xlO l5 cm~ 3 W =2 ftm Z/L =280 V G = 0V - -0.5 - - -1.0 _ -1.5 -2.0 : 1 i i -2-5 , 1 2 3 4 5 6 7 V D (VOLTS) (b) Fig. 29 (a) Schematic diagram of a Schottky barrier gate field-effect transistor. (After Mead, Ref. 33.) (b) Output characteristics of a GaAs Schottky gate FET. (After Hooper and Lehrer, Ref. 34.) device structure where the notations are identical to those defined in Chapter 7. Figure 29(b) shows 34 the output (drain) characteristic of a GaAs Schottky barrier gate FET. The device is fabricated using an /z-type GaAs epitaxial layer 2 /xm thick with doping 2 x 10 15 cm -3 on a semi-insulating GaAs substrate Source and drain ohmic contacts are alloyed Ag-In-Ge, and the 412 Metal-Semiconductor Devices Schottky barrier gate is evaporated Al. The channel width-to-length ratio, (Z/L), is 280. The 7- V characteristic is similar to a junction field-effect transistor. There are, however, two important differences: (1) the Schottky-type FET can be made in semiconductors (such as CdS) in which p-type doping cannot be easily formed and (2) the formation of the metal-semiconductor contact can be achieved at much lower temperatures than those required for a p-n junc- tion. At the present time the GaAs Schottky gate FET gives the best power and noise performances among various types of GaAs transistors. The maxi- mum available gain and noise figures of the FET described above have been shown in Fig. 20 of Chapter 6. (3) Metal-Semiconductor IMPATT Diode The feasibility of microwave CW oscillation has been demonstrated in 6/xm ^ ^■2/iin £ ^PtSi (I000A) £. ,Au ( 3/x m) / ' Pt (3000A) !I000A) SlO, V3^ n (5xlO l5 cm" 3 ) (3000A) Ohrmic Contact Fig. 30 Device geometry and cross-sectional view of a metal-semiconductor IMPATT diode. (After Sze et al., Ref. 35.) 7 Clamped Transistor, and Metal-Semiconductor IMPATT Diode 413 l<i T = 300 ° K A\ f = 8 GHz / * AREA = 3 X I0" 5 cm 2 / 12 / SIO E - / Z> 0. h- 88 / cr UJ o CL / * 6 o / > I o ^ 4 2 - / 2 1 1 1 1 1 1 20 30 40 50 DC BIAS CURRENT (ma) 60 70 Fig. 31 Microwave CW power output versus dc bias current of a metal-semiconductor IMPATT diode. (Ref. 35.) passivated metal-semiconductor diodes. 35 The diodes were Fabricated using. PtSi on epitaxial «-type Si substrate, including a diffused /?-type guard ring. A typical device geometry is shown in Fig. 30, and the experimental result obtained from the device is shown in Fig. 3 1 . Although the efficiency is low, the device does demonstrate the following interesting features: (1) For a background doping of 6 x 10 15 cm -3 , the expected breakdown voltage and oscillation frequency of a p + n diode are about 90 volts and 8 GHz, respec- tively. Thus the basic microwave characteristics of a metal-semiconductor IMPATT diode are similar to those of a p + n IMPATT diode with the same background doping. (2) The device shown in Fig. 30 uses beam-lead sealed- junction technology and is completely passivated. (3) The input dc power density of this diode can be as high as half a million watts per cm 2 , indicating that the device is capable of high-power operation and that the metal contact 414 Metal-Semiconductor Devices can effectively conduct excessive heat away. It is expected that by optimiza- tion of the guard-ring structure and the depletion-layer width, high-efficiency metal-semiconductor IMP ATT diodes can be realized. MOTT BARRIER, POINT-CONTACT RECTIFIER, AND OHMIC CONTACT (1) Mott Barrier (or Punch-Through Barrier) 5,6 When the thickness of the epitaxial layer is reduced (Fig. 1 5), the depletion layer will eventually reach the heavily doped substrate. A Mott barrier is defined as the limiting case in which the epitaxial layer is much narrower than the required depletion layer width such that the layer is swept out even under forward bias. The band diagrams of a Mott barrier are shown in Fig. 32. When a voltage is applied, the potential energy distribution is given by q V(x) = - q<p B „ + — . (82) Substitution of Eq. (82) into Eq. (45) yields the current-voltage relationship for Mott barriers : , q 2 D n N c (V bi -V) J = exp WkT y ( 4<l>Bn \ I AT/1 exp © 1 — exp Q(V U ~ V) kT (83) Comparison of Eq. (83) with Eq. (46) indicates that the Mott barrier is more sensitive to the voltage variation than the Schottky barrier. Since the epitaxial layer is swept out at zero bias, the reverse depletion capacitance is independent of the bias and is given by e s /JV= constant. The dc conductance per unit area of a Mott barrier tends to a limiting value as the reverse voltage increases. This follows from Eq. (83) : For a Schottky barrier there is no such limiting value. It can be shown from Eqs. (46) and (83) that for a given set ofN D , (f) Bn , and W the junction resistance near the zero bias, as defined in Eq. (75), of a Schottky barrier is about one- half that of a Mott barrier. 7 Mott Barrier, Point-Contact Rectifier, and Ohmic Contact 415 (2) Point-Contact Rectifier 6 When a small metal wire with a sharp point makes a contact with a semi- conductor, one generally obtains a point-contact rectifier. The contact may be just a simple mechanical contact, or may be formed by electrical discharge processes which may result in a small alloyed p-n junction. A point-contact rectifier usually has poor forward and reverse 7- V character- istics in comparison with a planar Schottky diode. Its characteristics are also difficult to predict from theory, since the rectifiers are subject to wide variations such as the whisker pressure, contact area, crystal structure, surface treatment, whisker composition, and heat or forming processes. <4n ^^^^ E c ///// ^^^ E F 4 W *J (a) THERMAL EQUILIBRIUM (MOTT BARRIER) (b) FORWARD BIAS (c) REVERSE BIAS Fig. 32 Band diagrams for Mott barriers at various biasing conditions. (After Mott, Ref. 5.) 416 Metal-Semiconductor Devices The advantage of a point-contact rectifier is its small area, which can give very small capacitance, a desirable feature for microwave application. The disadvantages are its large spreading resistance (R s =p/2nr where r is the radius of the hemispheric point contact), its large leakage current due mainly to the surface effect which gives rise to poor rectification ratio, and its soft reverse breakdown characteristics due to a large concentration of field beneath the metal point. (3) Ohm ic Contact There are various methods of forming a metal-semiconductor contact. The methods include thermal evaporation, chemical decomposition, electron-gun bombardment, sputtering, or plating of metals onto chemically etched, mechanically polished, vacuum-cleaved, back-sputtered, heat-treated, or ion-bombarded semiconductor surfaces. To our great surprise, a rectifying barrier is generally formed on «-type semiconductors. This is believed to be due to the surface effect. Surface states give rise to a depletion layer which is only weakly influenced by the metal. Most of the metal-semiconductor contacts are formed in a vacuum system. 36 One of the most important parameters concerning vacuum deposition of metals is the vapor pressure which is defined as the pressure exerted when a solid or liquid is in equilibrium with its own vapor. The vapor pressure 37 versus temperature for the more common elements is shown in Fig. 33(a) and 33(b). An ohmic contact is defined as a contact which will not add a significant parasitic impedance to the structure on which it is used, and it will not sufficiently change the equilibrium carrier densities within the semiconductor to affect the device characteristics. In other words, an ohmic contact should have a linear and symmetrical current- voltage relationship ; it is characterized by having no potential barrier (hence no asymmetry) and an infinite surface recombination velocity (hence linearity). At an ohmic contact the electrons and holes are at their thermal equilibrium values. In practice, the above ideal ohmic contact can only be approximated. A metal-semiconductor contact is approximately ohmic if the semiconductor is very heavily doped. A direct contact between a metal and a semiconductor, however, does not generally give an ohmic contact, especially when the resistivity of the semiconductor is high. The most common approach is to use metal-« + -w or metal-/? + -p contacts as ohmic contacts. For ohmic contacts on Ge and Si, one can first evaporate Au-Sb alloy (with 0.1 percent Sb) onto w-type semiconductors. These contacts are then alloyed at the corresponding eutectic temperature into the semiconductors under an inert gas (such as argon or nitrogen). For «-type GaAs, one can first evaporate 5000 A indium onto a GaAs surface. This is followed by 5000 A of nickel deposited by the 8 Space-Charge-Limited Diode 417 electroless process. The contact is alloyed into GaAs under a pressure of 10~ 2 torr of forming gas (15 percent H 2 and 85 percent N 2 ) using an alloying cycle of about 30 seconds at 300°C. Similarly one can use Ni-Sn or In-Au combinations for the GaAs ohmic contacts. 8 SPACE-CHARGE-LIMITED DIODE In this section we shall consider a related metal-semiconductor diode in which the impurity concentration of the semiconductor is very low. 38 Figure 34(a) shows 39 the energy band diagram of a space-charge-limited TEMPERATURE (°C). 50 100 300 600 1000 2000 4000 i i i i i i i i i i r i i i r io" 10 200 400 600 1000 2000 TEMPERATURE (°K) (a) 4000 Fig. 33 Vapor pressure versus temperature for solid and liquid elements. (After Honig, Ref. 37.) 418 Metal-Semiconductor Devices TEMPERATURE (°C) 50 100 300 600 1000 2000 4000 200 Fig. 33 (Cont.) 400 600 1000 2000 TEMPERATURE (°K) (b) 4000 (SCL) diode at thermal equilibrium. Figure 34(b) and (c) are for the forward- bias and reverse-bias conditions. This is drawn specifically for the case when electrons are the charge carriers, but a similar diagram can be obtained for holes. The injecting contact (source) is shown as n + + material and the drain contact is shown as an abrupt potential energy discontinuity. When current is carried by both electrons and holes we have J n = qn n n£ Jtnt = Jn T J n (85) 8 Space-Charge-Limited Diode 419 SOURCE ( n ++ ) I DRAIN (METAL) (a) THERMAL EQUILIBRIUM (b) FORWARD BIAS (C) REVERSE BIAS Fig. 34 Energy band diagrams of a space-charge-limited (SCL) diode. (After Buget and Wright, Ref. 39.) where the symbols have their usual meaning and / tot is the total current density. The Poisson equation is given by q(n - p) dx (86) Note the above equation does not contain the impurity concentration which is assumed to be negligibly smaller than n and p. Under the assumptions (1) low current density, (2) short carrier transit time across the / region, and (3) no hole-electron recombination, then the 420 Metal-Semiconductor Devices divergence of both hole and electron current is zero : dJ„ dJ r From Eq. (86) we obtain zul = ™s = o. dx dx (87) (88) Substitution for p in Eq. (86) and integration with the usual boundary conditions that n = oo and $ = at x = gives the results 1 n = - B.Jr -11/2 L2x(i - Ofa + C/ipl F 8 (1 - Q L 3 (89) (90) In this equation V F is the applied drain forward voltage and L is the source to drain spacing. The value of ( can be found by consideration of conditions at the drain contact. At small applied voltages current is small. This justifies regarding the hole density at the drain as being in thermal equilibrium with the drain metal. Thus p D (x = L) = N v exp(—q(f) Bp lkT), and from Eqs. (88) and (89) we have t = . . 4q "° L2 „ ■ (91) 3e s V D + 4qp D U Substitution in Eq. (90) gives the result for double-injection (or two-carrier injection) : T _ 3qPp(Mn + M P )Vf , 9ZsVn *>* J p — T"T T 2L 8L 3 (92) At large applied voltages the hole current across the drain contact will saturate at the value J s given by the Richardson thermionic emission equation. In this case we have from Eqs. (85) and (88) that C = VnJs V p (Jf ~ Js) Substitution in Eq. (90) gives the result 9s sf i„V F 2 J F = ^s + 8L 3 (93) (94) 8 Space-Charge-Limited Diode 421 If p D and J s are sufficiently small, both Eqs. (92) and (94) reduce to the standard Mott-Gurney Law 40 for one-carrier injection: J F = 8L 3 (95) Equations (92), (94), and (95) are illustrated in Fig. 35 where (1) is the ideal Mott-Gurney square law of Eq. (95); (2) is the linear current term of Eq. (92); and (3) is the saturation current term of Eq. (94). The experimental data show the resultant I-V characteristic of an Au-Si SCL diode with resistivity of about 25,000 Q-cm and L ~ 10 /im. It is clear that a variety of /- V character- istics may be expected depending on the relative magnitude of the terms involved. 10 - Si L= 20^.m 4>Bn =0.745 (2) y EXP /(I) / MOTT-GURNEY (3) i l 1 I 2 4 6 8 10 APPLIED FORWARD VOLTAGE (VOLTS) Fig. 35 Theoretical and experimental results for SCL diode. (Ref. 39.) 422 Metal-Semiconductor Devices REFERENCES 1. F. Braun, "Uber die Stromleitung durch Schwefelmetalle," Ann. Physik Chem., 153, 556 (1874). 2. J. C. Bose, U.S. Patent 775,840 (1904). 3. A. H. Wilson, Proc. Roy. Soc, A133, 458 (1931). 4. W. Schottky, Natarwiss., 26, 843 (1938). 5. N. F. Mott, "Note on the Contact Between a Metal and an Insulator or Semicon- ductor," Proc. Camb. Phil. Soc, 34, 568 (1938). 6. H. K. Henisch, Rectifying Semiconductor Contacts, Oxford at the Clarendon Press., Oxford (1957). 7. V. S. Formenko, Handbook of Thermionic Properties, edited by G. V. Samsonov, Plenum Press Data Division, New York (1966). 8. S. M. Sze, C. R. Crowell, and D. Kahng, "Photoelectric Determination of the Image Force Dielectric Constant for Hot Electrons in Schottky Barriers," J. Appl. Phys., 35, 2534 (1964). 9. C. D. Salzberg and G. G. Villa, J. Opt. Soc. Am., 47, 244 (1957). 10. A. M. Cowley and S. M. Sze, "Surface States and Barrier Height of Metal-Semi- conductor Systems," J. Appl. Phys., 36, 3212 (1965). 11. J. Bardeen, "Surface States and Rectification at a Metal Semiconductor Contact," Phys. Rev., 71, 111 (1947). 12. C. A. Mead and W. G. Spitzer, "Fermi-Level Position at Metal-Semiconductor Interfaces," Phys. Rev., 134, A713 (1964). 13. D. Pugh, "Surface States on the < 1 1 1 > Surface of Diamond," Phys. Rev. Letters, 12, 390 (1964). 14. H. A. Bethe, "Theory of the Boundary Layer of Crystal Rectifiers," MIT Radiation Laboratory, Report 43-12 (1942). 15. C. R. Crowell, "The Richardson Constant for Thermionic Emission in Schottky Bar- rier Diodes," Solid State Electron., 8, 395 (1965). 16. C. R. Crowell and S. M. Sze, "Current Transport in Metal-Semiconductor Barriers," Solid State Electron., 9, 1035 (1966). 16a. F. A. Padovani and R. Stratton, "Field and Thermionic-Field Emission in Schottky Barriers," Solid State Electron., 9, 695 (1966). 17. C. R. Crowell and S. M. Sze, " Electron-Phonon Collector Backscattering in Hot Electron Transistors," Solid State Electron., 8, 673 (1965). 18. C. R. Crowell and S. M. Sze, " Electron-Optical-Phonon Scattering in the Emitter and Collector Barriers of Semiconductor-Metal-Semiconductor Structures," Solid State Electron., 8, 979 (1965). 19. C. R. Crowell and S. M. Sze, "Quantum Mechanical Reflection at Metal-Semicon- ductor Barriers," J. Appl. Phys., 37, 2683 (1966). References 423 19a. J. M. Andrews and M. P. Lepselter, " Reverse Current-Voltage Characteristics of Metal-Silicide Schottky Diodes," IEEE Solid State Device Conference, Washington D.C. (Oct. 1968). 20. D. L. Scharfetter, "Minority Carrier Injection and Charge Storage in Epitaxial Schottky Barrier Diodes," Solid State Electron., 8, 299 (1965). 21. C. R. Crowell, J. C. Sarace, and S. M. Sze, "Tungsten-Semiconductor Schottky Barrier Diodes," Trans. Met. Soc. AIME, 233, 478 (1965). 22. C. A. Mead, "Metal-Semiconductor Surface Barriers," Solid State Electron 9 1023 (1966). "' ' 23. N. C. Vanderwal, "A Microwave Schottky-Barrier Varistor Using GaAs for Low Series Resistance," IEEE Int. Elec. Devices Meeting, Washington, D.C (Oct 18-20 1967). 24. J. C. Irvin and N. C. Vanderwal " Schottky-Barrier Devices," a chapter of Microwave Semiconductor Devices and Their Circuit Applications, Ed. H. A. Watson, McGraw- Hill Book Co. (1968). 25. M. P. Lepselter and S. M. Sze, "Silicon Schottky Barrier Diode with Near-Ideal I-V Characteristics," Bell Syst. Tech. J., 47, 195 (1968). 26. A. M. Goodman, "Metal-Semiconductor Barrier Height Measurement by the Diff- erential Capacitance Method— One Carrier System," J. Appl. Phys., 34, 329 (1963). 27. C. R. Crowell, W. G. Spitzer, L. E. Howarth, and E. E. Labate, "Attenuation Length Measurements of Hot Electrons in Metal Films," Phys. Rev., 127, 2006 (1962). 28. R. H. Fowler, Phys. Rev., 38, 45 (1931). 28a. G. H. Parker, T. C. McGill, C. A. Mead, and D. Hoffman, "Electric Field Dependence of GaAs Schottky Barriers," Solid State Electron., 11, 201 (1968). 28b. C. R. Crowell, H. B. Shore, and E. E. Labate, "Surface State and Interface Effect in Schottky Barriers at w-Type Silicon Surface," J. Appl. Phys., 36, 3843 (1965). 29. C. R. Crowell, S. M. Sze, and W. G. Spitzer, "Equality of the Temperature Dependence of the Gold-Silicon Surface Barrier and the Silicon Energy Gap in an rc-Type Si Diode," Appl. Phys. Letters, 4, 91 (1964). 29a. D. Kahng, "Conduction Properties of the An-«-Type-Si Schottky Barrier," Solid State Electron., 6, 281 (1963). 30. W. G. Spitzer and C. A. Mead, "Conduction Band Minima of Ga(As 1 _ x P x ) " Phys Rev., 133, A872 (1964). 31. R. H. Baker, " Maximum Efficiency Switching Circuit," MIT Lincoln Lab., Lexington, Mass., Report TR-1 10 (1956). 32. K. Tada and J. L. R. Laraya, " Reduction of the Storage Time of a Transistor Using a Schottky-Barrier Diode," Proc. IEEE, 55, 2064 (1967). 33. C. A. Mead, "Schottky Barrier Gate Field-Effect Transistor," Proc IEEE 54 307 (1966). ' ' 34. W. W. Hooper and W. I. Lehrer, "An Epitaxial GaAs Field-Effect Transistor " Proc IEEE, 55, 1237 (1967). 35. S. M. Sze, M. P. Lepselter, and R. W. MacDonald, "Metal-Semiconductor IMPATT Diode," Solid State Electron., 11, (1968). 36. For a general reference on vacuum deposition, see L. Holland, Vacuum Deposition of Thin Films, Chapman and Hall Ltd., London (1966). 424 Metal-Semiconductor Devices 37. R. E. Honig, " Vapor Pressure Data for the Solid and Liquid Elements," RCA Review, 23, 567 (1962). 38. For a general review, see M. A. Lampert, Injection Currents in Solids, Academic Press, New York (1965). 39. U. Buget and G. T. Wright, "Space-Charge-Limited Current in Silicon," Solid State Electron., 10, 199 (1967). 40. N. F. Mott and R. W. Gurney, Electronic Processes in Ionic Crystals, Clarendon Press, Oxford (1940). INTRODUCTION IDEAL METAL-INSULATOR- SEMICONDUCTOR DIODE SURFACE STATES, SURFACE CHARGES, AND SPACE CHARGES EFFECTS OF METAL WORK FUNCTION, CRYSTAL ORIENTATION, TEMPERATURE, ILLUMINATION, AND RADIATION ON MIS CHARACTERISTICS SURFACE VARACTOR, AVALANCHE, TUNNELING, AND ELECTROLUMINESCENT MIS DIODES CARRIER TRANSPORT IN INSULATING FILMS 9 Metal-Insulator-Semiconductor Diodes I INTRODUCTION The metal-insulator-semiconductor (MIS) diode is the most useful device in the study of semiconductor surfaces. Since the reliability and stability of all semiconductor devices are intimately related to their surface conditions, an understanding of the surface physics with the help of MIS diodes is of great importance to device operations. In this chapter we shall be mainly concerned with the metal-oxide-silicon (MOS) system. This system has been extensively studied because it is directly related to most of the planar devices and integrated circuits. The MIS structure was first proposed as a voltage variable capacitor in 1959 by Moll 1 and by Pfann and Garrett. 2 Its characteristics were then analyzed by Frankl 3 and Lindner. 4 The MIS diode was first employed in the study of a thermally oxidized silicon surface by Terman 5 and by Lehovec and Slobodskoy. 6 A comprehensive treatment of the theory of the semiconductor surface can be found in Semiconductor Surfaces by Many et al. 7 In this chapter 425 426 Metal-Insulator-Semiconductor Diodes we will first consider the ideal MIS diode, which will serve as a basis for understanding of nonideal MIS diode characteristics. Section 3 presents the nonideal situations caused by surface states, surface charges, and space charges in the insulator. The ion transport as discovered by Snow et al, 8 the conduct- ance method as proposed by Nicollian and Goetzberger, 9 the time constant dispersion, and 1// noise will also be considered in Section 3. Section 4 is concerned with the effects on MIS characteristics due to metal work function, crystal orientation, lattice temperature, illumination, and y-ray radiation. Section 5 considers some of the applications of MIS diodes as electronic and optical devices, and as a tool to study fundamental physical processes. Section 6 presents a brief discussion of the carrier transport and maximum dielectric strength of thin insulating films. 2 IDEAL METAL-INSULATOR-SEMICONDUCTOR (MIS) DIODE The MIS structure is shown in Fig. 1 where d is the thickness of the insulator and V is the applied voltage on the metal field plate. This defines that the voltage, V, is positive when the metal plate is positively biased with respect to the ohmic contact, and V is negative when the metal plate is negatively biased with respect to the ohmic contact. This convention will be used throughout this chapter. The energy band diagram of an ideal MIS structure for V = is shown in Fig. 2, where Figs. 2(a) and 2(b) are for «-type and /?-type semiconductors respectively. An ideal MIS diode is defined as follows: (1) at zero applied bias there is no energy difference between the metal work function m and J V/////////A METAL /- INSULATOR SEMICONDUCTOR Fig. 1 Metal-insulator-semiconductor (MIS) structure. OHMIC CONTACT 2 Ideal Metal-Insulator-Semiconductor (MIS) Diode 427 QX '~| VACUUM LEVEL 1 " q<£. <^B '/ METAL — d INSU- LATOR QX V=0 r E g/z ^ '///////////////A Ev SEMICONDUCTOR (a) IDEAL MIS DIODE (n-TYPE SEMICONDUCTOR) 9Xi ~] V ACUUM L EVEL q0 E METAL INSU- LATOR q X v-0 Eg/z 5 ± q^ c E i E F SEMICONDUCTOR tb) IDEAL MIS DIODE (p-TYPE SEMICONDUCTOR) Fig. 2 Energy band diagrams for ideal MIS structures at V = 0. the semiconductor work function, or the work function difference <f) ms is zero: <t>ms = <l> m - lx + if ~ "M = for "-type 4>n = <t>m ~ [X + Y + ^b) = for p-type (la) (lb) where 4> m is the metal work function, x the semiconductor electron affinity, Xi the insulator electron affinity, E g the band gap, cf> B the potential barrier 428 Metal-Insulator-Semiconductor Diodes between the metal and the insulator, and i^ B the potential difference between the Fermi level E F and the intrinsic Fermi level E t ; in other words, the band is flat (flat-band condition) when there is no applied voltage; (2) the only charges which can exist in the structure under any biasing conditions are those in the semiconductor and those with the equal but opposite sign on the metal surface adjacent to the insulator; and (3) there is no carrier transport through the insulator under dc biasing conditions, or the resistivity of the insulator is infinity. The ideal MIS diode theory to be considered in this section serves as a foundation to understand practical MIS structures and to explore the physics of semiconductor surfaces. When an ideal MIS diode is biased with positive or negative voltages, there are basically three cases which may exist at the semiconductor surface. These cases are illustrated in Fig. 3. Consider the p-type semiconductor first. When p-TYPE LF ^ V#0 ■h V>0 n-TYPE (a) ACCUMULATION -E C 11 F TT 7 / V<0[ (b) DEPLETION ■Ec " E F V>0 . E| E F E» T -fW7. (C) INVERSION ■Ec -E F "El — E V Fig. 3 Energy band diagrams for ideal MIS structures when V# for both p-type and n- type semiconductors. 2 Ideal Metal-Insulator-Semiconductor (MIS) Diode 429 a negative voltage (V < 0) is applied to the metal plate, Fig. 3(a), the top of the valence band bends upward and is closer to the Fermi level. For an ideal MIS diode there is no current flow in the structure [or d(lmref)/dx = 0], so the Fermi level remains constant in the semiconductor. Since the carrier density depends exponentially on the energy difference (E F - E v ), this band bending causes an accumulation of majority carriers (holes) near the semi- conductor surface. This is the case of "accumulation." When a small posi- tive voltage {V> 0) is applied, Fig. 3(b), the bands bend downward, and the majority carriers are depleted. This is the case of " depletion." When a larger positive voltage is applied, Fig. 3(c), the bands bend even more downward such that the intrinsic level E t at the surface crosses over the Fermi level E F . At this point the number of electrons (minority carriers) at the surface is larger than that of the holes, the surface is thus inverted, and this is the case of "inversion." Similar results can be obtained for the w-type semiconductor. The polarity of the voltage, however, should be changed for the «-type semiconductor. (1) Surface Space-Charge Region We shall derive the relations between the surface potential, space charge, and electric field in this subsection. These relations will then be used to derive the capacitance-voltage characteristics of the ideal MIS structure in the next subsection. Figure 4 shows a more detailed band diagram at the surface of a /?-type semiconductor. The potential \p is defined as zero in the bulk of the semi- conductor, and is measured with respect to the intrinsic Fermi level E x as shown. At the semiconductor surface \\i = \j/ s , and \f/ s is called the surface potential. The electron and hole concentrations as a function of \j/ are given by the following relations : n p = n po Qxp(qil//kT) = n po exp(£i/0 (2) P P = P P o exp(-qij//kT) = p po exp( - M) (3) where ^ is positive when the band is bent downward (as shown in Fig. 4), n po &ndp po are the equilibrium densities of electrons and holes respectively in the bulk of the semiconductor, and £ = q/kT. At the surface the densities are n s = n po exp(j3t/g (4) p s =p po exp(-piJ/ s ). It is obvious from the previous discussions and with the help of Eq. (4) that the following regions of surface potential can be distinguished : 430 Metal-Insulator-Semiconductor Diodes SEMICONDUCTOR SURFACE (v// >0) / INSULATOR W£- / ^t R SEMICONDUCTOR (a) \p < ACCUMULATION lb) v// > \j/ > DEPLETION (C) V > ^ INVERSION (AS SHOWN) Fig. 4 Energy band diagram at the surface of a p-type semiconductor. The potential ift is defined as zero in the bulk and is measured with respect to the intrinsic Fermi level E t . i/r 5 is the surface potential and is positive as shown. if/ s < Accumulation of holes (bands bend upward) \]/ s = Flat-band condition •Ab > *As > Depletion of holes (bands bend downward) il/ s = \j/ B Midgap with n s = p s = n { (intrinsic concentration) xl/ s > \j/ B Inversion (electron enhancement, bands bend downward). The potential if as a function of distance can be obtained by using the one-dimensional Poisson equation d 2 xj/ dx 2 (5) where e s is the permittivity of the semiconductor and p(x) is the total space- charge density given by p(x) = q(N D + -N A +p p - n p ) (6) 2 Ideal Metal-Insulator-Semiconductor (MIS) Diode 431 where N D + and N A ~ are the densities of the ionized donors and acceptors respectively. Now, in the bulk of the semiconductor, far from the surface, charge neutrality must exist. Therefore p(x) = and \J/ = 0, and we have N D + -N A - =n po -p po . (7) In general for any value of ij/, we have from Eqs. (2) and (3) P P ~ n p= Ppo exp( - W - n po expW). (8) The resultant Poisson's equation to be solved is therefore dx : = ~ - IPpoie-™ - 1) - n po (e^ - 1)]. (9) Integration of Eq. (9) from the bulk toward the surface 10 rO'O-K^— >-- (e w - 1)] # (10) gives the relation between the electric field ($ = — dij/jdx) and the potential \j/ : wr\ 2 / qPpo p : )( q 1 \ 2e. We shall introduce the following abbreviations : (e~ fi * + fit - 1) + -^ (e** - ^ - 1) L D ^ and / 2/cTe s ;V4 2 2e. 4/V^ (11) (12) F\M Ppo/ (e-M + fill, - l) + -El ( e W -ffl-i) Ppo 1/2 > (13) where L D is called the extrinsic Debye length for holes. Thus the electric field becomes d\jj 2kT / n D0 \ dx qL D \ p J (14) with positive sign for \]/ > and negative sign for ^ < 0. To determine the electric field at the surface, we let \j/ — ^ s : = + 2kT ~q~L D \ Ppo! (15) Similarly, by Gauss' law the space charge per unit area required to produce this field is qL D \ p p j 432 Metal-Insulator-Semiconductor Diodes To determine the change in hole density, A/?, and electron density, An, per unit area when the \ty at the surface is shifted from zero to a final value \j/ s , it is necessary to evaluate the following expressions: 1 ,.11 .00 Ap = p po I (e->* - 1) dx qp po L D c ° (g-"-l) if _ = ~^r~ L ~i — n~T # (cm } ' (17) .00 An = n po (e?+ - 1) dx qn po L D f o (e"-l) Jf _ \ Ppo/ A typical variation of the space-charge density Q s as a function of the surface potential \j/ s is shown in Fig. 5 for a /?-type silicon with N A = 4 x 10 15 cm -3 at room temperature. We note that for negative \j/ s , Q s is positive and corresponds to the accumulation region. The function Fis dominated by the first term in Eq. (13), i.e., Q s ~ exp(q\iJ/ s \l2kT). For \jj s = 0, we have the flat-band condition and Q s — 0. For \j/ B > ^ s > 0, Q s is negative and we have the depletion case. The function F is now dominated by the second term, i.e., Q s ~y/\l/ s . For \j/ s > ij/ B , we have the inversion case with the function F dominated by the fourth term, i.e., Q s ~ — Qxp(q\J/ s /2kT). We also note that the strong inversion begins at a surface potential, Mnv)*2^ — ln(^\ (19) The differential capacitance of the semiconductor space-charge region is given by c =?& = 1l Ppo FiPt, ' Ppo) farad/cm 2 . (20) At flat-band condition, i.e., i]/ s = 0, C D can be obtained by expanding the exponential terms into series, and we obtain (^(flat-band) = \/2sJL D farad/cm 2 . (21) 2 Ideal Metal-Insulator-Semiconductor (MIS) Diode 433 10- 4 p-TYPE Si (300°K Fig. 5 Variation of space-charge density in the semiconductor as a function of the surface potential ifj s for a p-type silicon with N 4 = 4x 10 15 cm -3 at room temperature. ip B is the potential difference between the Fermi level and the intrinsic level of the bulk. (After Garrett and Brattain, Ref. 10.) (2) Ideal MIS Curves Figure 6(a) shows the band diagram of an ideal MIS structure with the band bending of the semiconductor identical to that shown in Fig. 4. The charge distribution is shown in Fig. 6(b). For charge neutrality of the system it is required that Q M = Q n + qN A w=Q s (22) where Q M is charges per unit area on the metal, Q n is the electrons per unit area in the inversion region, gN A W is the ionized acceptors per unit area in the space-charge region with space-charge width W, and Q s is the total charges per unit area in the semiconductor. The electric field and the potential as obtained by first and second integrations of Poisson's equation are shown in Fig. 6(c) and 6(d) respectively. 434 Metal-Insulator-Semiconductor Diodes METAL INSULATOR SEMICONDUCTOR V>0 W3 q*, b _ il^J Ej ^[— { If "l NEUTRAL fc V ,i REGION i ^-DEPLETION REGION ^INVERSION REGION i k/>(X> Qm • w -d V///A-^ ^— On ♦ £(X) Kl/< -d o w ♦ f IX) Fig. 6 (a) Band diagram of an ideal MIS structure. (b) Charge distribution under inversion condition. (c) Electric field distribution. (d) Potential distribution. (a) BAND DIAGRAM (b) CHARGE DISTRIBUTION (IDEAL MIS) (c) ELECTRIC FIELD (d) POTENTIAL It is clear that in the absence of any work-function differences, the applied voltage will partly appear across the insulator and partly across the silicon. Thus V=V i + i, s (23) where V t is the potential across the insulator and is given, see Fig. 6(c), by Q s d V, m> (24) 2 Ideal Metal-lnsulator-Semiconductor (MIS) Diode 435 The total capacitance, C, of the system is a series combination of the insulator capacitance, C £ ( = e f /df), and the silicon space-charge capacitance C D : C = r^r ^rad/cm 2 . (25) For a given insulator thickness d, the value of C t is constant and corresponds to the maximum capacitance of the system. The silicon capacitance C D as given by Eq. (20) depends on the voltage. Combination of Eqs. (20), (23), (24), and (25) gives the complete description of the ideal MIS curve as shown in Fig. 7 curve (a). Of particular interest is the total capacitance at flat-band condition, i.e., i// s = 0. From Eqs. (21) and (25), we obtain C F B (<A S = 0) = Jt = Si (26) /c7X '+T2& ' + @ p PO q 2 where s t and e s are the permittivities of the insulator and the semiconductor respectively, and L D is the extrinsic Debye length given by Eq. (12). In describing this curve we begin at the left side (negative voltage) where we have an accumulation of holes and therefore a high differential capacitance of the semiconductor. As a result the total capacitance is close to the insulator capacitance. As the negative voltage is reduced sufficiently, a depletion region which acts as a dielectric in series with the insulator is formed near the semiconductor surface, and the total capacitance decreases. The capaci- tance goes through a minimum and then increases again as the inversion layer of electrons forms at the surface. The minimum capacitance and the corres- ponding minimum voltage are designated by C min and V min respectively (shown in Fig. 7). It should be pointed out that the increase of the capacitance is dependent on the ability of the electron concentration to follow the applied ac signal. This is only possible at low frequencies where the recombination- generation rates of minority carriers (in our example, electrons) can keep up with the small signal variation and lead to charge exchange with the inversion layer in step with the measurement signal. Experimentally it is found that for the Metal-Si0 2 -Si system the frequency is between 5 to 100 Hz. 12,13 As a consequence, MIS curves measured at higher frequencies do not show the increase of capacitance on the right side, Fig. 7(b). Figure 7(c) shows the capacitance curve under nonequilibrium conditions (pulse condition) which will be discussed later in connection with the avalanche effect in MIS diode. 47 ' 48 The high-frequency curve can be obtained using an analogous approach as in a one-sided abrupt p-n junction. 14 When the semiconductor surface is depleted, the ionized acceptors in the depletion region are given by ( — qN A W) where W is the depletion width. Integration of Poisson's equation yields the 436 Metal-Insulator-Semiconductor Diodes 1.0 0.8 o 0.6 o /" C i ^C| C FB (FLAT BAND — - CAPACITANCE) c min_ > _ c min~ , /Mo) LOW \ / FREQUENCY \ / (b)HIGH \J \ FREQUENCY 0.4 N~^^-\ 0.2 ' \A NONEQUILIBRIUM V MIN \ SEMICONDUCTOR /* v ^ BREAKDOWN ' 1 i V (VOLTS) Fig. 7 MIS capacitance-voltage curves. (a) Low frequency. (b) High frequency. (c) Nonequilibrium case. (After Grove et al., Ref. 13.) potential distribution in the depletion region : where the surface potential \J/ S is given by qN A W 2 *s = 2e. (27) (27a) When the applied voltage increases, \j/ s increases, so does W. Eventually strong inversion will occur. As shown in Fig. 5, strong inversion begins at <A s (inv) c* 2</> B . Once strong inversion occurs, the depletion-layer width reaches a maximum. When the bands are bent down far enough that \]/ s = 2iJ/ B , the semiconductor is effectively shielded by further penetration of electric field by the inversion layer and even a very small increase in band bending (corresponding to a very small increase in the depletion-layer width) will result in a very large increase in the charge density within the inversion layer. Accordingly, the maximum width, W m , of the surface depletion region can be obtained from Eqs. (19) and (27a) W /2e s (A s (inv) 4e s kT\n(N A /nd qN A q 2 N A (28) 2 Ideal Metal-lnsulator-Semiconductor (MIS) Diode 437 1.0: E 0.01 : T-300°K : I I 1 i i • i i i 1 1 i i i i > i 1 1 1 1 ..1 1 1 Ml 10' 10' 10' 10' N B (cm -3 ) Fig. 8 Maximum depletion layer width versus impurity concentration of the semicon- ductors Ge, Si, and GaAs under heavy inversion condition. The relationship between W m and the impurity concentration is shown in Fig. 8 for Ge, Si, and GaAs, where N B is equal to N A for /?-type and N D for H-type semiconductors. Another quantity of interest is the so-called turn-on voltage, V T , at which strong inversion occurs. From Eqs. (19) and (23), we obtain ^(strong inversion)— — + 2^ B . (29) And the corresponding total capacitance is given by C ■ = d + & (30) W m The high-frequency capacitance curve with its approximated segments (dotted curves) is shown in Fig. 9. Also shown in the insert are the measured MIS curves at different frequencies. 13 We note that the onset of the low- frequency curves occurs at/ <; 100 Hz. 438 Metal-Insulator-Semiconductor Diodes V ( VOLTS ) Fig. 9 High-frequency MIS capacitance-voltage curve showing its approximated segments (dotted lines). The inset shows the frequency effect. (After Grove et a!., Ref. 13.) The ideal MIS curves of the metal-Si0 2 -Si system have been computed for various oxide thicknesses and semiconductor doping densities. 15 Figure 10 shows some typical examples for p-type silicon. We note that, as the oxide film becomes thinner, larger variation of the capacitance is obtained. Figure 1 1 shows the dependence of i{/ s on applied voltage for the same systems as in Fig. 10. Figures 12, 13, and 14 show respectively the normalized flat-band capacitance (C FB /CV), the normalized minimum capacitances (C min /C,) and (C^ in /C t ), and the minimum voltage (K min ) versus oxide thickness with silicon doping concentration as the parameter. The conversion to n-type silicon is achieved simply by changing the sign of the voltage axes, the con- version to other insulators requires scaling of the oxide thickness with the 2 Ideal Metal-lnsulator-Semiconductor (MIS) Diode 439 !.00 0.90 0.80 0.70 0.60 0.50 0.40 0.30 0.20 0.10 : -" ^JSOOA - - I400A^ - I000A ^ - 600A^ ~ - _/ ""- - *< - N A = 5xl a cm" 3 - Si-Si0 2 > i i ' i ' -2.0 -1.0 1.0 2.0 (VOLTS) 4.0 Fig. 10 Ideal MIS capacitance-voltage curve. Solid lines for low frequencies. Dotted lines for high frequencies. (After Goetzberger, Ref. 15.) 0.80 0.70 0.60 0.50 - 0.40 b 5 0.30 * 0.20 0.I0 -0. 10 -0.20 - - 600A- o - o /|800A - - - - - N A =5xl0 15 cm" 3 1 Si -Si0 2 1 1 1 i i 1.0 2.0 V (VOLTS) 4.0 Fig. 11 Surface potential versus applied voltage for ideal MIS diodes. (Ref. 15.) 440 Metal-lnsulator-Semiconductor Diodes (M o X (n X. 1 X. <S) ~o ^ X 4' X *, X. * X. ^X ^>X X \ *c \ p 4 ■^X \ \ <f x Q. ^ £ O ^ 4J !0/ 9J. 2 Ideal Metal-Insulator-Semiconductor (MIS) Diode 441 ft \\ } \ V N o in i V) *; \ r ■/■ \ \ X ^\ * '9, <: ^s cX ^x' •E o < c > o » 3 t - <fl u t * f r 5 4 — n a ) 1- U 3 «■ 1 ^ r i» 4 m £ 8i o t- 5 a: ! o/' «J c a. O ** u •O E c o 3 u F X u c c E 3 ■o a* N 13 * E O u O L. 7 ■o c 3 n l/l ai -n M O ik ■o 442 Metal-Insulator-Semiconductor Diodes "a .01 1 .a ^rt\' 3 v *\0 V "^ -*^J> J^V 1 ^ '^Zs^ *> 5^ /4 /7< ' s \S 7- 7 4/ /<y\ X 100 1000 d(A) 10,000 (b) Fig. 13 Normalized minimum capacitance versus oxide thickness for ideal MIS diodes under high-frequency condition. (Ref. 15.) ratio of the permittivities of Si0 2 and other insulator a ; (Si0 2 ) d n = d 1 s t (insulator) (31) where d c is the thickness to be used in these curves, d t is the actual thickness of the insulator, Sj(insulator) is the permittivity of the new insulator, and ^(SiC^) = 3.4 x 10 -13 //cm. For other semiconductors, the MIS curves can 2 Ideal Metal-lnsulator-Semiconductor (MIS) Diode 443 £ iZ 444 Metal-Insulator-Semiconductor Diodes be constructed similarly to that as shown in Fig. 9 by using Eqs. (26), (27), (28), .and (29). The ideal MIS curves as shown in Fig. 10 through 14 will be used in subse- quent sections to compare with the experimental results and to understand the practical MIS systems. 3 SURFACE STATES, SURFACE CHARGES, AND SPACE CHARGES In a practical MIS diode there exist many other states and charges which will, in one way or another, affect the ideal MIS characteristic. The basic classifications of these states and charges are shown in Fig. 15. There are (1) surface states or interface states which are defined as energy levels within the forbidden band gap at the insulator-semiconductor interface which can exchange charges with the semiconductor in a short time, (2) fixed surface SEMICONDUCTOR -- SURFACE STATES (INTERFACE STATES) FIXED SURFACE CHARGES (No*) — MOBILE IONS + — IONIZED TRAPS Fig. 15 Basic classification of states and charges in a nonideal MIS diode. 3 Surface States, Surface Charges, and Space Charges 445 charges which are located near or at the semiconductor surface ( ~ 200 A) and are immobile under applied electric fields, (3) mobile ions such as sodium which are mobile within the insulator under bias-temperature aging conditions, and (4) ionized traps which can be created, for example, by x-ray radiation. (1) Surface States The surface states have been theoretically studied by Tamm, 16 Shockley, 17 and others 18 ' 19 and have been shown to exist within the forbidden gap due to the interruption of the periodic lattice structures at the surface of a crystal. The existence of surface states was first found experimentally by Shockley and Pearson 20 in their surface conductance measurement. Measurement on clean surfaces in an ultrahigh vacuum system have confirmed that the density of surface states is very high — of the order of the density of surface atoms. 21 Historically, surface states have been classified into fast and slow states. The fast states exchange charge with the conduction or valence band rapidly, and are assumed to lie close to the interface between the semiconductor and the insulator. Slow states, on the other hand, exist at the interface of the air and insulator and require a longer time for charge exchange. For the present MIS diodes with thick insulating layers, the only states that we are concerned with are the surface states or interface states at the insulator-semiconductor interface. And these states are not necessarily fast surface states either, since at low temperatures, the time constant of these states is very long. 9,22 A surface state is considered as a donor state if it can be neutral or it can become positive by donating (giving up) an electron. For an acceptor surface state, it can be neutral or it can become negative by accepting an electron. The distribution functions for the surface states are similar to those for the bulk impurity levels as discussed in Chapter 2, Section (4) : F SD (E t ) = 1 1 (32a) . , 1 (E t -E F \ (E F -E t \ for donor surface states ; and FM) " , i )e,-e,\ (32b) for acceptor surface states where E t is the energy of the surface states and g is the ground state degeneracy which is 2 for donor and 4 for acceptor. When a voltage is applied, the surface levels will move up or down with the valence and conductance bands while the Fermi level remains fixed. 446 Metal-Insulator-Semiconductor Dioces A change of charge in the surface state occurs when it crosses the Fermi level. This change of charge will contribute to the MIS capacitance and alter the ideal MIS curve. The basic equivalent circuit 23 incorporating the surface states effect is shown in Fig. 16(a). In the figure, C { and C D are the insulator capacitance and the semiconductor depletion-region capacitance respectively and are identical to those shown in the insert of Fig. 9. C s and R s are the capacitance and resistance associated with the surface states and are functions of the surface potential. The product C S R S is defined as the surface state lifetime which determines the frequency behavior of the surface states. The parallel branch of the equivalent circuit in Fig. 16(a) can be converted into a frequency-dependent capacitance C p in parallel with a frequency-dependent conductance G p as shown in Fig. 16(b) where ^p ~ i^d + C x 1 + C0 2 T 2 (33) b X 1 <G in +ja,C in > c o z > — 1 > 1 1 o r = C<;R C (a) 1 X Co OJ Z T :b) Fig. 16 Equivalent circuit including surface state effect where C s and R s are associated with surface state densities. (After Nicollian and Goetzberger, Ref. 23.) 3 Surface States, Surface Charges, and Space Charges 447 and G p C s cox co 1 + co 2 r 2 (34) with t = C S R S . And the input admittance, Y in , is given by Y in = G in +j(oC in (35) Gin co 2 C s xC i 2 (36a) ~~ (Q +C D + C s ) 2 + co 2 t 2 (Q + C D ) 2 in c t + c D + c s r (C, + C D + C s ) 2 + coWC^C, + C D )1 [ D + s (Q + C D + C s ) 2 + co V(Q + C D ) 2 J . (36b) (2) Capacitance Method To evaluate the surface states density one can either use the capacitance measurement or the conductance measurement since, in Eqs. (36a) and (36b), both the input conductance and the input capacitance contain similar information about the surface states. It will be shown that the conductance technique can give the most accurate results especially for MIS diodes with relatively low surface-state densities (~10 10 states/cm 2 /eV). The evaluation of surface-state density using capacitance measurement can be achieved, for example, by the differentiation procedure, the integration procedure, or the temperature procedure. (A) Differentiation Procedure. This method has been used first by Terman. 5 The capacitance is first measured at a high frequency (cot > 1) such that Eq. (36b) reduces to Eq. (25) which is free of capacitance due to the surface states. This yields the high-frequency curve as shown in Fig. 17 (dashed lines) for both «-type and /?-type semiconductors. The influences of the surface states on the voltage, however, cause a shift of the ideal MIS curve along the voltage axis. This is because, when surface states are present, the electric field in the oxide is higher than the field in the semiconductor surface, and more charges on the metal are necessary to create a given surface field in the semiconductor. Comparison of Fig. 17 with the ideal MIS curves gives a curve of A V versus V where AV is the voltage shift. The total charge in the surface states (Q ss ) at a given surface potential is then given by ss = C ; (AK) coul/cm 2 . (37) The surface state density per unit energy (JV SS ) is then obtained by graphical differentiation : q \#5. N ss = - -f^ states/cm 2 /eV. (38) 448 Metal-lnsulator-Semiconductor Diodes SMEAR-OUT DUE TO SURFACE STATES (q) p- TYPE SEMICONDUCTOR , ,c LOW frequency/ / L SMEAR- OUT / DUE TO SURFACE / STATES / </ , *•* ,/HIGH FREQUENCY (b) D -TYPE SEMICONDUCTOR Fig. 17 High-frequency and low-frequency C-V curves for p-type and n-type semiconductor samples. Measurements at various lower frequencies (Fig. 17, solid lines) can be used to determine the time constants (t) of surface states. The above differentiation method is useful for MIS diodes with large surface state density. However, the facts that only the integral of N ss is measured and there is uncertainty about the magnitude of the semiconductor depletion-layer capacitance make this method unreliable. 24 (B) Integration Procedure. This method proposed by Berglund 25 makes it possible to determine the semiconductor surface potential as a function of the applied voltage directly from low-frequency differential capacitance measurement, and no graphical differentiation is required to determine N ss . When space-charge effects in the insulator can be neglected, 3 Surface States, Surface Charges, and Space Charges 449 from Eqs. (23) and (25) and the fact dQ = CidV t = CdV, we obtain \dVj Q and dV t C Integration of Eq. (39a) from V l to V 2 yields dV. (39a) (39b) (40) Equation (40) indicates that the surface potential at any applied voltage can be determined by integrating a curve of (1 - C/Q. It should be noted that Eq. (40) is valid only when the surface states are in equilibrium at all times during the measurement of C(V); that is, the measurement frequency must be low enough that all surface states can follow both the dc bias and the ac signal. Another relationship can be obtained from the relation of charge neutrality in the MIS system. Referring to Fig. 6(b), in addition to the charge in the semiconductor (Q s ) we now have N ss (qij/ S ) = JV s y#,) + Nf A (qij/ s ) where Ng D and Nf A are respectively the donor and acceptor surface state densities. The charge neutrality requirement gives d Jr> NLF SD (E t )-Ns A F SA (E t ) dE + Q s Differentiation of Eq. (41) with respect to )j/ a gives dV t d dQ s ] (41) (42) From Eqs. (39b) and (40), a curve of dxf/JdVi versus i]/ s can be obtained directly using low-frequency capacitance measurement of an MIS diode. If the doping density of the semiconductor and the temperature are known, this curve can be compared to that given by Eq. (42) to determine N ss . This method does not require graphical differentiation and the errors introduced by uncertainties in the semiconductor doping are also reduced. (C) Temperature Procedure. This method, as proposed by Gray and Brown, 26 can separate the effects of the space-charge in the insulator and the surface states on the surface potential \jj s . Figure 18(a) is a schematic representation of how the C(V) curves shift with decreasing temperature. For /?-type samples (as shown), it requires larger and larger negative voltages on the metal electrode to reach the flat-band condition as the temperature 450 Metal-Insulator-Semiconductor Diodes T 2 <T, y. V -v * — ° — »> +v (a) MIS CAPACITANCE ^ METAL OXIDE SILICON T =T, METAL OXIDE SILICON T = T, < T, (b) SIMPLIFIED BAND STRUCTURE Fig. 18 (a) Schematic representation of the shift of the MIS C-V curves with temperature. (b) Change of Fermi level due to temperature. (After Gray and Brown, Ref. 26.) decreases from T t to T 2 , whereas for «-type samples, the flatband voltage increases in the positive direction as T decreases. (Note: For ideal MIS diodes the flat-band voltages are always at zero bias independent of temperature.) The change in Fermi level in the semiconductor due to temperature is shown schematically in Fig. 18(b). At 7\ the Fermi level is assumed to be above the surface states which are filled with electrons and are neutral. When the tem- perature is decreased to T 2 , the Fermi level moves closer to the valence band, and some of the surface states lose electrons and become positively charged. In this instance the surface states control the surface potential, and it requires larger negative voltage on the metal electrode to deplete the surface states of 3 Surface States, Surface Charges, and Space Charges 451 their electrons in order to reach the flat-band condition. This group of states near the valence band edge (as shown) therefore are donors. A similar explanation can be given for the results on «-type samples where the surface states are acceptors (negatively charged when filled with electrons). The increment in flat-band voltage as the temperature is changed gives the change in surface-state charge directly, since there is no band bending for this condi- tion, and the surface potential i^ s is equal to the bulk Fermi level which is calculable. In addition this method makes the results independent of the oxide space charge since it exerts a constant effect on the surface charge for all temperatures. The experimental procedure consists of (1) varying the temperature while (2) maintaining the flat-band condition by observing the changes in capacitance and continuously adjusting the bias, (3) recording flat-band voltage versus temperature, and (4) converting these data to surface charge Q ss versus surface potential, \j/ s = (E F — E v )/q. The surface-state density is given by N =--=£ The experimental results for the Si-Si0 2 system are shown in Fig. 19. We note the peaks of N ss near the band edges, and the dependence of N ss on the silicon surface orientation. The peaks will be discussed in Section 3(4), and the orientation dependence will be considered in the next section. It should be pointed out that in the above method, it is assumed that (1) the ac frequency is high enough that Q ss does not contribute appreciably to the capacitance, (2) oxide-space charge and electron affinity differences are temperature- independent, and (3) N ss is relatively constant over a small energy range in the forbidden gaps. 27 (3) Conductance Method A detailed and comprehensive discussion of the conductance method is given by Nicollian and Goetzberger. 9 In the capacitance measurement, the difficulty arises from the fact that the surface-state capacitance must be extracted from the measured capacitance which consists of oxide capacitance, depletion capacitance, and surface-state capacitance. Since, as mentioned previously, both the capacitance and conductance as functions of voltage and frequency contain identical information about surface states, greater inaccuracies arise in extracting this information from the measured capaci- tance. This difficulty does not apply to the measured conductance (which is measured simultaneously in a standard capacitance bridge) because it is directly related to the surface states. Thus conductance measurements yield more accurate and reliable results, particularly when N ss is low as in the thermally oxidized Si0 2 -Si system. This 452 Metal-lnsulator-Semiconductor Diodes E„-*0 0.10 0.15 0.20 0.20 (III) I n-cm SILICON OXIDE GROWN IN 2 WITH 80 ppm H 2 AT I000°C 12 3 4 5 6 7 DENSITY OF SURFACE STATES, M„(xl0 13 cm^eV"! ) Fig. 19 Measured surface-state densities for the Si-Si0 2 system for three crystal orientations. (Ref. 26.) is illustrated in Fig. 20 which shows the measured capacitance and measured conductance at 5 kHz and 100 kHz. The largest capacitance spread is only 14 percent while the magnitude of the conductance peak increases by over one order of magnitude in this frequency range. The principle of the MIS conductance technique is easily illustrated by the simplified equivalent circuit shown previously in Fig. 16. The admittance of the MIS diode is measured by a bridge across the diode terminals. The insu- lator capacitance is measured in the region of strong accumulation. The admittance of the circuit is then converted into an impedance. The reactance of the insulator capacitance is subtracted from this impedance and the resulting impedance converted back into an admittance. This leaves C D in parallel with the series R S C S network of the surface states. The capacitance and equivalent parallel conductance divided by co are given by Eqs. (33) and 3 Surface States, Surface Charges, and Space Charges 453 Fig. 20 Comparison of MIS capacitance measurement and conductance measurement at two frequencies. (After Nicollian and Goetzberger, Ref. 9.) (34). Equation (34), G p /co = C s cor/(l + coV), does not contain C D and depends only on the surface-state branch of the equivalent circuit. At a given bias, G p /co can be measured as a function of frequency. A plot of G p /co versus cot will go through a maximum when cot = 1 . This gives t directly. The value of G p loj at the maximum is CJ2. Thus, equivalent parallel conductance corrected for C t gives C s and t ( = R s C s ) directly from the measured conduc- tance. Once C s is known, the surface-state density is obtained by using the relation JV SS = CJqA where A is the metal plate area. A typical result of N ss in a Si-Si0 2 system is shown 33 in Fig. 21. This is very similar to those shown in Fig. 19. The variation of the time constant t versus the surface potential is shown in Fig. 22 for MIS diodes with steam-grown oxides on <111> silicon 454 Metal-Insulator-Semiconductor Diodes > 9> Si - Si0 2 X E 12 o ~ 2 10 X - CO U A 1- 8 < - uj 6 a: 3 u> 4 u. t 2 S / 1 , , E ',\ 1 1 1 1 1 X 0.1 0.2 0.3 0.4 0.5 0.6 0.7 ENERGY (eV) 0.8 0.9 1.0 I.I Fig. 21 Surface-state density of a Si-Si0 2 . Near the band edges the temperature method is used. At the midgap the conductance method is used. (Ref. 9.) substrates where \j/ B is the potential difference between intrinsic level and the Fermi level, and ij/ s is the average surface potential to be discussed later. It is seen that these curves can be fitted by the following expressions and are similar to those for the generation-recombination processes as discussed in Chapter 2: 1 T = va p n t exp 1 V<r n ni exp kT 'qWb ~ <?J kT for p-type for n-type (43) where a p and <r„ are the capture cross sections of holes and electrons respec- tively, and v is the average thermal velocity. The above results indicate that the capture cross section is independent of energy. The capture cross sections obtained 9 from Fig. 22 are a p = 2.2 x 10" 16 cm 2 and a n = 5.9 x 10" 16 cm 2 where the values of v = 10 7 cm/sec and n { = 1.6 x 10 10 cm -3 have been used. As illustrated in Figs. 19 and 21, the surface states in the Si-Si0 2 system are comprised of many levels so closely spaced in energy that they cannot be distinguished as separate levels. They actually appear as a continuum over 3 Surface States, Surface Charges, and Space Charges 455 io-i 10" ~ io -3 <t IO -4 UPPER HALF OF BANDGAP N TYPE IO -6 10" MIDGAP J I i I I LOWER HALF OF BANDGAP P TYPE T=300°K J 1 1 I I L -8 q < ^s% )/k7 Fig. 22 Variation of time constant versus surface potentials. (Ref. 9.) the band gap of the semiconductor. The equivalent circuit shown in Fig. 16, which is for an MIS diode with a single-level time constant, should therefore be modified. In addition to the effect due to the surface-state continuum, we must consider the statistical fluctuation of surface potential due to surface charges which include the fixed surface charges and the charged surface states, since from Eq. (43), a small fluctuation in ip s will cause large fluctuation in t. If we assume the surface charges are randomly distributed in the plane of the interface, the electric field at the semiconductor surface will fluctuate over the plane of the interface. This is shown schematically in Fig. 23. The expres- 456 Metal-lnsulator-Semiconductor Diodes sion of GJco and C p due to time-constant dispersion resulting from the surface-state continuum and the statistical (Poisson) distribution of surface charges is given by 9 ^ = \ qN ss l2n{a s 2 + 0]" 1/2 fj^~ z ~ 301n(l + e ^(^) < 44 ) C p = C D ($ 5 ) + qN ss l2n(a s 2 + a B 2 )y l/2 J^xpC-z - j^an" V)rf(f|j (45) where qW >s kT(WC { + a q 2 (N A W 3 ) 1/2 a ) \ A J 2kT[WC t + ej co q(ij/ s - \J/ B ) y = In + — va p n i ki 2 = q 2 ^ s - <A s ) 2 /[2/c 2 T 2 ((t s 2 + a B 2 )-] where N A is the mean ionized acceptor density, Q the mean density of surface charges, \j/ s the mean surface potential, W the depletion-layer width at the potential \}/ s , and A c a characteristic area which is proportional to the square of W. Figure 24 shows plots of GJco versus In/ for a Si-Si0 2 MIS diode biased in the depletion region (broad curve) and in the weak inversion region (narrow curve). The circles are the experimental results, and the solid broad curve is the theoretical calculation based on Eq. (44). The excellent agreement indicates the importance of the statistical model. For the case of weak inver- sion, however, one requires only a single time constant to fit the experimental results. The above results can be explained with the help of the modified equiva- lent circuits shown in Fig. 25. Figure 25(a) shows the time-constant dispersion caused primarily by statistical fluctuation of surface potential. Each sub- network consisting of C s and R s in series represents a time constant of the continuum of surface states in a characteristic area A c . This circuit corres- ponds to the case of depletion-accumulation. Figure 25(b) is for the case of the midgap region where q\J/ s = q\j/ B ± a few kT. R ns and R ps represent the capture resistances for the electrons and holes respectively. We now have two resistances for each subnetwork; when the surface potential is equal to 3 Surface States, Surface Charges, and Space Charges 457 RANDOMLY DISTRIBUTED CHARGES SURFACE FIELD LINES — W Q Q6*P V 1 ^-METAL FIELD PLATE fflffffff) (+)$) mfflm 4 t Ttt ♦ V Ht T Si 0, DEPLETION LAYER NEUTRAL SILICON P-TYPE Fig. 23 Randomly distributed surface charge at the semiconductor-insulator interface causes time-constant dispersion. (Ref. 9.) Fig. 24 G„/w versus frequency for a Si-Si0 2 MIS diode biased in the depletion region (broad curve) and in the weak inversion region (narrow curve). Circles are experimental results. Lines are the theoretical calculations. (Ref. 9.) 458 Metal-Insulator-Semiconductor Diodes -L-M (a) DEPLETION ACCUMULATION ~ L (b) MIDGAP 1, : r s-Ls(r- s )-'J 1c X t- <R gs S^gD (c) WEAK INVERSION (d) HEAVY INVERSION Fig. 25 Modified equivalent circuits for (a) depletion-accumulation region, (b) midgap region, (c) weak inversion region, and (d) heavy inversion region. (After Nicollian and Goetzberger, Ref. 9, and Hoftsein and Warfield, Ref. 12.) or greater than \J/ B , the minority carrier density at the semiconductor surface will be equal to or greater than the magnitude of the majority carrier density at the surface. The minority carrier density can thus no longer be ignored as in the depletion case, Fig. 25(a). Figure 25(c) represents weak inversion (2i^ B > rj/ s > \J/ B ) ; whereas Fig. 25(b) is simplified by the fast response (small R ns ) of minority carriers such that all i?„ s 's are shorted together, the equivalent surface-state capacitance is given by the sum of each individual C s , and the resistance by the sum of the capture resistances for the majority carriers. Therefore, in weak inversions good agreement is obtained between the experi- mental result and the single time constant theory. Figure 25(d) shows the 3 Surface States, Surface Charges, and Space Charges 459 circuit for heavy inversion 12 ({// s > 2i/f B ) where C t and C D are the insulator capacitance and the depletion capacitance respectively; R d is the resistance associated with the diffusion current of the minority carriers from the bulk to the edge of the depletion region and through the depletion region to the surface ; R gs is the resistance associated with the current flow of holes between the valence band and the surface states, with the current flow of electrons between the conductance band and the surface states, and with the flow of the majority carriers from the bulk to the surface; and R gD is the resistance associated with the finite generation and recombination within the depletion layer which is found to be the dominant factor in controlling the frequency response of the inversion layer. The surface state capacitance C s can be assumed to be essentially zero (C s -4 C D ) under heavy inversion condition. It is clear from Fig. 25(d) that, in the heavy inversion region, the surface states have only minor effect on the MIS characteristics. The conductance method also serves as a powerful tool to study the 1/f-type noise. It has long been recognized that surface states at the Si-Si0 2 interfaces which exchange charge with the silicon can give rise to l/f-type noise. 29 It has been shown experimentally that the 1// noise of an MIS diode is directly related to surface-state density and capture conductance over the energy gap. 28 The mean square open circuit noise voltage across the MIS diode terminals is given by 29 2 4kTBG p (a>) <K } ~ G p \co) + co 2 C p 2 (co) (46) where B is the bandwidth in Hz; G p and C p are given by Eqs. (44) and (45) respectively, and the noise spectral distribution is given by 29 S(w) = (— ^BN ss [_2n(a s 2 + a 2 )-" 2 x J^expt-z - y)co-' ln(l + ^(f^)- (47) Figure 26 shows a typical theoretical noise spectrum versus frequency calculated from Eq. (47) for an MIS diode with a surface-state density of 3 x 10 11 cm _2 eV -1 at 300°K. We note that, in the intermediate frequency range, the noise has a l//-type frequency dependence. The frequency at which the noise spectrum is tangent to the line 1// gives the maximum value of G p ((o)/a>. From Eqs. (46) and (47) it can be shown that l//-type noise due to surface states can be reduced by decreasing N ss , and that l//-type noise can be calculated from the electrical properties of the interface obtained by measuring the admittance of an MIS diode. 460 Metal-Insulator-Semiconductor Diodes 1 10' " 10 3 <n |0 2 - - L NOISE ^^ SPECTRUM N. - ,-l/f - i i i i 6kHZ i i i i lO^ 10° I0 H FREQUENCY(Hz)- 10° 10° 10 I0 C Fig. 26 Theoretical noise spectrum versus frequency for an MIS diode with surface-state density 3 x 10 u cm" 2 eV" 1 at 300°K. (After Nicollian and Melchoir, Ref. 29.) (4) Surface Charges and Space Charges in the Insulator The surface charges include the fixed surface charge, the mobile ions, and the ionized traps which are located near or at the insulator-semiconductor interface. The space charges in the insulator include the mobile ions and the ionized traps inside the insulator. The fixed surface charge has the following properties : it is fixed and cannot be charged or discharged over a wide varia- tion of \j/ s ; it is located within the order of 100 A of the insulator-semiconduc- tor interface ; 30 its density Q fc is not greatly affected by the insulator thickness or by the type or concentration of impurities in the semiconductor; Q fc depends on the formation (oxidation) and annealing conditions, and on the semiconductor orientation. It has been suggested that the excess ionic silicon in the oxide is the origin of the fixed surface charge in the Si-Si0 2 system. 30 The effect of the fixed charge on the MIS capacitance curve is a parallel shift of the curve along the voltage axis, and the amount of shift A V is given by AV = Q fc (48) 3 Surface States, Surface Charges, and Space Charges 461 This can be explained with the help of Fig. 27(a). When a positive fixed surface charge is present, the electric field S t in the insulator is higher than the field on the semiconductor surface. Therefore more charges in the metal electrode are required to create a given surface field S s . Consequently a larger voltage is required to set up the surface potential \p s . An interesting example is shown in Fig. 27(b) where the capacitance and conductance of an unstable Si-Si0 2 system are plotted as functions of applied voltage before and after temperature aging. The shift of the C- V curve is caused by the increase in surface charges at the Si-Si0 2 interface. 9 ' 23 It was first demonstrated by Snow et al. 8 that alkali ions such as sodium in the thermally grown Si0 2 films are mainly responsible for the instability of METAL SiO, -E -E -T£ -E £ Sill Si © -© -0 -0 SURFACE CHARGES (a) 40 -22 -18 -14 V (VOLTS) (b) Fig. 27 Effect of surface charge on MIS curves. (After Nicollian and Goetzberger, Ref. 23.) 462 Metal-lnsulator-Semiconductor Diodes the oxide-passivated device structures. The reliability problems in semicon- ductor devices operated at high temperatures and voltages may be related to trace contamination by alkali ions, since, under those conditions, the ions can move through the oxide film and give rise to voltage shift. A typical example 8 of the effect due to mobile ions is shown in Fig. 28(a). The initial C-V curve (1) of a Si-Si0 2 system is annealed at 127°C for 30 minutes with + 10 V on the metal electrode to give curve (2). Curve (3) is obtained by annealing the sample at the same temperature for the same time but with — 10 V. We note that there is a partial recovery of the C-V curve. This drift phenomena can be explained using Fig. 28(b) where the charge distributions correspond to the capacitance-voltage curves in (a). Initially all the alkali ions are located near the metal electrode. When a positive voltage is applied to 0.9 -30 -20 -10 V ( VOLTS ) (a) C-V CHARACTERISTICS M I S J L \ . t • ■j (I) INITIAL (2) AFTER DRIFT (3) PARTIAL (V>0) RECOVERY (b) CHARGE DISTRIBUTIONS CORRESPONDING TO (a) Fig. 28 Effect of mobile ions on MIS curves. (After Snow et al., Ref. 8.) 3 Surface States, Surface Charges, and Space Charges 463 v>o (a) BAND DIAGRAM (b) CHARGE DISTRIBUTION ( WITH SURFACE AND SPACE CHARGES) (c) ELECTRIC FIELD -d o w M(x> (d) POTENTIAL Fig. 29 Band diagram, charge distribution, field, and potential on an MIS diode with surface charge and insulator space charge. the metal electrode (at 127°C), the positive ions will move towards the semiconductor and eventually reach the Si-SiO a interface causing a large voltage shift. When a negative voltage is applied (at 127°C), most of the ions will drift backwards to the metal electrode and give rise to the partial recovery. Other ions such as proton (H + ) can also give a similar drift effect. 31 The space charge in the insulator will also cause a voltage shift on the MIS C- V curve. Figure 29 shows the band diagram, the charge distribution, the electric field, and the potential for an MIS diode with both surface states and insulator space charge. Comparing this figure with Fig. 6 of the ideal MIS 464 Metal-Insulator-Semiconductor Diodes 'ac /-METAL FIELD PLATE OXIDE INVERSION LAYER DEPLETION LAYER C D/-TN K 11 I I I I 11 1 I (a) LATERAL AC FLOW BACK CONTACT -VW-^VW| R P r (b) EQUIVALENT CIRCUIT Fig. 30 (a) Lateral ac flow pattern. (b) Equivalent circuit. (After Nicollian and Goetzberger, Ref. 32.) diode, we note that for the same surface potential \l/ s , the applied voltage V is reduced indicating a voltage shift of the C- V curve toward negative voltage. And the shift due to the space charge density p t (x) is given by 1 r d AV = — - J xp t (x) dx. C t d Jo (49) In addition to the above, mentioned departures from the ideal MIS charac- teristics, there is the lateral alternating current flow which occurs in surfaces having a permanent inversion layer due to charges in the insulator and/or on the surface. In this case the inversion layer is essentially connected with the minority carriers on the entire surface. 32 The flow lines of the alternating current are shown in Fig. 30(a). The current flows across the insulator as a displacement current, then spreads out in the high-conductivity inversion region (channel region) and finally flows across the depletion capacitance in an area much larger than the metal plate. This effect increases the semicon- ductor capacitance without necessity of recombination processes. The equivalent circuit is shown in Fig. 30(b) which is for a nonideal MIS diode in the inversion region. The depletion capacitance C D is now shunted by a branch consisting of R F and R c in series with C c where R F is the resistance of the inversion layer and where R c and C c are the lumped resistance and 3 Surface States, Surface Charges and Space Charges 465 capacitance of the channel outside the metal plate. This channel connection greatly enhances the response time of minority carriers, and the cutoff frequency of the channel is considerably higher than that for minority carriers under equilibrium condition. This is demonstrated in Fig. 31 which shows the C-V curves of a metal-Si0 2 -Si diode at three frequencies. The cutoff frequency in this case is about 50 MHz which is considerably higher than the 100 Hz shown in Fig. 9. The experimentally observed distributions of surface-state density versus energy in MIS diodes with thermally grown oxides on silicon substrates have been correlated to the existence of charges in the oxide layer by Goetzberger et al. 33 This is because (1) in ion-free oxides a reduction of surface charges by annealing leads also to a reduction of surface states, (2) ionizing radiation creates both surface charges and surface states, (3) incorporation of either holes or electrons by the surface avalanche effect (to be discussed in Section 5) into the oxides leads to a surface charge of the proper sign and a proportional density of surface states. A schematic illustration of the correlation is shown in Fig. 32 where it is assumed that the oxide contains approximately equal densities of positive and negative charge centers, that all those charges within some distance D of the interface give rise to surface states, and that each positive (negative) charge in D gives rise to one localized surface state near the conduction (valence) band edge. These states are not the same as those found on clean or cleaved surfaces. Because the binding energy of the states is at least 0. 1 eV, their size cannot be greater than the radius R « 30 A of the scaled hydrogen atom model of a bulk donor state. However, a typical density of 10 12 cm -2 of surface states means there is only one surface state in an area 100 A square. A single positive charge at the interface will give rise to a bound donor state analogous to that formed in the bulk. Using the effective mass approximation for shallow states we obtain for the energy, from Eq. (21) of Chapter 2, (— W = Z 2 E D (50) £.= (£; + e s ) \m c where E D is bulk donor ionization energy and Z 2 = [2s s /(Si + e s )] 2 which is 2.25 for the Si-Si0 2 system. A similar result can be obtained for the acceptor states. Since E D = 0.025 eV and E A = 0.05 eV in silicon, the expected surface energies are about 0.06 eV for the surface donors and 0.12 eV for the surface acceptors. These values are in reasonable agreement with the peak positions in Figs. 19 and 21. For a charge located at some distance x in the oxide, the energy level, which is independent of x, remains unchanged. This explains the existence and the sharpness of the peaks. Because of the effective-mass approximation, a 466 Metal-Insulator-Semiconductor Diodes 10 9 8 1 7 uj 6 o I 5 o 4 < < 3 o 2 1 ? 3 A 1 1 ^ M**~ r *~** r ^ f = 5 MHZ 1liSE ffcr D - D - l> ^^ f = 50 MHz METAL- Si 2 -Si (p-TYPE) d = 2000A N A =2xlO l5 crrf 3 ,AREA = 5xlO~ 4 cm 2 -35 -30 -25 -20 -15 -10 V (VOLTS) Fig. 31 Capacitance-voltage curves of a metal-Si0 2 -Si diode at three frequencies. (Ref. 32.) OXIDE «i + + + _ | D - ELECTRON NTERFACE Fig. 32 Schematic diagram of correlation between surface state and surface charge. (After Goetzberger et al., Ref. 33.) 4 Effects of Metal Work Function on MIS Characteristics 467 reasonable upper limit of x is R (D m R) the radius of the hydrogen-like orbit. The surface states near the midgap are due to charge clusters, e.g., two positive charges situated close together within the depth D act effectively as a single center of double charge, quadrupling the energy to 0.24 eV. Larger clusters can give even deeper surface energy levels but with smaller surface- state density because the charges are randomly distributed, and the chance that many charges will be located close together is very small. From the above discussions it is clear that to obtain stability of MIS device parameters under operational stresses such as high electric field and elevated temperature, we must control both the ion drift instability and the surface- charge instability. 34 The basic approaches to the control of the ion drift are (1) modification of the insulator, e.g., phosphorus doping on the Si-Si0 2 system or use of an insulator such as silicon nitride which is immune to ion drift and (2) clean fabrication so as to avoid contamination of sodium and other impurities. To control the surface-charge instability, we must use (1) proper annealing, e.g., high-temperature dry-hydrogen annealing which can effectively reduce the surface charge density and (2) semiconductor substrates which are free from foreign impurities other than the desired dopants. 35 Because of the correlation between the surface charge and surface states, if we can control the surface charge instability, we automatically control the surface-state instability. 4 EFFECTS OF METAL WORK FUNCTION, CRYSTAL ORIENTATION, TEMPERATURE, ILLUMINATION, AND RADIATION ON MIS CHARACTERISTICS (1) Metal Work Function Effect For an ideal MIS diode it has been assumed that the work function dif- ference (Fig. 2) for a />-type semiconductor, #«s = 0«-Uf + 2 f + W, ( 51 ) is zero. If the value of <f) ms is not zero, and if a fixed surface charge density Q fc exists at the insulator-semiconductor interface (assuming negligible surface states and other charges), the experimental capacitance-voltage curve will be displaced from the ideal theoretical curve by an amount Vfb = ^r ~ <t> ms (52) where V FB is the shift of voltage corresponding to the flat-band capacitance, 468 Metal-Insulator-Semiconductor Diodes and C t is the insulator capacitance per unit area (e t /d). The fixed charge density is obtained from Eq. (52) : Qfc = Ci(V FB + 4> ms ) coul/cm 2 C = —(Vfb + <f> ms ) charges/cm 2 . <1 (53a) (53b) The energy band diagram for the interface between silicon and thermally grown Si0 2 has been obtained from electron photoemission measurement 36 and is shown in Fig. 33. For Si0 2 the band gap is found to be about 8 eV and the electron affinity (qxd 0.9 eV. It is also found that deep electron traps are present at a level of 2 eV below the oxide conduction-band edge with a capture cross section of about 10~ 12 cm 2 . The mobility in the oxide is esti- mated to be either 34 or 17 cm 2 /V-second depending on whether the trapping center is singly or doubly charged. Photoemission of holes from silicon to silicon dioxide has also been studied, 37 and it is obtained that for holes in the oxide valence band, the mobility mean-free-time product is about 10 ~ 1 2 cm 2 /V. The effect of the metal work function on MIS diodes can be studied using the photoresponse measurement and the MIS capacitance-voltage measure- ment. Figure 34(a) shows the cube root of photoresponse versus photon energy for MIS diodes using various metals. 38 The intercept on the /zv-axis corresponds to the metal-Si0 2 barrier energy q<j> B . The metal work function is given by the sum of 4> B and Xi where Xt is the electron affinity of the insu- lator (refer to Fig. 2). Similar results are obtained from the MIS capacitance measurements as shown in Fig. 34(b). From Eq. (52), if two different metals 0.9 eV _ _VA£UUM_LEVEL .__1 Si0 2 CONDUCTION BAND 5.25 eV U I. lev W//// SILICON 'A VALENCE BAND 4.35 eV 2.0 eV 8.0 eV Fig. 33 Energy band diagram of Si-Si0 2 system obtained from photoemission measurement. (After Williams, Ref. 36.) 4 Effects of Metal Work Function on MIS Characteristics 469 are deposited as field plates on the same oxidized silicon sample, the displace- ment between the two experimental MIS curves will represent the difference in metal work functions (0 ml - (f> m2 ) or (0 B1 — (f> B2 ). Hence if the value of <j> m for any one metal is known (e.g., Al with 4> m = 3.2 V from photoresponse), then the <f> m values for other metal can be determined. The results are shown in Table 9.1 ; also shown are the vacuum work functions. The metal work TABLE 9.1 METAL WORK FUNCTION (VOLTS) Metal </>,„(C-V) </>,„ (Photoresponse) cf) m (Vacuum Work Function) Mg 3.35 3.15 3.7 Al 4.1* 4.1 4.25 Ni 4.55 4.6 4.5 Cu 4.7 4.7 4.25 Au 5.0 5.0 4.8 Ag 5.1 5.05 4.3 * Value of (/),„ for Al (4.1 V) is the sum of the barrier height (3.2 V) and the Si0 2 electron affinity (0.9 V). £ 40- 5.0 (a) Fig. 34 (a) Cube root of photoresponse versus photon energy for MIS diodes using various metals. 470 Metal-lnsulator-Semiconductor Diodes I.U 0.9 /- Ni 0.8 Mg\ aA \&\0 ^- Cu \^- Au y- Ag 0.7 - 0.6 - i 0.5 - \k 0.4 - vxk 0.3 i ! i 1 1 1 1 1 1 1 -3 -I V ( VOLTS) (b) Fig. 34 (b) The corresponding MIS capacitance curves. (After Deal et al., Ref. 38.) functions as obtained from the photoresponse and the capacitance curve are in excellent agreement. These values are, however, different from that of the vacuum work function. This is of no surprise, since the deposited metal films are polycrystalline and the insulator-metal interface is quite different from the vacuum-metal (single crystal) interface as used in the vacuum work function measurement. It has also been found 38 using the above methods that the silicon-silicon dioxide barrier is independent of silicon orientation to within 0. 1 V. The above results show that 4> ms can significantly affect the silicon surface potential, and that in evaluating the surface charge densities from C-V curves, 4 Effects of Metal Work Function on MIS Characteristics 471 the voltage displacement must be corrected for 4> ms , Eq. (53). Figure 35(a) and (b) show the band diagrams 38 for two common electrode metals (Al and Au) on n- and /?-type Si (10 16 cm -3 ) respectively for the case of an oxide thickness of 500 A and zero surface charge, ft can be seen that by appropriate choice of the electrode metal, the rc-type surface can be varied from accu- mulation to depletion, and the />-type surface can be varied from flat-band to inversion. In Fig. 35(c) the required 4> ms correction is shown as a function of silicon doping and type for both gold and aluminum electrodes. (2) Crystal Orientation Effect It has been shown in Fig. 19 that the surface state density of a Si-Si0 2 system under a given oxidation condition has its largest value for <111)> 0.41 eV Fig. 35 (a) Band diagram for Au and Al on n-type silicon, (b) Band diagram for Au and Al on p-type silicon, and 472 Metal-lnsulator-Semiconductor Diodes 0.8 0.6 ~ GOLD n-TYPE Si 0.4 - 0.2 - GOLD ^ p-TYPE Si -0.2 -0.4 ALUMINUM n-TYPE Si -0.6 -0.8 ALUMINUM p-TYPE Si -1.0 -1 2 i i i 1 0" 10 5 I0 16 I0 17 I0 18 SILICON IMPURITY CONCENTRATION (cm -3 ) (C ) Fig. 35 ( c ) <f>ms versus silicon doping. (Ref. 38.) oriented substrate. This result can be correlated with the effect of the crystal orientation on oxidation rates. 30 ' 39 The oxidation rate is given by C exp(-EJkT) where C is proportional to the available silicon bonds per cm 2 to react with the oxygen or water molecule, and E a is the activation energy. Table 9.2 shows the properties of silicon crystal planes oriented along <111>, <110>, and <100>. It is apparent that the (111) surface has the largest number of available bonds per cm 2 and the (100) surface has the smallest. The activation energy also is expected to depend on the orientation. Bonds parallel to the surface are expected to react most readily. Those at an angle to the surface plane will react less easily because of a steric hindrance presented by the position of the silicon atoms in the neighborhood of the bond. On examination of surfaces with different orientations, one notes that £ a (100) > £ (111) > £,,(110). Since the (100) surface has the largest E a and the smallest available bonds, the oxidation rate of (100) would therefore be the smallest. If the activation energies for the (111) and (110) surfaces are reasonably close, then one would expect that the (111) surface has the largest oxidation rate because it has 23 percent more available bonds per cm 2 . If we assume that the origin of the fixed surface charge is due to the excess ionic silicon in the oxide, 30 then the larger the oxidation rate, the larger the amount of the 4 Effects of Metal Work Function on MIS Characteristics TABLE 9.2 PROPERTIES OF SILICON CRYSTAL PLANES 473 Orientation Plane Area of Unit Cell (cm 2 ) Atoms in Area Available Bonds in Area Atoms/cm 2 Available Bonds/cm 2 <111> V3a 2 /2 2 3 7.85 x 10 14 11.8 x 10 14 <no> V2a 2 4 4 9.6 x 10 14 9.6 x 10 14 <100> a 2 2 2 6.8 x 10 14 6.8 x 10 14 excess silicon ions ; thus the (1 1 1) surface should have the highest fixed charge density. This in turn gives the highest surface states density on the (1 1 1) surface because of the correlation between surface charge and surface states as discussed in Section 3(4). (3) Temperature Effect For an MIS diode, the charge in the inversion layer can communicate with the bulk under steady-state conditions only by means of generation-recombi- nation processes. At room temperature the inversion-layer cutoff frequencies in Si-Si0 2 systems are normally below 100 Hz, sometimes below 1 Hz. At lower temperatures the build up of the inversion charge is very slow. It is found that a forward bias of about 0.25 V must be reached across the space charge region before a noticeable injection of the inversion charge occurs. 22 The true inversion capacitance-voltage curve can only be measured by allowing a long time for equilibration at each bias point. At elevated tempera- tures, however, the generation is more rapid, and the temperature effect on the MIS characteristics especially the generation mechanisms can be easily studied. A typical example is shown in Fig. 36 where (a) is for a family of capacitance versus voltage curves and (b) for a family of conductance versus voltage curves at 6 kHz for an w-type sample. 40 It is seen that both capacitance and conductance saturate in the inversion region at negative voltage. Due to the residual surface states small humps appear in the depletion region. The appropriate equivalent circuit for the heavy inversion region has been shown previously in Fig. 25(d). The total conductance G, l/R gs + XjR gD + X/R d , can be obtained from Fig. 36(b), and is plotted versus XjT in (c). As discussed previously in Chapter 3, the space-charge recombination process is propor- tional to rii with an activation energy of EJ2, and the diffusion process is proportional to n t 2 with an activation energy of E g . From Fig. 36(c) it is seen that the space charge recombination is the dominant effect (l/R gD ~ n t ) up to 140°C. In this range the experimental activation energy is 0.56 eV, line 474 Metal-lnsulator-Semiconductor Diodes T- I70°C H60 ° ■*,? 150° 30 28 26 24 22 ?0 140° 130° 120° lin° 80° 100° N D = 1.17 x I0 16 I 90° 18 16 60° 30° 70 °l 1 -12 -10 -8 -6 -4 -2 V ( VOLTS ) (0) • 14 -12 -10 -8 -6 V I VOLTS) (b) Fig. 36 (a) MIS capacitance versus voltage curves at various temperatures. (b) Conductance versus voltage curves at various temperatures. (a), in excellent agreement with the expected activation energy of n t or (E g /2). Above 140°C a new process dominates as shown by the break in the l/Tplot. The high- temperature region, line (c), is obtained by subtraction of the influence of space-charge generation from the total conductance, line On- line (a). The activation energy is found to be 1.17 eV (E g ) corresponding to the expected result for the diffusion process (l/R d ~ n t 2 ). The above results demonstrate the validity of the equivalent circuit shown in Fig. 25(d) for the heavy inversion region. 12 4 Effects of Metal Work Function on MIS Characteristics 475 10" <n 10 IO-« Wb) vy \ V \ V (c)\ Co) { — ■- 2.0 2.2 24 26 2.8 3.0 3.2 3.4 1000/T ["K' 1 ) (C) Fig. 36 (c) Conductance versus 1/T. (After Goetzberger and Nicollian, Ref. 40.) (4) Illumination Effect The main effect of illumination on the MIS capacitance-voltage curves is that the capacitance in the heavy inversion region approaches the low- frequency value as the intensity of illumination is increased. This effect is illustrated in the insert of Fig. 37 which shows the normalized capacitance measured at 100 kHz versus applied voltage when white light with different intensities is illuminated on the MIS device. 13 There are two basic mechanisms which are responsible for this effect. The first is the decrease in the time constant, r inv , of minority carrier generation in the inversion layer. 13 The second is the generation of electron-hole pairs by photons which causes a decrease of the surface potential ij/ s under constant applied voltage. 41 This decrease of i/> s results in a reduction of the width of the space-charge layer, with a corresponding increase of the capacitance. The second mechanism is preponderant when the measurement frequency is high. From the equivalent circuit shown in Fig. 25(d), the MIS capacitance under the heavy inversion condition is given by C C;-C C D 1 + CQ 2 T? nv Ci 0) 2 T? nv (54) 476 Metal-Insulator-Semiconductor Diodes Fig. 37 Effect due to illumination. (After Grove et al., Ref. 13, and Grosvalet and Jund, Ref. 41.) where r inv is the time constant of the inversion layer given by C D (T.\/R)~ The ratio of the time constants with or without illumination is given by T inv (with illumination) n { T lnv ( without illumination) n t + Gx (55) where n t is the intrinsic carrier concentration, G the generation rate of electron- hole pairs by photons, and t the lifetime of minority carriers. It is clear from Eqs. (54) and (55) that as G increases, the lifetime r lnv decreases, which in turn causes an increase in C. This explains the first mechanism. However, in order to obtain a large increase in C, one must use very strong illumination. 4 Effects of Metal Work Function on MIS Characteristics 477 Consider now the second mechanism. Without illumination and under strong inversion, the applied voltage [from Eqs. (15), (23), and (24)] is given by V = iA s + - dS s « - dS s e,d l2kTn nn /# s \ ' (56) i J 2kTn po / where d is the oxide thickness, and S s is the surface electric field. With uniform illumination, the equilibrium concentrations in the bulk become (for a /7-type semiconductor) N L = n po + An, (57) P L=P P o + &"■ And the approximate expression for the applied voltage is given by Eq. (56) with N L replacing n po . Figure 37 shows a typical example of V versus \J/ S for silicon with N A = 10 14 cm -3 and Si0 2 layer of 2000 A. Without illumina- tion, the curve is similar to that shown in Fig. 5. With illumination corres- ponding to generation such that N L = 10 7 n po (xl0 13 cm -3 ), the curve shifts toward the left. Thus the surface potential \J/ S at a given bias voltage is consi- derably reduced and results in an increase in C. (5) Radiation Effect As shown 42 in Fig. 38(a), the MIS structure is under ionization radiation such as electrons, 42 x-ray, 43 or y-ray. 44 As the radiation passes through the insulator, hole-electron pairs are generated. Since the holes are relatively immobile, 37 they are trapped or recombine with electrons before they can leave the insulator. The electrons, on the other hand, are more mobile and drift toward the positive electrode. Since the Si is unable to supply electrons to the Si0 2 (because of a large potential barrier at the Si-Si0 2 interface) a net positive space charge, Q R , builds up near the Si-Si0 2 interface. Figure 38(b) illustrates this buildup for an MIS diode with positive voltage applied to the metal electrode. 44 As the positive space charge grows, the electric field in the oxide between the space charge and the positive electrode decreases. When the field in this region is reduced to zero, no further charge will accumulate unless the applied voltage is increased. It is thus expected that the charge Q R will depend on V. Based on the above model, it is pre- dicted 45 that (1) the dependence of the charge buildup on radiation dose, D R , is approximately of the form [1 - exp( - constant • D R )], (2) the charge 478 Metal-lnsulator-Semiconductor Diodes + VO (a) (I) (2) (3) INITIAL INTERMEDIATE FINAL STEADY STATE (b) Fig. 38 (a) MIS structure under ionization radiation. (After Zianinger, Ref. 42.) (b) Buildup of the positive space charge near the Si-Si0 2 interface. (After Snow et al., Ref. 44.) buildup increases linearly with the voltage for both polarities, (3) the charge buildup depends on the total dose absorbed and not on the rate at which the dose was received. The charge Q R will cause a voltage shift of the MIS capacitance curve (Fig. 39, insert). For V < 0, however, the accumulation of the trapped charge 5 Surface Varactor and Electroluminescent MIS Diodes 479 40 1 20 Co 60 - y V = 4-IOV C/C; 10 V + IV DOSE ( MEGARADS) Fig. 39 Experimental results of measured MIS voltage shift versus Co 60 -y dose. (After Mitchell, Ref. 45.) will take place near the metal-insulator interface rather than near the insulator- semiconductor interface. In this case the space charge is further removed from the semiconductor surface and hence will have less effect on the MIS curve. Figure 39 shows some typical experimental results 45 where the voltage shifts are plotted as a function of the dose of Co 60 y-rays. We note, as expected, that the voltage shifts for positive bias values are considerably larger for the voltage shifts for the corresponding negative bias values. And the exponential buildup is also in good agreement with the prediction. SURFACE VARACTOR, AVALANCHE, TUNNELING, AND ELECTROLUMINESCENT MIS DIODES As mentioned in the Introduction, at the present time the most useful application of MIS diodes is in the study of semiconductor surfaces and in the passivation of semiconductor planar devices. The MIS diodes, however, 480 Metal-Insulator-Semiconductor Diodes have other potentials per se as useful devices both for electronic application and for studies of fundamental physical parameters and physical processes. In this section, we will consider briefly some of the interesting potentials of MIS diodes. (1) MIS Surface Varactor Actually the first MIS structure was proposed in 1959 as a surface varactor by Moll, 1 and by Pfann and Garrett. 2 The basic characteristics of this device are its capacitance-voltage dependence and its negligible dc conduction. Two quantities of importance for the performance of a varactor are the ratio be- tween the maximum and minimum capacitances and the cutoff frequency. The MIS varactor approaches the ideal requirement of an abrupt change from one constant value of capacitance to another (for a frequency sufficiently high that a high-frequency curve is obtained). The ratio of the maximum («Ci) and the minimum (Q, in in the inversion region) capacitance can be varied by varying the insulator thickness and the semiconductor doping density. For large ratios, thin insulating films and low doping densities (or high resistivities) should be used [as illustrated in Fig. 13(b)]. The cutoff frequency for small ac signal operation is defined as 3 ' 4 '•-dsc (58) where A is the area, R the resistance, and C the capacitance per unit area at dc bias voltage. For large ac signals, the capacitance will change appreciably during a cycle, and a minimum cutoff frequency is defined as f^-^cZ (59) when C max is the highest possible capacitance under operating conditions. To reduce the resistance, an epitaxial layer should be used. The thickness of the layer cannot be less than the width of the space-charge layer at maximum volt- age, (e s dl&^{C m JC' m{n - 1), to obtain the desired capacitance change. It can be shown that comparable performance can be obtained using either a step p-n junction varactor or an MIS surface varactor. It is expected that stable operation of an MIS varactor with good efficiency will ultimately be achieved at frequencies exceeding 300 GHz by using thin epitaxial layers and thin insulating films. 46 At medium frequencies the performance is equivalent to the junction varactor, and at still lower frequencies it is superior. The latter result follows from the larger capacitance ratio available in the MIS varactor, since an equivalent capacitance ratio can be obtained with the junction varactor only at the expense of a large voltage swing, or by operation 5 Surface Varactor and Electroluminescent MIS Diodes 481 in the forward-biased direction where the junction is a lossy element. In addition, the MIS varactor is easy to fabricate. It can be made with a small active area and low capacitance, and without the need of a very low-resistance ohmic contact to the semiconductor. Thus for high-frequency use, in some cases where high contact resistance to the semiconductor or high capacitance is a limiting factor in the performance of a junction varactor, the MIS surface varactor will prove to be superior. (2) Avalanche and Tunneling at Semiconductor Surface and Optical MIS Diodes When a bias voltage is applied so rapidly to an MIS diode that buildup of an inversion is impossible, the capacitance-voltage curve will show the nonequilibrium characteristic of a continuously decreasing capacity, Fig. 7(c). In this case the space-charge region extends into the semiconductor as in a step p-n junction. When a voltage pulse is applied to the MIS diode with a sufficiently high amplitude to make the field at the surface reach the avalanche field, S sa , impact ionization occurs at this point and prevents the surface field from exceeding S sa . This results in a constant capacitance of low value at pulse voltages above breakdown voltage. The influence of surface states on capacitance can be neglected here because the time constants are much too long. The relation between the applied voltage V, the avalanche field £ sa , and the breakdown surface potential ij/ sa (identical to the breakdown voltage in the one-sided p-n junction as discussed in Chapter 3) can be obtained from Poisson's equation and is given by y-v FB = — ^— + ^ ( 60 ) where W is the space-charge layer width, and V FB is the flat-band voltage shift due to work function difference and surface charges. Since \J/ Sa = (qN D /2e s )W 2 , Wean be eliminated from Eq. (60), and we obtain 47 * sa = iyf*? + {V-Vn) - a) 2 (61) _ l 2qN D il/ sa ^"=J (62) where aml(^£hY". 482 Metal-Insulator-Semiconductor Diodes We also obtain the relation between the measured capacitance and the voltage : (§: r— (V- a v FB ) 2 (63) An experimental result 48 is shown in Fig. 40 where (CJC) 2 is plotted against pulse voltage for an MIS diode (Si-Si0 2 ) with d = 600 A and N D = 9.3 x 10 16 cm -3 . For lower voltages the plot follows the relation given by Eq. (62). At the avalanche point the silicon surface breaks down and a constant field, S sa , is reached, which results in a constant capacitance. Beyond the avalanche point any additional voltage will be applied across the insulator layer only. The result of \j/ sa (or V B ) as obtained from Eq. (61) is plotted in Fig. 41 as a function of the silicon doping concentration. 48 For lower dopings (Region I) the space-charge region is wide, as shown in Fig. 42(a), and the fringing field is high. This breakdown is similar to the junction edge effect 49 (Chapter 3), and gives rise to lower voltages than those predicted for plane junctions 50 (solid line in Fig. 41). For intermediate dopings (Region II) where the space- charge region is narrow, there is no edge effect, Fig. 42(b). The breakdown voltages agree with the theoretical values of abrupt p-n junctions. At very high dopings (>10 18 cm -3 , Region III), tunneling occurs as shown in Fig. 42(c). Since the band bending has to be equal to the band gap, the breakdown voltage is always about 1.1 volts. 48 The above effects can be used to obtain electroluminescence in MIS diodes. 51 A setup for observation of light emission is shown in Fig. 43(a). For a p-type sample, when a large positive voltage is applied, the bands in the semiconductor will bend down as shown in Fig. 43(b), and minority carriers (electrons) will accumulate at the semiconductor-insulator interface. If a large negative voltage is suddenly applied, the bands will bend up slightly as shown in Fig. 43(c), holes will accumulate at the interface, and the electrons previously generated at the interface may diffuse and drift into the semi- conductor bulk and recombine with the holes resulting in light emission. To produce minority carriers fast enough in the positive half-cycle of the voltage, we must use either avalanche multiplication or the tunneling effect. The minority carrier charge density Q accumulated at the interface on positive half-cycles and the average minority carrier current J are given approximately by 51 Q ~ etft - *J (64a) J~Qf (64b) where g t is the peak electric field in the insulator and / is the frequency. Figure 44(a) shows the observed spectrum of a/?-type GaAs (4 x 10 18 cm -3 ) 5 Surface Varactor and Electroluminescent MIS Diodes 483 AVALANCHE POINT -5 10 -15 -20 -25 -30 PULSE HEIGHT, V (VOLTS) -35 -40 -45 Fig. 40 {CilC) 2 versus pulse voltage for an MIS diode. (After Goetzberger and Nicollian, Ref. 47.) 100 10 - < 1.0 oo |o 15 •• 11 1 1 ^1 1 1 ^\THE0RY \|v ■" I • M " -1— 1 M 1 III 1 1 1 II Ml. I i iiini : i iiiiii • i i i i i i.i j 10' 10 ' 10' 1020 SILICON DOPING, N Q (crrf 3 ) Fig. 41 Breakdown voltage in the silicon versus silicon doping concentration. (After Goetzberger and Nicollian, Ref. 48.) 484 Metal-lnsulator-Semiconductor Diodes ELECTRiC FIELO LINES EDGE OF SPACE- CHARGE REGION (a) REGION I! LOW DOPING DENSITY, WIDE SPACE-CHARGE REGION, HIGH FRINGING FIELD ELECTRIC FIELD LINES EDGE OF SPACE- CHARGE REGION (b) REGION H: MEDIUM DOPING DENSITY, NARROW SPACE- CHARGE REGION, NO EDGE EFFECT e F (c) region nr: high doping density, TUNNELING EFFECT Fig. 42 Schematic diagrams corresponding to the three regions in Fig. 41. (Ref. 48.) 5 Surface Varactor and Electroluminescent MIS Diodes 485 BACK CONTACT 16 MCI Lk •rA>;>\ METAL CONTACT IR IMAGE CONVERTER GaAs hi/J IOOOA Si 3 N 4 (a! METAL INSULATOR SEMICONDUCTOR MINORITY CARRIERS FERMI LEVEL ^7V/. V<0 hi/ (c) Fig. 43 (a) Schematic setup for observation of light emission. (b) Band bending due to large positive voltage. (c) Band bending due to negative voltage. (After Berglund, Ref. 51.) sample coated with 1000 A Si 3 N 4 . The primary means of minority carrier generation is tunneling because of the large doping of the GaAs. Figure 44(b) shows the spectrum of a similar MIS structure with more lightly doped GaAs (5 x 10 17 cm -3 ). The means of minority generation in this case is 486 Metal-Insulator-Semiconductor Diodes 300°K 8000 9000 10,000 RADIATION WAVELENGTH (A) (b) 1,000 Fig. 44 (a) The observed spectrum of a p-type GaAs (4 x 10 18 cm -3 ) sample coated with 1000ASi 3 N 4 . (b) The observed spectrum of similar sample with N A = 5 x 10 17 cm -3 . (Ref. 51.) avalanche multiplication. The minority carrier injection scheme described above may have significant advantages for materials that cannot be made both n and p type (e.g., some II- VI compounds). In connection with electro- luminescence, the MIS diodes can also be used for optical detection such as the InSb MIS infrared detector which exhibits high quantum efficiency and high detectivity. 52 The MIS optical detectors can be made using a semi- transparent metal electrode on the insulator. Light can be transmitted through the metal and the insulator layer (hv < E g of the insulator) and incident upon the semiconductor. If hv > E g of the semiconductor electron-hole pairs will 5 Surface Varactor and Electroluminescent MIS Diodes 487 be generated at the semiconductor surface. The MIS optical detector should be very useful because of the fact that the depletion region is at the semi- conductor surface, and the absorption of light occurs in a high-field region, thereby yielding high collection efficiency. (3) Tunneling in Insulator and Tunnel MIS Diodes It can be shown that, under certain conditions, the current-voltage charac- teristic of an MIS diode with a very thin insulating layer on a degenerate semiconductor substrate exhibits negative resistance similar to that of a tunnel diode (Chapter 4). The simplified band diagrams 53 including surface states for MIS structures withp ++ and n ++ semiconductor substrates are shown in Fig. 45. The band bending, image forces, and potential drops across the oxide layer at equilibrium are neglected for simplicity. Consider the p + + type first. Application of a positive voltage to the metal, Fig. 45(b), causes electron tunneling from the valence band to the metal. This tunneling current increases monotonically with the increasing energy range between the Fermi levels; it further increases with the decreasing insulator barrier height. Application of a small negative voltage to the metal, Fig. 45(c), results in electron tunneling from the metal to the unoccupied semiconductor valence band. An increase of the voltage - V, according to Fig. 45(d), implies an increase in the effective barrier height for electrons tunneling from the metal to the unoccupied states of the valence band, i.e., a negative I-V characteristic [if qV c <gV v as shown in Fig. 45(a)]. However, electrons in the metal with I M <P~) (N* + ) Fig. 45 Simplified band diagrams including surface states of tunneling MIS diode (After Dahlke and Sze, Ref. 53.) 488 Metal-lnsulator-Semiconductor Diodes higher energies can tunnel simultaneously into the empty surface states and momentarily recombine with holes in the valence band, resulting in another current component. Since the insulator barrier decreases with bias, this current component has a positive /- V characteristic. Finally, an additional increase of the bias, Fig. 45(e), results in a third very fast-growing tunnel current component from the metal into the conduction band of the semiconductor. Next consider the n ++ type semiconductors. As shown in Fig. 45(f), the effective insulator barriers for the n ++ type are expected to be smaller than those of the p ++ type samples; hence for a given bias, there will be larger tunnel currents. For a negative bias on the metal Fig. 45(g), electrons tunnel from the metal into the empty states of the semiconductor conduction band, resulting in a large, rapidly increasing current. A small positive voltage on the metal, Fig. 45(h), leads to increasing electron tunneling from the conduction band of the semiconductor into the metal. If the surface states are filled with conduction electrons by recombination, a further increase in bias will give rise to a second current component caused by the tunneling of electrons from the surface states into the metal. This current component increases with increasing bias, Fig. 45(i), since the effective insulator barrier decreases. For larger voltage, Fig. 45(j), additional tunneling from the valence band to the metal is possible, but its influence on the total /- V characteristic is compara- tively small because of the related high oxide barrier. Thus, the band structure of the semiconductor has a much smaller influence on the tunneling charac- teristics of the n ++ type compared to p + + type structures. Figure 46(a) shows the measured /- V characteristics at room temperature (solid lines) and liquid nitrogen temperature (dotted lines) for three p + + silicon samples with oxide layers (20 A) treated in different ways. It should be noted that the small influence of temperature on the I-V characteristics is typical for tunneling. The samples have an oxide grown in dry oxygen (top one), in steam (middle one), and in steam with 30-minute annealing in H 2 at 350°C (bottom one). The band structure of the semiconductor is most distinctly reflected by the I-V characteristic of the bottom one; for negative voltages the current increases gradually with bias until - V « 1 volt where the current starts to increase rapidly with bias. This voltage corresponds to the silicon band gap at high doping (with some band-edge tailing effect). The predicted negative resistance at small negative voltages is apparently masked by the tunneling of electrons from the metal into the surface states as discussed previously. The /- V characteristics of the top and the middle sam- ples show in principle the same trend as the bottom one but exhibit consider- ably increased currents especially in the forbidden energy range (-1.1 V < V < 0). If these currents are assumed to be proportional to the density of surface states, Fig. 46(a) leads to the conclusion that there is an increase of 1 or 2 orders of magnitude in surface state density when changing from annealed 5 Surface Varactor and Electroluminescent MIS Diodes 489 -0.4 0.4 V ( VOLTS ) la) Fig 46 (a) Measured 1-V characteristics at room temperature (solid lines) and liquid nitrogen temperature (dotted lines) for three p ++ silicon samples with oxide layer (20 A) treated in different ways. to steam-grown and finally to dry-oxygen-grown oxide layers. This is in qualitative agreement with an experimentally determined increase of surface states for annealed-steam or oxygen-grown oxide layers of larger thickness (d « 1000 A). 9 The effects of the semiconductor band structure and the density of surface states on the dc tunnel characteristics are even more distinctly reflected by the conductance-voltage curves, as shown in Fig. 46(b) which are obtained by differentiating the measured curves for Fig. 46(a). The solid lines and dotted lines are for measurements at room temperature and liquid nitrogen temperature respectively. The left branches of the curves for V < -1.1 V in Fig. 46(b) represent electron tunneling from the metal into the conduction band ; the right branches, V > 0, represent tunneling from the 490 Metal-Insulator-Semiconductor Diodes in'" ! i i i i i i i I i i i l i l l_ -1.6 -1.2 -0.8 -0.4 0.4 0.8 1.2 1.6 V (VOLTS) (b) Fig. 46 (b) The corresponding conductance (d//dV) curves. (Ref. 53.) valence band into the metal. The minimum conductance at small negative voltages is a result of the superposition of two current components as shown in Fig. 45(d). The expected negative conductance of the first component is apparently compensated for by the larger positive conductance of the surface states. The measured ac capacitance and conductance as a function of applied voltage and frequency are presented in Fig. 47(a) and (b) respectively. The capacitance curves of the unannealed sample, as expected, are higher than the annealed ones, since the former has higher surface-state densities. Much larger frequency dependence is observed on the ac conductance curves. For /< 5 kHz, the conductance curves are virtually identical to the curves shown in Fig. 46(b). The basic equivalent circuit including the tunneling effect is shown 5 Surface Varactor and Electroluminescent MIS Diodes 491 in the insert of Fig. 47. The RC circuit to the left of the line AA is identical to that shown in Fig. 16(a) for thicker insulator films. R T is the equivalent resistance for the tunneling of electrons into the valence band and/or con- ductance band of the p ++ semiconductor, [corresponding to current com- ponents 1 and 3 in Fig. 45(c) and (e)]. R TS is the equivalent resistance for the tunneling of electrons into the surface states and the recombining of them with holes in the valence band [corresponding to current component 2 in Fig. 45(d) or (e)]. Both R T and R TS are functions of the applied voltage. The complete circuit can be simplified as a capacitor C(co) in parallel with a conductor G(co), both frequency dependent. It can be shown that d[C(co)]/dco < 0; and that d[G(co)ydco > 0. For thin oxide layers and/or highly doped semiconductor substrates, the capacitance will increase from its high-frequency value 53 to C(0) ~ C(oo) + AC S (66) as co -> 0. And the conductance will increase from its low-frequency value R T (R TS + R s ) to as co-* co, where C(oo) = G(0) + * R " + *■> (68) A _ (Ci R rs — c D R s y (C, + C D ) 2 (R TS + R s y The experimental results as shown in Fig. 47 are in good agreement with the above discussion. The predicted negative resistance 54 is obtained in an MIS tunnel diode of Al-Al 2 3 -SnTe. The SnTe is highly doped p-type with a concentration of 8 x 10 20 cm -3 ; and the A1 2 3 is about 50 A thick. The current-voltage characteristics at three different temperatures are shown in Fig. 48(a) where the negative resistance occurs between 0.6 to 0.8 volt. The corresponding conductance curve at 4.2°K is shown in Fig. 48(b). Reasonable agreement is obtained between the experimental result (solid line) and the prediction (dotted line) based on the WKB approximation. 492 Metal-lnsulator-Semiconductor Diodes p -TYPE Si(.0006n-cm) d • 20A -1.2 -1.0 -0.8 -0.6 -0.4 -0.2 0.2 0.4 0.6 0.8 1.0 1.2 V ( VOLTS ) (a) Fig. 47 (a) MIS capacitance-voltage curves measured at different frequencies. The insert shows the equivalent circuits for tunnel MIS diode. 6 CARRIER TRANSPORT IN INSULATING FILMS In an ideal MIS diode it is assumed that the conductance of the insulating film is zero. Real insulators, however, show carrier conduction at a field of 10 6 V/cm or lower. To estimate the electric field in an insulator under biasing conditions, we obtain from Eqs. (16) and (24) that '•-'■© (69) where <f f and S s are the electric fields in the insulator and the semi- conductor respectively, and s t and e s are the corresponding permittivities. For a Si-Si0 2 system the field for silicon at avalanche breakdown 49 is about 5 x 10 5 V/cm; the corresponding field in the insulator is then 3 times larger 6 Carrier Transport in Insulating Films 493 10- 7 - JOCK I25*K 0.5lk /'oxidation) is \ \i II Jr { STEAM a 1 ^/annealing J/f IN H 2 ) ^v£ // — i 1 1 i i 1 ! 1 1 1 •1.2 -1.0 -0 8 -0.6-04-0.2 0.2 0.4 0.8 0.8 1.0 1.2 V (VOLTS) (b) Fig. 47 (b) MIS conductance-voltage curves measured at different frequencies. (Ref. 53.) ( £ si/ £ sio 2 = 12/3.9), i.e., about 1.5 x 10 6 V/cm. At this field the electron and hole conductions in Si0 2 are negligible even at elevated temperatures; however, mobile ions such as sodium will transport through the insulator and give rise to device instability and the hysteresis effect. 8 To improve the device stability and to fully develop the potential usefulness of MIS structures, we should investigate other systems than the Si-Si0 2 . Also, we should study the composite system, which combines several of them to form a new system incorporating the desirable features of each. 494 Metal-lnsulator-Semiconductor Diodes 1 | 300*K 77'K 4. 2K 0.4 A/-A^ 2 3 -SnTe u 1 0.2 0.4 0.6 V (VOLTS) (o) 1.0 Fig. 48 (a) Tunnel MIS diode (AI-AI 2 3 -SnTe) l-V characteristics at three temperatures. (b) The conductance curve at 4.2°K. Solid line is for experimental result. Dotted line from theoretical WKB approximation. (After Esaki and Stiles, Ref. 54.) 6 Carrier Transport in Insulating Films 495 The composite systems that have been studied include the metal-(Al 2 3 - Si0 2 )-Si system, 55 and the metal-(phospho-silicate glass-Si0 2 )-Si system. 56,57 It has been found that the former gives a voltage shift in the C-V curve toward positive voltage. This implies that a p-type semiconductor surface can be inverted at zero or negative bias voltages. The latter system, the phospho- silicate glass which is Si0 2 rich in P 2 O s , can be formed on the outside of a Si0 2 layer during the phosphorus diffusion process and can substantially reduce the instability of a contaminated MIS diode, since the sodium has much greater solubility in glass than in Si0 2 . Another composite system is the metal-Si 3 N 4 -Si0 2 -Si system. 58 The silicon nitride films are found to have much smaller diffusion coefficients of various impurities, 59 particularly sodium, in comparison with Si0 2 films. It is thus expected that this system will have the desired features of low surface states because of the clean Si0 2 -Si interface, and will be immune to ion drift because of the outer Si 3 N 4 film. In the visible range, Si 3 N 4 films have a slightly larger dielectric constant than the Si0 2 films. A color comparison 60 of Si0 2 and Si 3 N 4 films is listed in Table 9.3 which also shows film thickness. TABLE 9.3 COLOR COMPARISON OF SiQ 2 AND Si 3 N 4 FILMS Si0 2 Thickness Range* Si 3 N 4 Thickness Range Order Color (/zm) (fx.m) Silicon 0-0.027 0-0.020 Brown 0.027-0.053 0.020-0.040 Golden Brown 0.053-0.073 0.040-0.055 Red 0.073-0.097 0.055-0.073 Deep Blue 0.097-0.010 0.073-0.077 1st Blue 0.10-0.12 0.077-0.093 Pale Blue 0.12-0.13 0.093-0.10 Very Pale Blue 0.13-0.15 0.10-0.11 Silicon 0.15-0.16 0.11-0.12 Light Yellow 0.16-0.17 0.12-0.13 Yellow 0.17-0.20 0.13-0.15 Orange Red 0.20-0.24 0.15-0.18 1st Red 0.24-0.25 0.18-0.19 Dark Red 0.25-0.28 0.19-0.21 2nd Blue 0.28-0.31 0.21-0.23 Blue-Green 0.31-0.33 0.23-0.25 Light Green 0.33-0.37 0.25-0.28 Orange Yellow 0.37-0.40 0.28-0.30 '2nd Red 0.40-0.44 0.30-0.33 * The ratio of refractive inde> /7(Si 3 N 4 ) 1.97 «(Si0 2 ) ~~ 1.48 = 1.33 Si0 2 thickness Si 3 N 4 thickness 496 Metal-lnsulator-Semiconductor Diodes The basic conduction processes in insulators are summarized in Table 9.4. The Schottky emission process is similar to that discussed previously in Chapter 8, where thermionic emissions across the metal-insulator interface or the insulator-semiconductor interface are responsible for the carrier transport. A plot of \n(J/T 2 ) versus IJT should yield a straight line with a slope determined by the permittivity e t of the insulator. The Frenkel-Poole emission 658 is due to field-enhanced thermal excitation of trapped electrons into the conduction band. For trap states with coulomb potentials, the expression is virtually identical to that of the Schottky emission. The barrier height, however, is the depth of the trap potential well, and the quantity y/q/nEi is larger than in the case of Schottky emission by a factor of 2 since the barrier lowering is twice as large due to the immobility of the positive charge. The tunnel emission is due to field ionization of trapped electrons into the conduction band or due to electrons tunneling from the metal Fermi energy into the insulator conduction band. The tunnel emission has the strongest dependence on the applied voltage but is essentially independent of the temperature. The space-charge-limited current results from carrier TABLE 9.4 BASIC CONDUCTION PROCESSES IN INSULATORS Process Expression! Voltage and Temperature Dependence^ Schottky Emission J=A*T 2 <zxp -q{<l>B-^q<$ '/47r£ ( ) kT ~r 2 exp(+ aVVlT-q(<f> B /kT) Frenkel-Poole Emission / ~ & exp — kT ~ Vexp(+2aVv/T-q(<f> B lkT) Tunnel or Field Emission / ~ «f 2 exp 4V2^*(^ B ) 3 ' 2 " ~F 2 exp(-6/K) Space-Charge- Limited Se if j,V 2 9d 3 ~V 2 Ohmic J ~ £ exp(- AE ae /kT) ~ Fexp(- c/T) Ionic Conduction J ~ -exp(-AEjkT) ~ ^exp(-d'/T) t A* = effective Richardson constant, <f> B = barrier height, £ = electric field, e, = insulator dynamic permittivity, m* = effective mass, d= insulator thickness, hE ae = activation energy of electrons, AE ai = activation energy of ions, and a = V ^/(47T£ t d). X V = Sd. Positive constants independent of V or T are b, c, and d'. 6 Carrier Transport in Insulating Films 497 injected into the insulator where there is no compensating charge present. The current for the unipolar trap-free case is proportional to the square of the applied voltage. At low voltage and high temperatures, current is carried by thermally excited electrons hopping from one isolated state to the next. This mechanism yields an ohmic characteristic exponentially dependent on tem- perature. The ionic conduction is similar to a diffusion process. Generally, the dc ionic conductivity decreases during the time the electric field is applied, since ions cannot be readily injected into or extracted from the insulator. After an initial current flow, positive and negative space charges will build up near the metal-insulator and the semiconductor-insulator interfaces. This causes a distortion of the potential distribution. When the applied field is removed, large internal fields remain which cause some, but not all, of the ions to flow back toward their equilibrium position and hysteresis effects result. ■^Ulo'Vv/cm) (a) Fig. 49 (a) Current-voltage characteristics of Au-Si 3 N 4 -Si diode at room temperature. 498 Metal-lnsulator-Semiconductor Diodes For a given insulator, each conduction process may dominate in certain temperature and voltage ranges. The processes are also not exactly indepen- dent of one another and should be carefully examined. For example, for the large space-charge effect, the tunneling characteristic is found to be very similar to the Schottky-type emission. 61 An example of the conduction processes for silicon nitride films 62 is shown in Fig. 49. The films are deposited on degenerate silicon substrate (0.0005 Q-cm n-type) by the process of reaction of SiCl 4 and NH 3 at 1000°C. An MIS diode is made by evaporation of Au onto the Si 3 N 4 film. Figure 49(a) shows In / versus \ji. The + (Au) curve is for the gold-electrode positive and the — (Au) is for the gold-electrode negative. It will be noted that the two curves are TCC) ISO 50 -50 -100 £ • 5.3 xio 6 v/cm Au -Si 3 N 4 - Si d • IIOOA J, (FRENKEL- POOLE CURRENT ) oJ»J l + J 2 + J 3 'TOTAL CURRENT DENSITY o Jj (TUNNELING COMPONENT) k J,(OHMIC COMPONENT) I I 5 6 I000/TCK" 1 ) (b) Fig. 49 (b) Current versus 1/T of an Au-Si 3 N 4 -Si diode at afield of 5.3 x 10 6 V/cm. The total current density is separated into three components: j^ (Frenkel-Poole current), J 2 (tunnel current), and J 3 (ohmic conduction current). (Ref. 62.) 6 Carrier Transport in Insulating Films 499 virtually identical. The slight difference (especially at low fields) is believed to be mainly due to the difference in barrier heights at the gold-nitride and nitride-silicon interfaces. One also notices that there are two distinct regions. In high electric fields the current varies exponentially with the square root of the field; 62, 63 at low fields, the characteristic is ohmic. It has been found that at room temperature for a given field, the characteristics of current density versus field are essentially independent of the film thickness, the device area, the electrode materials, and the polarity of the electrodes. These results strongly suggest that the current is bulk-controlled rather than electrode- controlled as in Schottky-barrier diodes. At low temperatures the current- voltage characteristic becomes nearly independent of the temperature. 10-5 4 fix 5 io 6 v/cm) 6 7 8 9 10 \ Si 3 N 4 i ! 1 r ^ i K) ° I T «373*K ^298° 10 ' = IO" 8 - H28* 1 323 y 10 -* - s ,0-10 io-" 1 / °/ / °/ / o / g 9\ J i i I i 1.8 2.0 2.2 2.4 2.6 VF(xl0 3 ^cTff) (0) 2.8 3.0 3.2 Fig. 50 (a) Current-voltage curves of a typical nitride film 1100A thick and 0.2 mm in diameter at four different ambient temperatures. 500 Metal-Insulator-Semiconductor Diodes Figure 49(b) shows plots of the current versus 1/rfor a field of 5.3 MV/cm. One notes that the conduction current J in the nitride films can be separated into three components: J u J 2 , and J 3 . The current J t is due to the Frenkel- Poole emission which dominates at high temperatures and high fields. The dynamic dielectric constant, £;/e , obtained from the slopes of Fig. 49 is found to be 5.5, in agreement with the optical measurement. 60 The current J 2 is due to tunnel emission of trapped electrons into the conductance band, which dominates at low temperatures and high fields. The current J 3 is the ohmic component which contributes at low fields and moderate temperatures. Another important parameter in the insulator is the maximum dielectric strength. Figure 50(a) shows I-V curves of a typical nitride film 1100 A thick and 0.2 mm in diameter at four different ambient temperatures. 62 As the ramp voltage increases, the conduction current increases accordingly. Eventually the voltage reaches a maximum value beyond which it decreases o.t> 3.4 3.2 -^ E o > 3.0 •> o M l" 2.6 2.4 = - i i i , 100 200 300 400 500 TCK) (b) Fig. 50 (b) Square root of maximum dielectric strength versus temperature of silicon nitride films. (Ref. 62.) References 501 while the current continues to increase and destructive breakdown occurs. The above maximum voltage normalized to the film thickness is defined as the maximum dielectric strength. Based on the assumption that at high temperatures, the maximum dielectric strength, S m , is limited by the thermal instability of the structure, the value of S m can be determined by equating the Joule heat with that lost by heat transfer, and is given by 62 «(?) .[0 B -CT] 2 (70) where T is the temperature, <j) B the barrier height, and C a slowly varying function of T. At low temperatures, an intrinsic dielectric strength is expected and S m approaches a constant value. 64 Figure 50(b) shows the plot of $H 2 versus T. It will be noted that at high temperatures $ m varies approximately as Eq. (70) ; and at low temperatures S m becomes independent of temperature. Similar results have been obtained in other insulating films. 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Jund, "Influence of Illumination on MIS Capacitance in the Strong Inversion Region," IEEE Trans, on Electron Devices, ED-14, 111 (1967). 42. K. H. Zaininger, "Electron Bombardment of MOS Capacitors," Appl. Phys. Letters, 8, 140 (1966). 43. D. R. Collins and C. T. Sah, "Effects of X-Ray Irradiation on the Characteristics of MOS Structures," Appl. Phys. Letters, 8, 124 (1966). 44. E. H. Snow, A. S. Grove and D. J. Fitzgerald, "Effect of Ionization Radiation on Oxidized Silicon Surfaces and Planar Devices," Proc. IEEE, 55, 1168 (1967). 45. J. P. Mitchell, "Radiation-Induced Space-Charge Buildup in MOS Structures," IEEE Trans, on Electron Devices, ED-14, 764 (1967). 46. D. P. Howson, B. Owen, and G. T. Wright, "The Space-Charge Varactor," Solid State Electron., 8, 913 (1965). 47. A. Goetzberger and E. H. Nicollian, "Transient Voltage Breakdown Due to Avalanche in MIS Capacitors," Appl. Phys. Letters, 9, 444 (1966). 48. A. Goetzberger and E. H. Nicollian, "MOS Avalanche and Tunneling Effects in Silicon Surfaces," J. Appl. Phys., 38, 4582 (1967). 49. S. M. Sze and G. Gibbons, "Effect of Junction Curvature on Breakdown Voltage in Semiconductors," Solid State Electron., 9, 831 (1966). 50. S. M. Sze and G. Gibbons, "Avalanche Breakdown Voltages in Abrupt and Linearly Graded Ge, Si, GaAs, and GaP p-n Junctions," Appl. Phys. Letters, 8, 111 (1966). 504 Metal-lnsulator-Semiconductor Diodes 51. C. N. Berglund, "Electroluminescence Using GaAs MIS Structures," Appl. Phys. Letters, 9, 441 (1966). 52. R. J. Phelan, Jr., and J. O. Dimmock, "InSb MOS Infrared Detector," Appl. Phys. Letters, 10, 55 (1967). 53. W. E. Dahlke and S. M. Sze, "Tunneling in Metal-Oxide-Silicon Structures," Solid State Electron., 10, 865 (1967). 54. L. Esaki and P. J. Stiles, "New Type of Negative Resistance in Barrier Tunneling," Phys. Rev. Letters, 16, 1108 (1966). 55. G. T. Cheney, R. M. Jacobs, H. W. Korb, H. E. Nigh, and J. Stack, "Al 2 3 -Si0 2 IGFET Integrated Circuits," paper 2.2, IEEE Device Meeting, Washington, D.C. (Oct. 18-21, 1967). 56. D. R. Kerr, J. S. Logan, P. J. Burkhardt, and W. A. Pliskin," Stabilization of Si0 2 Passivation Layers with P 2 5 ," IBM J., 8, 376 (1964). 57. E. H. Snow and B. E. Deal, "Polarization Phenomena and Other Properties of Phos- phosilicate Glass Films on Silicon," J. Elect. Soc, 113, 2631 (1966). 58. T. L. Chu, J. R. Szedon, and C. H. Lee, "The Preparation and C-V Characteristics of Si-Si 3 N 4 and Si-Si0 2 -Si 3 N 4 Structure," Solid State Electron., 10, 897 (1967). 59. J. V. Dalton, "Sodium Drift and Diffusion in Silicon Nitride Films," J. Electrochem. Soc, 113, 1650 (1966). 60. F. Reizman and W. Van Gelder, "Optical Thickness Measurement of Si0 2 -Si 3 N 4 Films on Silicon," Solid State Electron., 10, 625 (1967). 61. J. J. O'Dwyer, "Current- Voltage Characteristics of Dielectric Films," J. Appl. Phys., 37, 599 (1966). 62. S. M. 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INTRODUCTION SURFACE-SPACE-CHARGE REGION UNDER NONEQUILIBRIUM CONDITION CHANNEL CONDUCTANCE BASIC DEVICE CHARACTERISTICS GENERAL CHARACTERISTICS IGFET WITH SCHOTTKY BARRIER CONTACTS FOR SOURCE AND DRAIN IGFET WITH A FLOATING GATE —A MEMORY DEVICE SURFACE FIELD EFFECTS ON p-n JUNCTIONS AND METAL-SEMICONDUCTOR DEVICES 10 IGFET and Related Surface Field Effects I INTRODUCTION The word IGFET stands for the Tnsulated-Gate iaeld-isffect Transistor. Since the gate structures for most IGFET are of the MOS type, this device has also been called MOSFET (metal-oxide-semiconductor field-effect transis- tor) or MOST (metal-oxide-semiconductor transistor). The principle of the surface field-effect transistor was first demonstrated back in the early 1930's when Lilienfeld 1 and Heil 2 proposed using the surface field effect to achieve a solid-state amplifier. It was subsequently studied by Shockley and Pearsort 3 in the late 1940's. In 1960 Kahng and Attala 4 proposed and fabricated the first IGFET using a thermally oxidized silicon structure. The basic device characteristics have been subsequently studied by Ihantola and Moll, 5 ' 6 Sah, 7 and Hofstein and Heiman. 8 The technology and applications of IGFET have been reviewed recently by Wallmark and Johnson. 9 Since the current in an IGFET is transported by carriers of one polarity only (e.g., electrons in an ^-channel device), the IGFET is usually referred to as a unipolar device in contrast to the p-n junction transistor which is a bipolar device involving both types of carriers. The IGFET is a member of 505 506 IGFET and Related Surface Field Effects the family of unipolar transistors. The first one, the junction field-effect transistor as proposed by Shockley 10 in 1952, has already been considered in Chapter 7. We shall consider in the next chapter the thin-film-type field-effect transistor as proposed by Weimer 11 in 1961. The behaviors of the various unipolar transistors are basically quite similar. The IGFET, however, is particularly important because of its application in linear circuits and digital circuits. 9 Although the IGFET has been made on various semiconductors such as Ge, 12 Si, 13 and GaAs 14 and uses various insulators such as Si0 2 , Si 3 N 4 , and A1 2 3 , the most important system is the Si-Si0 2 combination. Hence most of the experimental results in this chapter are obtained from the Si-Si0 2 system. In this chapter we shall first consider the MIS device under a nonequilibrium condition in Section 2. This serves as a foundation to an understanding of the IGFET operation. The channel conductance and the basic device characteris- tics are considered in Sections 3 and 4 respectively. The general device characteristics such as the environmental effects and physical limitations are discussed in Section 5. Section 6 considers an IGFET using Schottky barrier contacts for source and drain. At room temperature the device characteristics are comparable to conventional IGFET's with similar electrode geometry. At lower temperatures the current transport is by the tunneling of carriers from the metal across the Schottky barrier to the semiconductor inversion layer. Section 7 presents an interesting memory device which is obtained by adding a floating gate to a regular IGFET. Finally, the surface field effects on junction breakdown and reverse current are considered in Section 8. 2 SURFACE-SPACE-CHARGE REGION UNDER NON- EQUILIBRIUM CONDITION The basic structure of an insulated-gate field-effect transistor (IGFET) is illustrated in Fig. 1. This device consists of a/?-type semiconductor substrate into which two n + regions, the source and the drain, are formed (e.g., by diffusion or by ion-implantation). The metal contact on the insulator is called the gate electrode. When there is no voltage applied to the gate, the source-to- drain electrodes correspond to two p-n junctions connected back to back. The only current that can flow from the source to the drain is the reverse leakage current (or saturation current).* When a sufficiently large positive bias is applied to the gate such that a surface inversion layer (or channel) is formed between the two n + regions, the source and the drain are thus connected by * This is the n-channel enhancement-type IGFET. Other types will be discussed later. 2 Surface-Space-Charge Region Under Nonequilibrium Condition 507 INSULATOR - SOURCE /tFI Fig. 1 Schematic diagram of an insulated-gate field-effect transistor. The important para- meters are the channel length (L), the channel width (Z), and the insulator thickness (d). (After Kahng and Atalla, Ref. 4.) a conducting-surface n channel through which a large current can flow. The conductance of this channel can be modulated by varying the gate voltage. One may readily extend the discussion to a /^-channel device by exchanging p for n and reversing the polarity of the voltages. The important parameters of an IGFET are the channel length L, the channel width Z, the insulator thickness d (with permittivity e f ), and the channel conductance. Before we calculate the channel conductance, we must consider the gate MIS structure under nonequilibrium conditions, i.e., the situation when a voltage is applied across the source-drain contacts, and the imref of the minority carriers (electrons, in the present case) is lowered from the equili- brium Fermi level. In order to show more clearly the band bending across the 508 IGFET and Related Surface Field Effects n + p junction under the nonequilibrium condition, the IGFET in Fig. 1 is turned 90 degrees and is shown in Fig. 2(a). The portion of the surface en- closed by the dashed frame in Fig. 2(a) is shown in Fig. 2(b). The idealized junction and the energy band diagrams pertaining to the nonequilibrium conditions (i.e., when the applied voltage V D ^ 0) are illus- trated in Fig. 3. In this representation the energy band is shown as a function of the two directions x and y. When no gate voltage (V G ) is applied, the only variation of the band is in the y direction and is due to the applied reverse bias on the drain. In Fig. 3(b) a positive gate voltage is applied, but it is not large enough to invert the surface of the p region. The gate voltage required for inversion is larger than in the zero junction bias case, in which i/f s (inv) ~ Ity B ■ This is because the applied reverse bias lowers the imref of the minority carriers (electrons), and an inversion layer can be formed only when the potential at the surface crosses over the imref of the minority carrier. Thus the Fig. 2 (a) Same as in Fig. 1. The IGFET is turned 90°. (b) The portion of the surface enclosed by the dashed frame in (a). 2 Surface-Space-Charge Region Under Nonequilibrium Condition 509 (a) NO SURFACE FIELD (b) DEPLETION *ssv„+ (c) INVERSION Fig. 3 The idealized junction and energy band diagrams under nonequilibrium conditions. (After Grove and Fitzgerald, Ref. 15.) 510 IGFET and Related Surface Field Effects band bending at the surface in Fig. 3(b) is still insufficient for inversion, and the surface is only depleted. Figure 3(c) illustrates the condition at which the gate voltage is large enough to bring the conduction band sufficiently near the imref for electrons to cause an inversion at the surface. The surface potential ij/ s at the onset of strong inversion is given, to a good approximation, by iA s (inv)~ V D + 2ij/ B . (1) As in the equilibrium case discussed in the preceding chapter, the surface depletion region reaches a maximum width W m at inversion. The width is now a function of the bias V D . Figure 4 shows a comparison of the charge distribu- tion and energy band variation of an inverted p region for (a) the equilibrium case and (b) the nonequilibrium case. The characteristic of the surface-space charge under the nonequilibrium condition 15 can be derived similarly to that in Chapter 9. The two assumptions >(x) 1 Wpri ^ ON Ob (a) (b) Fig. 4 Comparison of the charge distribution and energy band variation of an inverted p region for (a) the equilibrium case and (b) the nonequilibrium case. (After Grove and Fitzgerald, Ref. 15.) 2 Surface-Space-Charge Region Under Nonequilibrium Condition 511 are that (1) the imref for the majority carriers of the substrate does not vary with distance from the bulk to the surface and (2) the imref for the minority carriers of the substrate is separated by the applied junction bias V D from the imref for the majority carriers, i.e., E Fp = E Fn + qV D for a p substrate. The first assumption introduces little error when the surface is inverted, since majority carriers are then only a negligible part of the surface-space charge ; the second assumption is correct under the inversion condition, since the only condition under which minority carriers are an important part of the surface- space-charge region is that when the surface is inverted. Based on the above assumptions, the one-dimensional Poisson equation for the surface-space-charge region is given by d 2 \l/ q where N D + -N A =n po -p po P = P P0 e-" } (3) n = npoe P*-Pv^ p = qlkT. Following the same approach as in Chapter 9, we obtain dx qL D \ p p J Q s = s s £ s =+^f(m s ,V d M (5) qL D \ p p j and where and L n = 2fc7X IPpo 1 2 \ 1/2 (6a) (6b) The charge due to minority carriers within the inversion layer is given by c Xi , , J f* B "0/0 # 6J = q n(x) dx = q -jj^- J o J * s d\J/ldx 512 IGFET and Related Surface Field Effects where x t denotes the point at which the intrinsic Fermi level intersects the imref for electrons. Under strong inversion the fourth term in Eq. (6a) dominates, and we obtain f(m,V d ,^)cz PiW"^. (8) V PpoJ V Ppo The potential is given from Eq. (4) : dx qL D \j\p p0 ) Integrating Eq. (9), we have X = *'po' (10) where the boundary condition (x = 0, x// = i// s ) is applied. The quantity x t is then given by 2e kT x t ^ /_!_exp(-W B ). (10a) V n po q 2 Comparing the above results with those derived in Chapter 9, we note the main difference is that, under a strong inversion condition, the surface poten- tial iA s (inv) is approximately given by (V D + 2ij/ B ) for the nonequilibrium case and by 2\j/ B for the equilibrium case. The charge per unit area after strong inversion is then given by Qs = Qn + Qb (11) Qb = ~qN A W m = -s/2qN A s s (V D + 2^ B ). (12) 3 CHANNEL CONDUCTANCE The conductivity of a semiconductor in a one-dimensional case is given by a(x) = q[p(x)n p (x) + w(*K(x)] (13) where n p (x) and fi„(x) are the hole and electron mobilities, respectively, and p(x) and n(x) are the hole and electron concentrations respectively. For n-channel devices under normal operating conditions [n(x) > /?(*)] the con- ductivity of the channel can be approximated by <t(x) ~ qn{x)n n (x). (13a) 3 Channel Conductance 513 The channel conductance is then given by Z r Xi Z r Xi g = - (t(x) dx = -q fi n (x)n(x) dx. (14) LJq L >> From Eqs. (7) and (14) we have for the channel conductance 9=1^\Q n \ (15) where the effective mobility fi eft is given by q n n (x)n(x) dx *'" s -^Te] ■ (16) The charge per unit area Q„ that results from electrons within the inversion layer can be calculated as a function of the total charge per unit area induced in the semiconductor surface Q s , (Q n = Q s - Q B ). With known values of Q„ and g at a given gate voltage, the effective mobility can be readily determined from Eq. (15). The experimental effective mobilities of electrons and holes in inversion layers on oxidized silicon are shown in Fig. 5(a) and (b) as a function of the total charge per unit area induced in the semiconductor. 16 We note that up to approximately \QJq\ = 10 12 cm -2 (corresponding to S s = Q s /e s = 10 5 V/cm), the mobility is practically constant (j* const ). Beyond this point the mobility decreases with increasing field. The values of the mobilities are a factor of approximately two lower than the corresponding bulk mobilities. This is due to the effect of the surface scattering and the effect of the redistribution of impurities during thermal oxidation which can cause the impurity concentra- tion near the oxide-silicon interface to deviate from that in the bulk. The surface-scattering effect was first considered by Schrieffer 17 and has recently been reviewed by Frankl. 18 The result for a constant surface field is given by — = 1 - exp(a 2 )erfc(a) (17) ^bulk where 1 1 IlkT a = <^s /^bulk It is thus expected that, as the surface field S s increases, the values of both a and ju eff will decrease. Figure 5(c) shows a comparison between typical 514 IGFET and Related Surface Field Effects i i i i i 1 1 1 1 ELECTRONS I I I I I III "I 1 — I I I I I LI K. _i ■ i 1 1 ii i 10" |Q s /q|(cm *) (a) I0~ 10 1.0 1 1 Mini I I I I I I ll| I I I I 1 I 1 1. : HOLES l ~ AAAAAAAAA 1 1 1 1 1 1 1 1 i i i > ■"**> ii'' )Q s /q|(cm- 2 ) (b) SPECULAR ^h T 1 — I M I NI 1 I I I I I I L| ..HOLES # <^ 8 0.1 - o HOLES DIFFUSE ' ' i i i t il I I — I M I III ' i x i i i ii | Q s /q|(cm" ) (c) -2, 10' Fig. 5 (a) Effective channel mobility of electrons as a function of total surface charges. (b) Effective channel mobility of holes as a function of total surface charges. (c) Comparison between the experimental channel mobilities and the theoretical curves. (After Leistiko et al., Ref. 16.) experimental inversion layer mobilities and the theoretical curves calculated from Eq. (17) using n const as the bulk mobility £t b uik • The result indicates that the carriers are essentially specularly reflected at the surface. And the diffuse surface-scattering process has significant effect only for large surface fields. Although the general behaviors are quite similar, it appears that the redistri- bution of the impurities is the more important effect in the Si-Si0 2 system. 4 Basic Device Characteristics 515 The dependence of the effective mobility on temperature 16 is shown in Fig. 6. It appears that both electron and hole mobilities in inversion layers have a T~ 3/2 power dependence at higher temperatures. The behavior is indicative of a scattering mechanism similar to lattice scattering. 4 BASIC DEVICE CHARACTERISTICS We shall first present a qualitative discussion of the device operation principle. Let us consider first that a voltage is applied to the gate to cause an inversion at the semiconductor surface, Fig. 7(a). If a small drain voltage is applied, a current will flow from the source to the drain through the conduct- ing channel. Thus the channel acts as a resistance, and the drain current I D is proportional to the drain voltage V D . This is the linear region. As the drain voltage increases, it eventually reaches a point at which the channel depth x t at y = L is reduced to zero, Fig. 7(b). This is the pinch-off point. Beyond the pinch-off point the drain current remains essentially the same. This is because, for V D > V D sat , the depletion region near the drain will increase and the point marked by Y will move toward the source. The voltage - 1 1 1 1 1 1 VI 1 iii i n a\ V /SLOPE ~T~% I0 3 - - : - - \K - - • ▲ ELECTRONS tkoX. - 10 2 OA HOLES - ~ - \ _ 1 1 1 i i 1 1 1 i 1 1 10 10* TCK) Fig. 6 Dependence of the effective mobilities on temperature. (After Leistiko et al., Ref. 16.) 516 IGFET and Related Surface Field Effects Kl>v (Q) LINEAR REGION N>v T D* V DSAT (b) ONSET OF SATURATION v 6 |>v T V D >V D SAT (C) BEYOND SATURATION Fig. 7 (a) IGFET operated in linear region (low drain voltage). (b) IGFET operated at onset of saturation. The point Y indicates the pinch-off point. (c) IGFET operated beyond saturation and the effective channel length reduced to U. 4 Basic Device Characteristics 517 at Y, however, remains the same, V Dsat . Thus the number of carriers arriving at the point Y from the source, and hence the current flowing from source to drain, will remain the same. Carrier injection from point Y into the drain depletion region is quite similar to the case of carrier injection from an emitter-base junction to the base-collector depletion region of a junction transistor. We shall now derive the basic IGFET characteristics under the following idealized conditions: (1) the gate MIS structure corresponds to an ideal MIS diode as defined in Chapter 9, i.e., no surface states, no surface charge, no work function difference, etc., (2) the carrier mobility in the inversion layer is constant, (3) the reverse leakage current is negligibly small, (4) only the drift current will be considered, and (5) the transverse field (<f x in x direction) in the channel is much larger than the longitudinal field {$ y in y direction). The last condition corresponds to the so-called gradual channel approximation. Under the above idealized conditions the total charge induced in the semi- conductor per unit area Q s at a distance y from the source is given by Q s (y) = l-v G + My)lc i (18) where C t = s t /d is the capacitance per unit area. The charge in the inversion layer is given by Q n (y) = Q s (y) - Q B (y) ^-LVa-Uy^c.-QM. (19) The surface potential ^i s (y) at inversion can be approximated by 2if/ B + V(y) where V(y) is the reverse bias between the point y and the source electrode (which is assumed to be grounded, see Fig. 8). The charge within the surface depletion region Q B (y) is given previously as Q B (y) =~qN A W m =- ^28 s qN A [_V(y) + 2il/ B ]. (20) Substitution of Eq. (20) into Eq. (19) yields Q n (y) =-[V G - V(y) - 2^ B ]C £ + y/2B M qN A [y(y) + 24f B -]. (21) The channel resistance of an elemental section (dy) is given by dy dy dR=— = . (22) gL Zn n \Q n {y)\ ™ And the voltage drop across this elemental section is given by dV = I D dR= lvdy (23) Zn„\Q n (y)\ where I D is the drain current and is a constant independent of y. Substitution 518 IGFET and Related Surface Field Effects SOURCE Fig. 8 Detailed view of the channel. The drain current is l D which is a constant. At a distance y measured from the source (which is grounded) the charge densities per unit area in an incremental element dy are Q„(y) and Q B (y) f° r tne inversion layer and the depletion layer respectively. of Eq. (21) into Eq. (23) and integration from the source (y = 0, V = 0) to the drain (y = L, V = V D ) yield h = f h c{(v - 2^ B -^)v D -\ ^|p L(V D + 2f B )^ - (2fc :) 3/2 ] (24) for the present idealized case (no surface state, surface charge, etc.). Equation (24) predicts that for a given V G the drain current will first increase linearly with drain voltage (the linear region), then gradually will level off, approaching a saturated value (the saturation region). The basic output characteristic of an idealized IGFET is shown in Fig. 9. The dotted line 4 Basic Device Characteristics 519 indicates the locus of the drain voltage (V Dsat ) at which the current reaches a maximum value. We shall now consider the above mentioned two regions. For the case of small V D , Eq. (24) reduces to Z (V G -V T )V D - v D 2 (25) or Id « (f) /*„ Ci(V - V T ) V D for V D < {V G - V T ) (25a) where V T is called the turn-on or threshold voltage and is given by y/2* a qN A W B ) V T = 2xj/ B + (26) =i-°. 20 10 1 1 i y\ (V G _V T ) = I0 VOLTS 1 1 9 ' / / / SATL R JRATIO EGION N / 8 s 1 1 1 7 **l 1 f 6 h ^ LOC ;us op Vdsat 1 5 1 / 4 s / 3 **/ 2 e£? 1 6 8 10 12 V D (VOLTS) 14 16 18 Fig. 9 Idealized output characteristics (/ D vs. V D ) of an IGFET. The dotted line indicates the locus of the saturation drain voltage (V Dsat ). For V D > V Dsat the drain current is constant. 520 IGFET and Related Surface Field Effects The calculated values of V T as a function of semiconductor doping density and insulator thickness are shown in Fig. 10 for the Si-Si0 2 system. Since for Vd^CVg— V t ), I d is proportional to V D , this is the linear region. In this region, channel conductance g D and transconductance g m are given as _ dI D 9D = dV D Va = const = l» n C i (V G -V T ) (27a) 9m ~ dV G = jV»C t V D . (27b) Vd = const ■" When the drain voltage is increased to a point such that the charge in the inversion layer Q(y) at y = L becomes zero, the number of mobile electrons at the drain experiences a drastic fall-off. This point, called the pinch-off, is analogous to the junction field-effect transistor. The drain voltage and the drain current at this point are designated as V Dsai and I Dsat respectively. Beyond the pinch-off point we have the saturation region. The value of Vd sat is obtained from Eq. (21) under the condition Q„(L) = 0: V Dnt =Vg- Wb + K\\ - Vl + 2V G /K 2 ) (28) where K = ■J& s qN A IC i . The saturation current I DstLt can be obtained by sub- stitution of Eq. (28) into Eq. (24): j _ ZfAnCj 2 1 Dsnt ~ f.J sum \^ y ) where VLm = E(*Wt + Wb? + V G (V Dsat + 2xj, B ) - 12ij, B (V G -ifr B - fXV^S- (29a) For low substrate doping and a thin insulator layer, K <£ 1 , and the last term of Eq. (28) may be approximated by *j2e s qN A V G /Ci , and we obtain V Dsat ^V G - V T ' (30) and where /Dsat * ^ A. Wo ~ V T ') 2 = ^nC t V^ (31) V T > s 2ilf B + ^ 2s ^ Vg ^ 2^ B + KjlV G . (31a) If K < 1, we obtain V T « V T ' « 2\j/ B . (S110A) 521 522 IGFET and Related Surface Field Effects The transconductance in the saturation region is given by 9m = din dVa Vr> = const = l»nC i (V G -V T '). (32) The transfer characteristics, 7 I D versus V G with V D as a parameter for an n-channel IGFET as obtained from Eq. (25), are shown in Fig. 11(a). They are straight lines below saturation when the channel is not pinched off and the gate voltage satisfies V G — V T > V D . The intercepts of these straight lines are given by V G - V T = V D /2. Between V G - V T = and V G - V T = V D , the drain current follows the saturation current locus given by Eq. (31). Figure 11(b) shows the transconductance versus the drain voltage with the gate voltage as a parameter. It is evident that below saturation V D < V Dsat , the transconductance is proportional to the drain voltage but independent of the gate voltage Eq. (27b). Beyond saturation V D > V Dsat the transconductance is independent of the drain voltage but is proportional to the gate voltage Eq. (32). A similar representation with the drain and gate voltage inter- changed is shown in Fig. 11(c). It is also of interest to note that for 40 m° 20 TRANSF ER CHARACT ERISTICS 8 -*/j %// \ 1st / "" /^ — "2 t * — l — i— / / / / i i -— -~~v^ 1 VOLT (V G -V T ) (VOLTS) (a) Fig. 11 (a) Idealized transfer characteristics (/ D versus V G ) of an IGFET. Fig. 11 (b) Transconductance versus drain voltage with gate voltage as a parameter. =*-■«». 1 V D = 10 VOLTS 9 8 7 6 5 4 3 2 / 1 4 6 8 V G -V T ( VOLTS) (O Fig. 11 (c) Transconductance versus gate voltage with drain voltage as a parameter. (After Sah, Ref. 7.) 523 524 IGFET and Related Surface Field Effects K (= yJsgqNjJCt) < 1, the channel conductance g D in the linear region Eq. (27a) is equal to the transconductance g m in the saturation region Eq. (32). 5 GENERAL CHARACTERISTICS (1) Current-Voltage Characteristics In the last section we have made many assumptions in order to bring out the most important characteristics of the IGFET. We shall now extend the con- sideration to include the effects due to surface charges, diffusion currents, etc. The main effect of the fixed surface charges and the difference in the work functions is to cause a voltage shift corresponding to the flat-band voltage V FB . This in turn will cause a change in the threshold voltage V T , e.g., in the linear region voltage V T should be modified to V T = V FB + 2x1/ B + -* (a, x 6 Mj.w , y/*e s qN A ip B = \<Pms + -£T I + 2\\> B + £ • (33) To consider the effect due to the diffusion current component, we first present in Fig. 12 the three-dimensional band diagram of an «-channel IGFET. 19 Figure 12(b) shows the flat-band zero-bias (V D = V G = 0) equili- brium condition. The equilibrium condition under a gate bias which causes a surface inversion is shown in Fig. 12(c). The nonequilibrium condition under both drain and gate biases is shown in Fig. 12(d) where we note the separation of the imrefs of electrons and holes. The drain current density including both drift and diffusion components is given by J D (x, y) =qti„n£ y + qD„ V/i = -qD n n(x,y)^ F „ (34) where \J/ Fn is the electron imref measured from the bulk Fermi level. The total drain current is then 19 Id= J D (x,y)Zdx t j t\ J -r x d ^ dv < 34a > Li 1_<q Jr. J .1. I fl — \ *» f(W, V, M \ Ppj 5 General Characteristics 525 (o) SOURCE DRAIN (b) Fig. 12 Three-dimensional band diagram of an n-channel IGFET. (a) Device configuration. (b) Flat-band zero-bias (V D = V G = 0) equilibrium condition. where x t is the intrinsic point beyond which the electron concentration is negligible. The above result is still based on the gradual-channel approach, i.e., the longitudinal field S y is smaller than the transverse field $ x . The validity of this approach will be discussed later. The gate voltage V G is related to the surface potential i/f s by V G ' = V g ~V fb =-^ + ifr s s*kT /„, n„ n \ t qL D \ p po ) 2e,kT C. (35) 526 IGFET and Related Surface Field Effects (c) SOURCE DRAIN DEPLETION REGION (d) Fig. 12 (c) Equilibrium condition under a gate bias. (d) Nonequilibrium condition under both drain and gate biases. (After Pao and Sah, Ref. 19.) For a particular device, Eq. (34a) can be calculated numerically. The input data are : the bulk impurity concentration N A , the physical dimensions of the device, and the constant effective carrier mobility as discussed in Section 3. A typical result of the drain characteristics is shown in Fig. 13(a). It demon- strates the current saturation phenomena very well. The result is valid for the entire range of drain voltage from the linear region to the saturation region. 5 General Characteristics 527 The relative importance of the two components can be easily illustrated from the ratio Djdnldy) ^ (N A - p s ) H„ nS y n s where p s and n s are the carrier concentrations at the semiconductor surface. Near the source junction in the channel n s > N A and the diffusion current component can be neglected, while in the depletion region n s < N A so that the diffusion component must be taken into account. As discussed in Section 4, in the short-channel devices (< 10 /mi), the saturation current does not level off as illustrated in Fig. 13(a). This is due to the space-charge-region widening effect, which shortens the effective length of the channel. As shown in Fig. 7(c), this distance between the point Y and the drain contact edge can be given by the conventional formula for the depletion region of an n + p junction: L-L = j2e£V D - V Ds J/qN A . (37) NowX is effectively reduced to L'. From Eqs. (31) and (37) the current now is given by Z '\2 Id(V d > V Dsat ) = 2jjf*n CIV G - V T ') L-l2s s (V D -V Dssit )/qN A V /2 i Ds!,t (38) Because of the decrease of the effective channel length with increasing V D , the channel conductance g D in the saturation region 20 has a finite value and can be obtained from Eqs. (29) and (38) : _ dI D _ 1 9d — T7T — dV D r D Zfi n Cj 2sJqN A Vl vm t2 sum \2lLjv D - V Dsat - j2e s /qN A (V D - F Dsat )] where V* um corresponds to the terms in the [ ] in Eq. (29a). Under the condi- tion that we have a flat-band voltage shift, V FB , the value of V G should be replaced by V G ' = V G — V FB . Plots of V DssU versus V G for different bulk doping are shown in Fig. 13(b), and it is seen that, for a given V G , V Daat is smaller for larger bulk doping. In the limiting cases of an intrinsic semi- conductor, V Dsat = V G . For finite doping, the V Dsai versus V G curve has an offset along the V G axis ; the physical meaning of this is that, below this gate voltage, there is no channel formation and hence no transistor action. 528 IGFET and Related Surface Field Effects 3- 5 2- I - - 1 1 T I ■ i 1 1 _ - EXPERIMENTAL / - - - - )T 8 ^ 9% - .X>^ 6 ***^ 4 ' • ■ •• 2 2 3 4 5 6 7 8 Vo (VOLTS) (a) Fig. 13 (a) Theoretical (dots) and experimental (solid lines) output characteristics of a p-channel IGFET having d = 2000 A, N D = 4.6 x 10 14 cm" 3 , /x p = 256 cm 2 /volt-sec, and an area of 8.4 x 10-* cm 2 . - d= I500A INTRINSIC - /"' x =lo'Vcm~ 3 - ^^ITxIO 16 - / y ^-l I i i 8 10 12 14 16 18 20 V G (VOLTS) Fig. 13 (b) ^Dsat versus V G ' for various bulk doping of silicon IGFET. 5 General Characteristics 529 3 4 5 6 7 8 9 Vq (IN VOLTS) to Fig. 13 (c) Drain resistance in saturation versus V G ' at V D = 10 volts for different channel lengths and bulk dopings. Plots of r D versus V G ' at V D = 10 volts are shown in Fig. 13(c) for different channel lengths and bulk dopings. 20 For the theoretical curves the following values have been assumed: gate oxide thickness = 1500 A, dielectric constant of Si0 2 = 3.7, Z = 0.084 cm, and /i„ = 200 cm 2 /volt-sec. It is noticed from the curves that r D decreases with decreasing channel length L and bulk doping 530 IGFET and Related Surface Field Effects 1.5 .0 - o 0.5 - 1 i i 1 1 1 1 1 S jf+s' ^x y* L N A = = 4.0 ^.m |X0 16 cm~.i j/ J* 6 1 N A = 2X I0 16 cm -3 1 -10 123456789 Vg (IN VOLTS) (d) Fig. 13 (d) Channel conductance in the linear region versus gate voltage. (After Sah et al., Refs. 19 and 20.) for a given V D and V G . It also decreases with increasing V G . Experimental points obtained with the devices having bulk dopings N A = 10 16 and 2 x 10 16 are also shown. Channel lengths of L = 4 and 4.5 jum show the best match for devices with dopings of 10 16 and 2 x 10 16 respectively. These lengths are in good agreement with the estimated values from the diffusion processes. As discussed in Section 3, the mobility in the channel of a Si-Si0 2 system is approximately constant up to a surface field of about 10 5 V/cm. Based on the constant mobility assumption, the drain conductance at low drain voltage should then linearly increase with the gate voltage. This has indeed been found to be the case over a wide range of gate voltages as shown in Fig. 13(d). (2) Device Parameters The general expression as given in Eq. (34a) can be used to calculate other device parameters over the complete range of drain voltages. The short- circuit gate capacitance, C GS , is given by 8Vn (39) Vd = const 5 General Characteristics 531 where Q M is the total charge on the metal gate electrode for a given drain bias condition and is given by 19 Qm = •." if) r F u v , V) r fc s^l_ # dVm \ PpoJ (40) The calculated values of C GS from Eqs. (39) and (40) are shown in Fig. 14(a). We note that the results not only show all the detailed multiextrema structure of the capacitance but also agree remarkably well with the experimental data (solid lines). The transconductance, g m , may also be readily derived from Eqs. (34a) and (35). A typical example is shown in Fig. 14(b). The rounding off at the saturation points is clearly displayed. For very high gate voltages the observed discrepancy between the calculated values and the experimental results is believed to be mostly due to the field-dependent carrier mobility as discussed in Section 3. Figure 14(c) shows the theoretical and experimental drain con- ductance, g D = (dI D /dV D ) Vc . The drain (or channel) conductance is evaluated at the drain junction where the diffusion current becomes important at saturation. The residual drain conductance is due mainly to the reduc tion of the channel length, Eq. (38), which provides a finite drain conductance beyond saturation. (a) Fig. 14 (a) Theoretical and experimental short-circuit gate capacitance characteristics for an n- channel IGFET having d = 1700 A, N M = 1.6 x 10 16 cm -3 , and an area of 8.4 x 10 -4 cm 2 . 532 IGFET and Related Surface Field Effects 300 200 100 V n =8V THEORY EXP. 600 - - v G = -10 V jr /, 400 8/ y 200 yj' 4 /'' o ■ * — -*-*" /y V D (VOLTS) (C) Fig. 14 (b) Theoretical and experimental transconductance characteristics of a p-channel IGFET having d = 6200 A, N D = 6.4x10 14 cm -3 , J u. p = 326 cm 2 /volt-sec, and an area of 8.4 x 10- 4 cm 2 . (c) Theoretical and experimental channel conductance of a p-channel IGFET having d = 2100 A, N D = 1.6 x 10 15 cm -3 , /Lt p = 343 cm 2 /volt-sec, and an area of 8.4 x 10 -14 cm 2 . (After Pao and Sah, Ref. 19.) Figure 15 shows the variation of the surface potential (i// s ), the electron imref (E Fn ), and the surface electron conconcentration along the channel with the IGFET operated just in saturation. We note in Fig. 15(a) that the surface potential increases steadily from source to drain, with the fastest change near the drain end. The drain voltage is mainly responsible for the 5 General Characteristics 533 500 300 - Vg --\0^/yS y 100 80 / %s ys J Z 'j/' >/ 60 4^^^ 40 -fr/, 2__---' 20 i i 1 y/L 400 200 - 100 80 vi iov// Z 40 ~ 5^ 20 10 8 z/ 4 2 1/ 1 1 1 .4 .6 (b) =. —~^k = IOV I0 8 -® ^"-^ ^^sX -i^ ^ s \\v I0 7 ^2 \ I0 6 z. I0 5 \ 1 i l I y/L (c) Fig. 15 (a) Surface potential along the channel with the IGFET operating just in saturation (d = 2000 A, N fl = 4.6x 10 l4 cnr 3 , L = 70,um ( Z=1200 / um). (b) Imref along the channel with the IGFET operating just in saturation. (c) Surface electron concentration along the channel with the IGFET operating just in saturation. (Ref. 19.) large change in \]/ s along the channel. In Fig. 15(b) a similar plot is given for the electron imref. It can be seen that for a given gate voltage, the difference between \j/ s and E Fn /q is almost constant ( ~ 30 kT/q) until y/L approaches 1 at which value the carriers rapidly decrease toward the intrinsic concentration or E Fn approaches E ( . Another way of showing this behavior is the plot of the surface electron concentration, in Fig. 15(c), where the concentration" is given by n s = n. exp 4# s - ^b) E kT Fn kT = n po exp l qxj/ s - E Fn \ \ kT )' (41) The variation of the transverse electric field $ xsat (at saturation) along the channel is plotted in Fig. 16(a). It is interesting to note that the field decreases as it goes toward the drain. If we examine the energy band diagram of 534 IGFET and Related Surface Field Effects - E - ~ Na - 10 ^cmj^/ y/ ~ I0 14 ~ '&>/ 'lO 16 1 1 1 y/L (c) Fig. 16 (a) Transverse electrical field at the surface along the channel. (b) Longitudinal electrical field at the surface along the channel. (c) Ratio of the electric fields along the channel with the IGFET (same as Fig. 15) operating just in saturation. (Ref. 19.) Fig. 12(d), it becomes evident that for a cross section near the source the band-bending is narrow and very sharp whereas, for one near the drain, the band-bending extends further into the semiconductor and results in a lower electric field. The longitudinal electric field, S ysai , is shown in Fig. 16(b). As expected, it increases as it approaches the drain. The ratio of the longitudinal field to the transverse field normalized with respect to (d/2L)(e s /s i ) is plotted in Fig. 16(c) for different bulk impurity concentrations. This points out that the higher the concentration, the harder it is to pinch off the channel. It also shows explicitly that for devices with small values of the ratio (d/2L), the one-dimensional gradual-channel approximation is valid for most of the possible biasing conditions. For example, for an IGFET operated in satura- tion with N A = 10 16 cm -3 , an oxide thickness d of 1000 A and a channel length L of 10 pirn, the ratio (d/2L) is only 0.005. The ratio of the longitudinal field to the transverse field at the drain is about 0.1. For lower drain voltage (V D < V DsM ) the ratio would be even smaller. 5 General Characteristics 535 (3) Equivalent Circuit and Types of IGFET The IGFET is basically an ideal transadmittance amplifier with an infinite input resistance and a current generator at the output. In practice, however, we have also some other circuit parameters. An equivalent circuit 6 ' 21 is shown in Fig. 17 for the common-source connection. The differential transconduc- tance, g m , has been discussed previously. The input conductance, G in , is due t o the leakages through the thin gate insulator. For a thermally grown silicon dioxide layer, the leakage current between the gate and the channel is very small, of the order of 10~ 10 amp/cm 2 ; thus the input conductance is negli- gibly small. 22 In practical devices the insulator layer and the metal gate may extend somewhat above the source and drain regions. Consequently C in will be larger than the value given in Eq. (39). This fringe effect will also be the most important contribution to the feedback capacitance, C fb . The output conductance, G out , is equal to the drain conductance. The output capacitance consists mostly of the two p-n junction capacitances connected in series through the semiconductor bulk. Because of the nonlinear nature of the device, all the above circuit elements are differential and their magnitude depends on the operation points. The maximum operating frequency (neglecting stray components) can be defined as the frequency at which the current through C in is equal to the current of the current generator g m V G : Jm In 2nC in ~ 2nL 2 (42) GATE D DRAIN Fig. 17 Equivalent circuit of IGFET for the common-source configuration. (After lhantola and Moll, Ref. 6.) 536 IGFET and Related Surface Field Effects For low drain voltage the transit time of a carrier through the channel is given by 1 v n$ y nV D co„ (43) where v is the average velocity. At saturation ( V D = V Dsat ), however, it has been shown 6 that t ~ 2/co m . There are basically four different types of IGFET depending on the types of inversion layer rather than the dopant type of the bulk semiconductor. If an n channel exists at zero gate bias, Fig. 18(a), we must apply a negative bias on the gate to deplete the carriers in the channel and thus reduce the channel conductance. This channel can be formed, for example, by shallow diffusion or by the built-in positive fixed charges ; and this type is called the H-channel depletion IGFET. On the other hand, if the channel conductance is very low at zero gate bias, we must apply positive voltage on the gate in order to enhance the channel conductance, Fig. 18(b). The second type is called the GATE SOURCE (a) n - CHANNEL DEPLETION GATE 1 SOURCE V//////A DRAIN I " ■ 1 W////A V/1///A n + p n + (b) n -CHANNEL ENHANCEMENT Fig. 18 Basic types of IGFET. The four types are determined by the inversion layer rather than the dopant of the bulk semiconductor. 5 General Characteristics 537 GATE 1 \ Y/////A W////A p + p + l\ 1 \-p- CHANNEL n (C) p - CHANNEL DEPLETION GATE V//////A DRAIN \ V/////A V/////A p + n p + (d) p -CHANNEL ENHANCEMENT Fig. 18 Basic types of IGFET. The four types are determined by the inversion layer rather than the dopant of the bulk semiconductor. w-channel enhancement IGFET. Similarly we have the /^-channel depletion and enhancement IGFET as shown in Fig. 18(c) and (d) respectively. The electrical symbol, the transfer characteristics, and the output charac- teristics of the above four types are shown 23 in Fig. 19. We note that for the ^-channel depletion type, substantial drain current flows at V G = 0, and the current can be increased or decreased by varying the gate voltage. For the rt-channel enhancement type, however, we must apply a positive gate bias larger than the threshold voltage, V T , before a substantial drain current flows. The above discussion can be readily extended to /7-channel devices by changing the polarities. " (4) Common-Gate Configuration 24 In the previous discussion we have been concerned with the common-source electrode arrangement. In this section we shall derive the common-gate I- <? > o .« H H '-k J 4 H c: (N 1/1 c «•- <D !_ fY' o E O U u 538 5 General Characteristics 539 characteristics based on the basic theory presented in Section 4. The two con- figurations of an w-channel IGFET are shown in Fig. 20. To define the voltages more clearly, two subscript letters will be used, e.g., V DS means the voltage applied from the drain to the source. For the common-source configuration the drain current I D is given by Eqs. (25) and (31): /n = Zfi„Ci (v GS - V T )V DS - ^f- for V DS < V GS - V T (44a) and 1d = ^~{V gs -V t ) 2 for V DS >V DS =V GS -V T . (44b) G ♦ G =GATE S = SOURCE D =DRAIN (a) (b) Fig. 20 Common-source and common-gate configurations of IGFET. 540 IGFET and Related Surface Field Effects For the common-gate configuration the drain current I D may be expressed by voltages V GS and V DS . From Fig. 20(b) we obtain V DS =V DG +V 0S . (45) If we define V GS = V GS — V T , the current equation, Eq. (44a), may be written as _ Zn n Cj *D — 7 - - (Vnr + V r * + V T ) 2 ' 1 Vgs(Vog + V GS + V T ) - K DG + f + T) = 7 ^ l(V GS ~ V T ) 2 - (V DG + V T ) 2 l (46) For the saturation region we obtain from Eq. (44b) a modified pinch-off con- dition for the common-gate arrangement: V DG = V DS - V GS = F GS - V T - V GS = -V T . (47) Substituting Eq. (47) into Eq. (46) we obtain an expression identical to Eq. (44b). It is evident that in the saturation region the drain current expres- sion is independent of the configurations. The output characteristics (I D versus V DG ) and the input characteristics (I D versus V GS ) for the common gate con- figurations are shown in Fig. 21(a) and (b) respectively. There is a remarkable difference between junction transistors and IGFET: junction transistor characteristics are commonly unsymmetrical when emitter and collector are interchanged in common-base configuration; field-effect transistors are theoretically symmetrical (but a possible asymmetry can be made in the actual devices, e.g., a partial-gate electrode covers only those portions near the source electrode in a depletion mode). By " symmetry" we mean that if electrodes S and D are interchanged in the common-gate con- figuration, the resulting properties are identical. In this case it is possible to conjugate the output characteristics from Fig. 21(a) and (b) in the single graphical presentation shown in Fig. 22. These generalized characteristics illustrate in one figure the whole region of the transistor operation where source and drain elctrodes may be assumed to be input and output electrodes respectively. (5) Temperature, Doping, and Other Effects In the linear region the threshold voltage is given by Eq. (33) : t/ a. . Qf s , o / _i J 4s s<lN A il/ B V T = 4>ms + ~pr + 2<A B + -^ • (48) 541 542 IGFET and Related Surface Field Effects *'°/(-^) (V GS -V T HO (V DG + V T )=-IO Fig. 22 Generalized characteristics for common-gate configuration. (After Lukes, Ref. 24.) If the work-function difference 4> ms and the surface charges are essentially independent of temperature, differentiation of the above equation with respect to temperature yields 25 where d\jj If dV T d\j/ B ~d~T~~df \ i e s qN A - L QV xj/ B \ r ~ t E 2q )l (49) (49a) 5 General Characteristics 543 to o > ^"2.4 I 2.2 2.0 - 1 1 — - I N B = 3 x \p> 5 cm -3 ** d * 900A ^^^^ P - CHANNEL - - 1 dT = 3.1 X I0" 3 (V0LTS/°C) ^"""""^x - i i i -50 50 T(°C) (a) 100 1 1 1 1 d(/im) 1.00 - 0.50 0.30 ■*- 0.25 020 ■iPO.15 0.10 1 0.05 1 1 1 10" I0'5 I0 lb I N D (cm-3) (b) I0' 8 Fig. 23 (a) Experimental measurement of the threshold voltage as a function of temperature. (b) | dV T /dT\ of Si-Si0 2 system versus substrate impurity concentration with oxide thickness as a parameter. (After Vadasz and Grove, Ref. 25.) Typical experimental measurements of the threshold voltage near room tem- perature for Si-Si0 2 systems are shown in Fig. 23(a). The data can be repre- sented by a straight line over this temperature range. Thus, a representative figure for device behavior can be obtained by evaluating Eq. (49) at room temperature. Results of such calculations are shown in Fig. 23(b) as a function of substrate dopings, for various values of the oxide thicknesses. The quantity (dV r jdT) is positive for «-channel devices and negative for/?-channel devices. We also note that for a given oxide thickness, the quantity dV T jdT generally increases with increased doping. 544 IGFET and Related Surface Field Effects At a given temperature (e.g., room temperature), the substrate impurity concentration also has profound effect on the threshold voltage, V T . The relationship between V T and the doping, N A , is given by Eq. (48) where kT ilf B = — ]n(NJn t ). q If an ^-channel IGFET is of the depletion type (which means the device is normally on under the zero gate bias condition and that a negative bias is required on the gate to reduce the source-drain current), the threshold voltage V T is less than zero. To make an ^-channel enhancement-type IGFET, we can increase the substrate doping such that '4e,N A kTln(N A ln t ) 2kT " + ln(JViii) > (*. + % -u (50) C, q and V T > 0. Figure 24 shows the variation 26 of the threshold voltage with substrate resistivity for a surface-charge density of 5.4 x 10 11 cm -2 . The experimental points are in reasonable agreement with the calculated curve (solid line). It is clear that the threshold voltage can be varied by varying the temperature, the substrate doping (N A ), the gate metal (<j> ms ), the surface charge (Q fs ), and the insulator thickness (Q = ejcl). In addition to the temperature and doping effects, the IGFET charac- teristics are also influenced by surface orientation and irradiation effects similar to those discussed in Chapter 9. In the Si-Si0 2 system, the fixed surface-charge density on the (100) surface is smaller than that on the (111) surface. It is thus expected that the threshold voltage of IGFET made on (100) substrate should be smaller. This is indeed verified experimentally to be the case. 27 When the MIS structure is under ionization radiation, as discussed in Chapter 9, a net positive space charge builds up near the semiconductor- insulator interface resulting in a shift of the flat-band voltage. This, in turn, causes a change in the threshold voltage. The expected behaviors have been generally observed experimentally. 28 (6) Physical Limitations of IGFET The first fundamental limitation of an IGFET is the maximum attainable drain voltage which is determined by substrate doping and the diffusion profile (which is related to the junction curvature effect); 29 above that value the drain p-n junction will break down. The second limitation is due to the so-called "punch-through" effect. As the drain voltage increases, the effective channel length, L', decreases. Even- tually, when L' is reduced to zero, the drain is punched through to the 5 General Characteristics 54S 34 1 p -TYPE SUBSTRATE 30 26 - 22 ■■ EXPERIMENTAL RESULTS w 18 _i o Z 14 t- > - CAL CULATED 10 - 1 \ 6 — 2 -2 1 -4 1.0 10 RESISTIVITY (n-cm) Fig. 24 Theoretical (solid line) and experimental results for the variation of the threshold voltage with substrate resistivity for a surface charge density of 5.4 x 10 11 cm -2 . (After Brotherton, Ref. 26.) source; and the drain current is no longer controlled. The drain voltage at punch-through can be obtained from Eq. (37) by letting L' = and v d ~ V Dsat = Vpt (punch-through): 5 V PT = L 2 gN A 2e ■ (51) For low substrate dopings and a long channel the voltage is very large, and generally the avalanche breakdown will take place first. The transit time 6 ' 30 ' 31 across the channel is another limitation. Since the transit time is proportional to the square of the channel length, Eq. (43), it is desirable to make the channel as short as possible. For a l-/mi channel length 546 IGFET and Related Surface Field Effects the transit time is of the order of 10 -11 second, corresponding to a maximum operating frequency of about 10 GHz. The power limitation 9 of an IGFET is very similar to that of the junction transistor. The dissipation power is limited primarily by the thermal resistance of the transistor-package combination. For a channel length much smaller than the wafer thickness, the conduction of heat from the channel into the substrate is radial and leads to a logarithmic dependence of temperature on power dissipation. The noise in IGFET imposes another limitation on the minimum signal levels to be detected or amplified. The three types of noise in IGFET are: thermal noise, generation-recombination noise, and l/f noise — similar to those in ap-n junction. The thermal noise 32 arises mainly from the fluctua- tions of the current-charge carriers in the channel which modulates the channel conductance. This noise is important at high frequencies. The product of the equivalent input thermal noise resistance and the transconductance g m of the IGFET equals 2/3 for devices with intrinsic substrate and increases with in- creasing substrate doping. The generation-recombination noise 33 is due to the fluctuation of the charge carriers at the recombination centers and the defect centers in the depletion region between the channel and the semi- conductor substrate. This noise is important in intermediate frequency. The l/f noise 34 is mainly due to the random fluctuation of the carriers in the surface states, and is the dominant noise at very low frequencies. 6 IGFET WITH SCHOTTKY BARRIER CONTACTS FOR SOURCE AND DRAIN 35 In the previous discussions we were concerned with IGFET's having diffused source and drain contacts. Use of Schottky barrier contacts for the source and drain of an IGFET gives fabrication advantages. Elimination of the high-temperature diffusion steps promotes better quality in the oxides and better control of the geometry, particularly between source and gate. In addition the SB-IGFET can be made on semiconductors (such as CdS) where p-n junctions cannot be easily formed. An SB-IGFET has been made using a PtSi-Si barrier for source and drain and Si0 2 as the gate insulator. The source barrier height is 0.85 eV on n type and 0.24 on p type; the lower barrier height applies in normal operation with a /^-inversion layer over the n-Si. The basic device geometry and cross- sectional view are shown in Fig. 25. The platinum silicide films are formed at 650°C in the contact holes using the vacuum sintering technique. 36 The output characteristics (drain current versus drain voltage) of the device are shown in Fig. 26 for two substrate temperatures. It is seen that at room 6 IGFET with Schottky Barrier Contacts for Source and Drain 547 Hl|~ 12/xm Z=200/im Fig. 25 Basic device geometry and cross-sectional view of SB-IGFET. The substrate is n-type, 1 ohm-cm, <100> oriented silicon. The first Si0 2 layer is thermally grown, and the second is deposited by thermal decomposition of ethylorothosilicateand trimethyl phosphate. (After Lepselter and Sze, Ref. 35.) temperature, Fig. 26(a), the characteristics are similar to those of a con- ventional IGFET described previously. The turn-on voltage V T is found to be about 2 volts, and the transconductance g m ( = dI D /dV G ) in the saturation region is about 50 ^mho for a gate voltage V G = — 14 volts. At liquid nitrogen temperature, Fig. 26(b), the output characteristics are considerably different from those of a conventional IGFET. A more detailed result is shown in Fig. 27. At V G = the leakage current between the source and drain contacts is about 4 x 10" 10 amperes. For an applied gate voltage and at low drain voltages the drain current I D remains essentially constant and equal to the small leakage current. When the drain voltage reaches about one volt, I D starts to increase rapidly and varies approximately as (V D ) m with m between 4 and 8. For a given gate voltage the current again saturates at the pinch-off point. The rapid increase of current can be explained with the help of the simpli- fied band diagrams shown in Fig. 28. At equilibrium with V G = V D = 0, the band diagram at the semiconductor surface corresponds to the two metal- semiconductor barriers with barrier height <p Bn = 0.85 V for the PtSi-Si 548 IGFET and Related Surface Field Effects (IV/DIV) (b) Fig. 26 Oscilloscope display of the output characteristics of the device at (a) 300°K and (b) 77°K, where I D is the drain current, and V D and V G are the drain voltage and gate voltage respectively. (Ref. 35.) system. 36 When \V G \ > \V T \, the gate voltage is large enough to invert the surface from «-type to p-type, and the barrier height between source and inversion layer is now 4> Bp ^ 0.25 V for PtSi on/?-type silicon (see Chapter 8 for more detailed discussion on Schottky barriers). Note that the source contact is reverse-biased under operating conditions. For a 0.25 V barrier the thermionic-type reverse saturation current density is of the order of 10 3 A/cm 2 at room temperature and about 10~ n A/cm 2 at liquid nitrogen temperature. 37 6 IGFET with Schottky Barrier Contacts for Source and Drain 549 10 -5 - -^ -18 — -16 — -14 10 -6 ^" 77 c K s -\Z 10 -7 - -< -10 10 -8 = ' -8 10 -9 - v G = VOLT 10" 10 1 1 I mill 1 1 mini i i i Mini 1 1 M MM 10 100 |V n | (VOLTS) Fig. 27 Log-log plot of the output characteristics at 77°K. (Ref. 35.) With the present geometry and an inversion layer depth of the order of 1000 A, the maximum thermionic current that can flow between the source and drain contacts is about 10~ 16 ampere at 77°K. Thus the thermionic current at 77°K is negligible. The dominant current is then the tunneling current which is proportional to the tunneling probability. 38 J t ~ exp 4 x /2m* 1 / 2 (^ Bp ) 3/2 qhS where $ is the electric field and m* is the effective mass. If we assume that m* equals the free electron mass, the ratio of current densities for fields at 3 x 10 5 V/cm and 10 5 V/cm is about 10 10 . Thus a small increase in the drain voltage will cause a large increase in the drain current in agreement with the experimental results shown in Fig. 27. 550 IGFET and Related Surface Field Effects V ' v° SOURCE V G >v T ,v D =o Fig. 28 Band diagrams at the semiconductor surface. Top: for equilibrium condition with no gate or drain voltage applied. Middle: for an inverted surface. Bottom: where a large drain voltage is applied such that tunneling current can flow. (Ref. 35.) IGFET WITH A FLOATING GATE— A MEMORY DEVICE 39 When the gate electrode of a conventional IGFET is modified to incor- porate an additional metal-insulator sandwich (a floating gate), the new structure can serve as a memory device in which semipermanent charge storage is possible. A schematic diagram of an IGFET with a floating gate is shown in Fig. 29 which is basically a/?-channel enhancement-mode device. The structure of the gate electrode is layered like a sandwich: insulator 1(1), metal M(\), insulator 1(2), and metal M(2). The corresponding energy band diagram of the gate structure is shown in Fig. 30. If the thickness of 1(1) is thin enough that a field- controlled electron transport mechanism such as tunneling or internal field- emission is possible, a positive bias on M(2) with respect to the semiconductor would cause electron accumulation in the floating gate M(\), provided electron transport across 1(2) is small. These conditions can be met by 7 IGFET With a Floating Gate — A Memory Device 551 OHMIC CONTACT TO FLOATING GATE M(2) OHMIC CONTACT Fig. 29 Schematic diagram of an IGFET with a floating gate. /(1) and 1(2) are insulators. M(1) is the floating-gate metal-electrode, and M(2) is the outer gate electrode. (After Kahng and Sze, Ref. 39.) SEMICONDUCTOR I(l) M(l) K y^Z^> 1« i y//////A. N h-di 1(2) M(2) V G >0 Y///////A, ~Z7W/ J '////////. (b) v G =o V//////S Fig. 30 (a) Energy band diagram along the gate structure when a positive bias is applied to the outer gate electrode. (b) Energy band diagram along the gate structure after the bias voltage is removed. (Ref. 39.) 552 IGFET and Related Surface Field Effects choosing 1(1) and 1(2) such that the ratio of dielectric permittivity e t /e 2 is small and/or the barrier height into 1(1) is smaller than that into 1(2). In addition, the M(\) should be thick enough that emitted electrons are close to the Fermi level of M(\) before reaching 1(2); and 1(2) should be thick enough that no carrier transport is allowed across it. The stored charge Q, as a function of time when a step voltage function with amplitude V G is applied across the sandwich, is given by Q(t)= ( Jdt' coul/cm 2 . (52) Jo When the emission is of the Fowler-Nordheim tunneling type, 38 then the current density, /, has the form /=C 1 <f 2 exp(-<f M'), (53) where $ is the electric field, and C x and S are constants in terms of effective mass and barrier height. (We have neglected the effects due to the image force lowering of the barrier, etc., but the essential feature is expected to be retained even after detailed corrections are made.) This type of current transport occurs in Si0 2 and A1 2 3 . When the field emission is of the internal Schottky or Frenkel-Poo le type, as occurs in Si 3 N 4 , the current density follows the form J = C 2 $ Qxpl-q((j) B - JqSlneJIkT] (54) where C 2 is a constant in terms of trapping density in the insulator, 4> B the barrier height in volts, and e x the dynamic permittivity. The electric field in 7(1) at all times is a function of the applied voltage V G and Q(t), and is obtainable from the displacement continuity requirement as Vg Q di + d 2 (eje 2 ) e t + s 2 (djd 2 y (55) where d x and d 2 are the thickness of 7(1) and 1(2) respectively. Figure 31(a) shows the results of a theoretical computation using Eqs. (52), (53), and (55) with the following parameters: d x = 50 A, e, = 3.8 e ( for Si0 2 ), d 2 = 1000 A, 8 2 = 30 £ (for Zr0 2 ), and V G = 50 volts. One notes that initially the stored charge increases linearly with time and then saturates. For a short time the current is almost constant and then decreases rapidly. The field in 1(1) decreases slightly as the time increases. The above results can be explained as follows : When a voltage pulse is applied at / = 0, the initial charge Q is zero, and the initial electric field across 1(1) has its maximum value, <f max = V G \\_d x + (e x l£ 2 )d 2 ~\. When Q is sufficiently small that i remains essentially the same, the current will in turn remain the same, and Q will in- crease linearly with time. Eventually, when Q is large enough to reduce the 7 IGFET With a Floating Gate — A Memory Device 553 Q S \~*" Iq-io lo-s 10""° \Q'' I0 _b 10 t(SEC) (a) 10-3 ^ 5 Fig. 31 (a) Theoretical results of the stored charge in M(1 ), current through /(1 ), and electric field in /(1) as functions of time for d t = 50 A, d 2 = 1000 A, e 1 = 3.8e , £ 2 = 30e , and V r , = 50 volts. value of i substantially, the current will decrease rapidly with time and Q will increase slowly. Figure 31(b) shows the stored charge as a function of time for the same e x and e 2 but different d u d 2 , and V G . To store a given amount of charge for a given structure, it is clear that one can increase either the applied voltage or the charging time (pulse width) or both. Figure 31(c) shows the calculated stored charge for the current transport described by Eq. (54). Here 7(1) is a 20-A-thick Si 3 N 4 film. There are marked decreases in the gate voltages required for a given charge compared to Si0 2 . This is largely due to the much lower barrier height (1.3 volts) compared to Si0 2 (»4.0 volts). It is noted that the field in 1(1) for appreciable charge storage is in the 10 7 V/cm range. When the outer gate voltage is removed, the field in 1(1) due to the stored charge on the inner gate is only 10 6 V/cm or so, corresponding to 5 x 10 12 charges/cm 2 , a charge large enough to be detected easily. Since the transport across I(\) is highly sensitive to the field, no charges flow back. The charge loss is actually controlled by the dielectric relaxation time of the sandwich structure, which is very long. When it is desired to discharge the floating gate quickly, it is necessary to apply to the outer gate a voltage about 554 IGFET and Related Surface Field Effects Fig. 31 (b) Theoretical results of Q, the stored charge as a function of time with the same £ x and e 2 as in (a), and d t = 10 A, d 2 = 100 A (solid lines), d t = 30A, d 2 = 300 A (dotted lines). equal in magnitude but opposite in polarity to the voltage which was used for charging. It is evident that net positive charges (loss of electrons) can also be stored in the floating gate if the discharging gate voltages are appropriately chosen for magnitude and duration. The experimental results are shown in Fig. 32. The substrate of the device is an «-type silicon, 1 ohm-cm, and <111> oriented. 7(1) is a 50 A Si0 2 thermally grown in a dry oxygen furnace. M{\) and 7(2) are Zr (1000 A) and Zr0 2 (1000 A) respectively. M{2) and the ohmic contact metals are aluminum deposited in a vacuum system. Because of the relatively thick insulator layers, a large voltage (~50 V) and a long pulse width (~ 0.5 /ts) must be applied in order to store the required charge (~5 x 10 12 charges/cm 2 ). A positive pulse of 50 volts is first applied to the gate electrode, and 60 ms later a negative pulse of 50 volts is applied, Fig. 32(a). Then the pulsing cycle repeats. One notes that, as shown in Fig. 32(b), when the positive pulse is applied, a sufficient amount of charge is stored in the floating gate so that the silicon surface is inverted; a conducting channel is thus formed, and the channel current is on. It can be seen that the channel current decreases only slightly at the end of 8 Surface Field Effects on p-n Junctions 555 10' ?! ir.12 I0 9 io-'o V G = 9 VOLTS ^8 yn ^6 X 5 I0 -8 10" t (SEC) (c) Fig. 31 (c) Theoretical results of the stored charge density as a function of time with d x = 20 A, £i = 6e (Si 3 N 4 ), d 2 = 200 A, e 2 = 30g (Zr0 2 ), and various applied voltages. (Ref. 39.) 60 ms. When the negative pulse is applied, the stored charge is eliminated, and also the channel. The channel current reduces to its off state. Figure 32(c) shows results for pulses with the same widths but smaller amplitude (40 V). Since the stored charge is a strong function of the pulse amplitude, only a very small amount of charge is stored, one too small to cause inversion. It is clear that the controlled field emission to the floating gate may be capacitively induced by pulsing the outer gate electrode. The IGFET with a floating gate can therefore be used as a memory device with holding time as long as the dielectric relaxation time of the gate structure (for read-in) and with continuous nondestructive read-out capability (from source-drain electrodes). The read-in read-out can also be performed in a very short time, e.g., in the nanosecond range or even shorter. SURFACE FIELD EFFECTS ON p-n JUNCTIONS AND METAL-SEMICONDUCTOR DEVICES (1) Capacitance and Reverse Current 15 Figure 33(a) shows a gate-controlled diode in which the p-n junction characteristics near the corner are modulated by the applied surface field on v G - -HK- -Mh- ■♦ t (a) ON STATE OFF STATE -►20 mS/CHV (b) V G =50 V, t|=0.5>is OFF STATE • 20 ms /DIV (C) V G = 40V, t|=0.5 M s Fig. 32 Experimental results. (a) The applied gate pulse voltage. (b) The source-drain current for V G = 50 volts. (c) The source-drain current for V G = 40 volts. (Ref. 39.) 556 8 Surface Field Effects on p-n Junctions 557 sio 2 -i (a) -20 -10 20 30 40 50 60 70 80 Vg (VOLTS) (b) Fig. 33 (a) Gate-controlled diode. (b) Theoretical low-frequency gate-to-substrate capacitance in the presence of an applied junction bias. (After Grove and Fitzgerald, Ref. 15.) the MIS annular structure. We shall now consider the capacitance-voltage characteristics of the MIS structure when a junction bias Vj is applied, i.e., under the nonequilibrium condition. The relationship between the gate voltage and the surface potential is given by V G -V FB =-QJC t + + a (56) 558 IGFET and Related Surface Field Effects where V FB is the flat-band voltage shift due to work-function difference and surface-charge effect. In the depletion approximation, we have <A S qN A W' 2e. (57) and Q s ^ -qN A W (58) where W is the depletion-layer width. From Eqs. (56), (57), and (58) we have t/ t/ g^tf 2 , qN A W 2e e C (59) At the onset of strong inversion the surface potential is given by \J/ S = 2<Ab + K/j an d tne maximum depletion-layer width is given by W„c* !2e s (Vj + 2^ B ) qN, (60) Substitution of Eqs. (57), (58), and (60) into Eq. (56) yields the gate voltage required for strong inversion of the surface in the presence of an applied junction bias Vj\ V G (Vj) - V FB =Vj + 2xji B + ^ j2e s qN A (Vj + 2^). (61) Equation (61) can be solved to give the width of the surface depletion region as a function of the gate voltage, W = — C, 1 + 2(V G - V FB )C? qN A £ s 1/2 -1 for W<W m (62) Thus, in the region where the semiconductor surface is merely depleted, the gate-to-substrate capacitance is given by C = C t C D CiisJW) Q + C D C t + (eJW) -< 1 + c t w or from Eq. (62) 1 + 2C ; 2 (F G - v„y qN A s s 1/2 (63) (64) The calculated results of the low-frequency gate-to-substrate capacitance in the presence of the applied junction bias are shown in Fig. 33(b) for a p-type substrate doped with 10 16 acceptor atoms/cm 3 . We note the delay in the 8 Surface Field Effects on p-n Junctions 559 capacitance rise corresponding to the onset of the inversion as a result of the applied reverse junction bias, and the earlier inversion as a result of an applied forward bias, compared to the Vj = case. The surface field across the MIS annular structure as shown in Fig. 33(a) also has profound effect on the reverse current of the p-n junction. Figure 34(a) illustrates this effect under three different surface conditions at a fixed junction voltage. Since the room-temperature reverse current of silicon p-n junctions is due to the generation processes through the generation-recombi- nation centers in the depletion region, the magnitude of the reverse current depends on the total number of such centers included within the junction depletion region. When the surface under the gate electrode is accumulated, only those centers within the depletion region of the metallurgical p-n junction contribute to the generation current (/J. When the surface under the gate is inverted, centers within the depletion region of the field-induced junction between the inversion layer and underlying substrate also contribute to the total generation current which is therefore larger than in the accumulation case (7 X + I 2 ). When the surface is depleted, centers at the insulator-semi- conductor interface provide yet another contribution to the total generation current resulting in a peak in the reverse-current versus gate-voltage charac- teristics (/j + I 2 + I 3 ). Figure 34(b) shows the measured reverse current as a (a) Fig. 34 (a) Effects of surface field on the p-n junction reverse saturation current. 560 IGFET and Related Surface Field Effects 1.0 - o 0.8 0.6- 0.4 - 1 1 1 1 1 1 - nX-O 3^^ - Vj=-25Vl-20 15 -lOl -51 _l \ \f - - - _ 15 -100 -80 -60 -40 -20 V G (V0LTS ) (b) Fig. 34 (b) Measured reverse current and gate-to-substrate capacitance as a function of the gate voltage for various junction biases. (After Grove and Fitzgerald, Ref. 15.) function of the gate voltage with junction voltage Vj as a parameter. Also shown are the corresponding gate-to-substrate capacitance measurements. It is evident from this figure that at a given junction voltage a large increase in the junction current occurs when the surface under the gate becomes depleted, and that the current decreases when the surface becomes inverted. This condi- tion is shown in a very clear manner by the I R versus V G characteristics. The increase in current takes place at the same value of gate voltage independent 8 Surface Field Effects on p-n Junctions 561 SiO; (a) (b: + IOOV Q V////J./A -20V o \JL X/////A WffifP X (O Fig. 35 (a) Metal-semiconductor diode with a diffused p-n junction guard ring and a gate electrode on the insulator. (b) The breakdown condition of the guard ring when a negative gate bias is applied. (c) The breakdown condition of the guard ring when a positive gate bias is applied. (After Lepselter and Sze, Ref. 36.) 562 IGFET and Related Surface Field Effects of the reverse bias, but the decrease in current occurs at the value of V G corresponding to the onset of strong inversion as indicated by the non- equilibrium MIS capacitance curves. (2) Breakdown Voltage 36 40 Figure 35(a) shows a metal-semiconductor diode which has a diffused p-n junction guard ring and a separate metal electrode on the insulator (the gate electrode). As discussed previously, if the junction radius near the edges of the diffused p + region is sufficiently small, the p + n junction guard ring will break down first owing to the junction curvature effect. When a negative gate bias is applied, the surface field tends to smooth out the field concentration near the junction edge, Fig. 35(b). Thus the radius of curvature, r j} is effectively in- creased. This in turn increases the breakdown voltage. As a positive gate bias is applied, the field profile near the junction is shown in Fig. 35(c) where the radius of curvature, r jy is effectively reduced and results in a decreased breakdown voltage. Figure 36 shows the measured reverse I-V characteristics as a function of the gate voltage for a Schottky diode with a guard ring of r-^OAfim 1 1 P - Ijft-cm / J V G =+90V/+60 +30 -30 -60 -90 -I20V 7 i i > < i i i i i i i /J. J J i i i i i 40 50 IV.KVOLTS) 70 Fig. 36 Measured reverse l-V characteristics as a function of the gate bias for the device shown in Fig. 35 with junction depth of 0.4 fxm. The breakdown voltage is defined as the voitage at which the reverse current reaches 1 ma. (Ref. 36.) 125 y> ioo o 75 50 f j =5fj.n\ 3*** Vl2 o -150 -100 -50 50 100 150 V G (VOLTS) Fig. 37 Measured breakdown voltage versus gate voltage for four different junction depths. (Ref. 36.) -20 20 V G (VOLTS) Fig. 38 Effect of surface field on the breakdown voltage of a metal-semiconductor diode. (Ref. 36.) 563 564 IGFET and Related Surface Field Effects 0.4 /nn junction depth. As expected, the gate voltage does have a profound effect on the junction breakdown voltage. Figure 37 shows the measured breakdown voltage versus gate voltage for four different junction depths. One notes that the breakdown voltages all approach the theoretical value (~ 100 V) as — V G increases. Also at zero bias, the breakdown voltage decreases as junction depth r i decreases. Similar effects are observed on a metal-semiconductor diode that has no p-n junction guard ring but has a second MIS overlay as shown on the insert of Fig. 38, where Zr0 2 is formed near the periphery of the metal, and separate voltages are applied to the diode and the MIS guard ring electrodes. As the gate voltage increases in the negative direction, the edge field is gradually reduced. This results in an increased breakdown voltage (here defined as voltage drawing 1-ma current). When V G increases in the positive direction, however, the enhanced edge field causes drastic lowering of the junction breakdown voltage as shown in Fig. 38. REFERENCES 1. J. E. Lilienfeld, U.S. Patent No. 1,745,175 (1930). 2. O. Heil, British Patent No. 439,457 (1935). 3. W. Shockley and G. L. Pearson, " Modulation of Conductance of Thin Films of Semi- conductors by Surface Charges," Phys. Rev., 74, 232 (1948). 4. D. Kahng and M. M. Atalla, "Silicon-Silicon Dioxide Field Induced Surface Devices," IRE Solid-State Device Research Conference, Carnegie Inst, of Tech., Pittsburgh, Penn. (1960). 5. H. K. J. Ihantola, "Design Theory of a Surface Field-Effect Transistor," Stanford Electronics Laboratories Technical Report No. 1661-1 (1961). 6. H. K. J. Ihantola and J. L. Moll, "Design Theory of a Surface Field-Effect Transistor," Solid State Electron., 7, 423 (1964). 7. C. T. Sah, "Characteristics of the Metal-Oxide-Semiconductor Transistors," IEEE Trans. Electron Devices, ED-11, 324 (1964). 8. S. R. Hofstein and F. P. Heiman, "The Silicon Insulated-Gate Field-Effect Transistor," Proc. IEEE, 51, 1190 (1963). 9. J. T. Wallmark and H. Johnson, Field Effect Transistors, Physics, Technology, and Applications, Prentice-Hall (1966). 10. W. Shockley, "A Unipolar Field-Effect Transistor," Proc. IRE, 40, 1365 (1952). 11. R. K. Weimer, "An Evaporated Thin Film Triode," IRE-AIEE Solid-State Device Research Conference, Stanford U., Stanford, California (June 1961). 12. L. L. Chang and H. N. Yu, "The Germanium Insulated-Gate Field-Effect Transistor (FET)," Proc. IEEE, 53, 316 (1965). References 565 13. M. H. White and J. R. Cricchi, "Complementary MOS Transistors," Solid State Electron., 9, 991 (1966). 1 3a. T. T. Kamins and R. S. Muller, "Statistical Considerations in MOSFET Calculations," Solid State Electron., 10, 423 (1967). 1 3b. F. P. Heiman and H. S. Miller," Temperature Dependence of «-Type MOS Transistors," IEEE Trans. Electron Devices, ED-12, 142 (1965). 14. H. Becke, R. Hall, and J. White, "Gallium Arsenide MOS Transistors," Solid State Electron., 8, 813 (1965). 15. A. S. Grove and D. J. Fitzgerald, "Surface Effects on p-n Junctions: Characteristics of Surface Space-Charge Regions Under Nonequilibrium Conditions," Solid State Electron., 9, 783(1966). 16. O. Leistiko, A. S. Grove, and C. T. Sah, "Electron and Hole Mobilities in Inversion Layers on Thermally Oxidized Silicon Surfaces," IEEE Trans. Electron Devices, ED-12, 248 (1965). 17. J. R. Schrieffer, "Effective Carrier Mobility in Surface-Space Charge Layers," Phys. Rev., 97, 641 (1955). 18. D. R. Frankl, Electrical Properties of Semiconductor Surfaces, Chap. 4, pp. 93-141, Pergamon Press (1967). 19. H. C. Pao and C. T. Sah, "Effects of Diffusion Current on Characteristics of Metal- Oxide (Insulator)-Semiconductor Transistors," Solid State Electron., 10, 927 (1966). 20. V. G. K. Reddi and C. T. Sah, "Source to Drain Resistance Beyond Pinch-Off in Metal-Oxide-Semiconductor Transistors (MOST)," IEEE Trans, on Electron Devices, ED-12, 139 (1965). 21. W. Fischer, "Equivalent Circuit and Gain of MOS Field-Effect Transistors," Solid State Electron., 9, 71 (1966). 22. F. J. Kennedy, "Gate Leakage Current in MOS Field-Effect Transistors," Proc. IEEE, 54, 1098 (1966). 23. R. C. Gallagher and W. S. Corak, "A Metal-Oxide-Semiconductor (MOS) Hall Element," Solid State Electron., 9, 571 (1966). 24. Z. Lukes, "Characteristics of the Metal-Oxide-Semiconductor Transistor in the Com- mon-Gate Electrode Arrangement," Solid State Electron., 9, 21 (1966). 25. L. Vadasz and A. S. Grove, "Temperature Dependence of MOS Transistor Charac- teristics Below Saturation," IEEE Trans. Electron Devices, ED-13, 863 (1966). 26. S. D. Brotherton, "Dependence of MOS Transistor Threshold Voltage on Substrate Resistivity," Solid State Electron., 10, 611 (1967). 27. F. Leuenberger, "Dependence of Threshold Voltage of Silicon p-Channel MOS FET's in Crystal Orientation," Proc. IEEE, 54, 1985 (1966). 28. A. G. Stanley, "Effects of Electron Irradiation of Metal-Nitride-Semiconductor Insulated-Gate Field-Effect Transistors," Proc. IEEE, 54, 784 (1966). 29. S. M. Sze and G. Gibbons, "Effect of Junction Curvature on Breakdown Voltages in Semiconductors," Solid State Electron., 9, 831 (1966). 30. G. F. Newmark, "Theory of the Influence of Hot Electron Effects on Insulated-Gate Field-Effect Transistors," Solid State Electron., 10, 169 (1967). 566 IGFET and Related Surface Field Effects 31. S. R. Hofstein and G. Warfield, "Carrier Mobility and Current Saturation in the MOS Transistor," IEEE Trans. Electron Devices, ED-12, 129 (1965). 32. M. Shoji, "Analysis of High-Frequency Thermal Noise of Enhancement Mode MOS Field-Effect Transistors," IEEE Trans. Electron Devices, ED-13, 520 (1966). 33. S. Y. Wu, "Theory of Generation-Recombination Noise in MOS Transistors," Solid State Electron., 11, 25 (1968). 34. I. Flinn, G. Bew, and F. Berg, "Low Frequency Noise in MOS Field-Effect Transis- tors," Solid State Electron., 10, 833 (1967). 35. M. P. Lepselter and S. M. Sze, "SB-IGFET: An Insulated-Gate Field-Effect Transis- tor Using Schottky Barrier Contacts as Source and Drain," Proc. IEEE, 56 (August 1968). 36. M. P. Lepselter and S. M. Sze, "Silicon Schottky Barrier Diode With Near-Ideal I-V Characteristics," Bell. Sys. Tech. J., 47, 195 (1968). 37. C. R. Crowell and S. M. Sze, "Current Transport in Metal-Semiconductor Barriers," Solid State Electron., 9, 1035 (1966). 38. R. H. Fowler and L. Nordheim, "Electron Emission in Intense Electric Fields," Proc. Roy. Soc. (London), 119, 173 (1928). 39. D. Kahng and S. M. Sze, "A Floating Gate and Its Application to Memory Devices," Bell Syst. Tech. J., 46, 1283 (1967). 40. A. S. Grove, O. Leistiko, and W. W. Hooper, "Effect of Surface Field on the Break- down Voltage of Planar Silicon p-n Junctions," IEEE Trans. Electron Devices, ED-14, 157 (1967). ■ INTRODUCTION ■ INSULATED-GATE THIN-FILM TRANSISTORS (TFT) ■ HOT-ELECTRON TRANSISTORS ■ METAL-INSULATOR-METAL STRUCTURE II Thin-Film Devices I INTRODUCTION Thin-film devices are structures consisting of one or more thin layers of metal, semiconductor, or insulator. The insulated-gate thin-film transistor (TFT) was proposed by Weimer 1 in 1961 and used evaporated semiconductor, metal, and insulator layers to form a device which functions essentially as an IGFET. The same author has also recently reviewed the basic technology and applications of TFTs in integrated circuits. 2 Since the semiconductor layer is formed by deposition, more defects and crystalline imperfections in the layer than in the corresponding single-crystal semiconductor are expected. This results in more complicated transport processes in the TFT. We shall in the next section consider the basic characteristics, the effects due to traps and surface states, and the power limitations of a TFT. In the past decade many attempts have been made to invent or discover solid-state phenomena capable of displacing the junction transistor in one or another circuit application. Among the most interesting candidates are the hot-electron transistors. The first hot-electron device was proposed by Mead 3 in 1960. Many others have been proposed in subsequent years. In Section 3 we shall compare, on a uniform basis, some important hot-electron transistors with the junction transistor. It will be shown that none of the proposed hot- electron transistors can compete with the junction transistor in ultimate high- frequency performance. The hot-electron transistors, however, are considered to be useful devices in the sense that they can be employed to study funda- mental physical parameters and processes such as hot-electron lifetimes in metal films and transport mechanisms in insulators. In the last section we shall consider a related thin-film device, the metal- 567 568 Thin-Fim Devices insulator-metal structure. It should be pointed out that there are many other thin-film devices which are not included here, e.g., the thin-fim transducers 4 which utilize the piezoelectric and piezoresistive properties of semiconductor films, and thin-film optical detectors such as the lead-salt detectors. 5 Thin-film transducers have recently been reviewed by Foster. 4 Optical detectors will be considered in the next chapter on optoelectronic devices. 2 INSULATED-GATE THIN-FILM TRANSISTORS (TFT) The insulated-gate thin-film transistor can be constructed in a variety of forms. Figure 1 shows cross-sectional diagrams of typical TFT structures. In the staggered-electrode structure of Fig. 1(a), the metal source and drain electrodes are deposited first on the insulating substrate separated by a narrow space corresponding to the channel length. A semiconductor layer is then deposited. Finally, the insulating layer and then the gate electrode are put down in registry with the channel. For the staggered-electrode structure of Fig. 1(b), the process sequence is exactly inverted. The coplanar-electrode SEMICONDUCTOR SOURCE INSULATOR GATE DRAIN INSULATING SUBSTRATE (a) INSULATING SUBSTRATE- (b) SEMICONDUCTOR- ■INSULATOR , GATEt DRAINt ■SEMICONDUCTOR INSULATING SUBSTRATE NSULATOR DRAIN-; INSULATING SUBSTRATE (d) Fig. 1 Insulated-gate thin-film transistors (TFT), (a) and (b) staggered-electrode structures, (c) and (d) coplanar-electrode structures. (After Weimer, Ref. 1.) 2 Insulated-Gate Thin-Film Transistors (TFT) 569 structures shown in Fig. 1(c) and 1(d) are somewhat simpler to fabricate than the staggered-electrode structures because all the evaporation-requiring precision masking can be carried out in one operation. Typically, glass or sapphire is used as the insulating substrate, cadmium sulfide or cadmium selenide as the semiconductor, gold or aluminum as the metal electrodes, and silicon oxide or aluminum oxide as the gate insulator. (1) Basic Characteristics The basic current-voltage characteristic of a TFT is virtually identical to that of an IGFET as discussed in the previous chapter. We shall make the following assumptions: 6 (1) the mobility of the carriers in the channel is a constant, (2) the gate capacitance is a constant independent of gate voltage, (3) the source and drain metal electrodes are ohmic contacts to the semiconductor, and (4) the initial charge density in the semiconductor is n charges/cm 3 , which is positive for a depletion-type TFT having an initial excess of donor-type states and is negative for an enhancement-type TFT having an initial excess of unfilled traps or acceptor-type states. The main difference in the above assumptions as compared to those used by Ihantola and Moll 6a for the IGFET is that the initial charge density in the semiconductor is taken into account. The analysis is given for the simplified structure as shown in Fig. 2. All the symbols are identical to those used in the previous chapter : L for the channel length, Z for the channel width, and d for the insulator thickness. The thick- ness h of the semiconductor film is an additional parameter. The charge density n(y), induced in the channel region by application of a gate voltage V G , is given by qAn(y) = jiV G - V(yy] (1) where C £ is the gate capacitance per unit area i&Jd), and V(y) is the applied drain voltage at a distance y from the source. The total drain current 1 D may be expressed as I D = <hZ)\o + A<rO0]*, = {hZ)qii n \n + An(y)-]£ y (2) where a and Ao{y) are the initial conductivity and the incremental conduc- tivity due to An(y). Combining Eqs. (1) and (2) gives I D = Zn„ c t £**-H™ 570 Thin-Film Devices INSULATOR- -SOURCE ELECTRODE SEMICONDUCTOR Fig. 2 Simplified structure of TFT. L is the channel length, Z the channel width, d the insulator thickness, and h the semiconductor thickness. I D | dy = Z i i„C i \±-JL+v G -Viy) •>o J o L <-t which yields Id- Zfi„ q L (V G ~ V T )V D - v D 2 2 where V T =- = -qhnJCt. dV{y) (4) (5) We note that the expression of Eq. (5) is identical to that derived for the IGFET. The threshold voltage, V T , now depends on the initial charge density n . Equation (5) is valid for < V D < ( V G — V T ), up to the knee of the I D versus V D characteristic. The resulting characteristics calculated from Eq. (5) are shown by the heavy lines of Fig. 3. Beyond the knee the current is assumed to be substantially constant as in the IGFET. Experimental results of TFTs using various semiconductors 7 ~ lf in both the coplanar and staggered-electrode structures have been in good agreement with the characteristics predicted by Eq. (5). Some typical I D versus V D plots are shown in Fig. 4 for the depletion-type and enhancement-type TFTs. 2 2 Insulated-Gate Thin-Film Transistors (TFT) 571 V D (VOLTS) Fig. 3 Theoretical output (drain current versus drain voltage) characteristics. The heavy lines are from Eq. (5). Beyond the knee the current is assumed to be constant. (After Borkan and Weimer, Ref. 6.) In the region below the knee the drain conductance, g D , and the trans- conductance, g m , are given by 9d = dV T Zn„Ci (V G - V T ) v D -*o 9m 'dV~ L V °- (6) (7) The drain conductance is thus linear with V G , and the transconductance increases with V D . The saturation of the drain current occurs at a value of drain voltage given by (^g — Vt)- This value gives the locus of knees shown in Fig. 3 and is obtained from the condition dljd V D = 0. The saturation mechanism is similar to that of the IGFET and is a geometry-dependent effect which results from the pinch-off of the conducting channel in the neighborhood of the drain. The saturated drain current (at the knee) can be obtained from Eq. (5): I DS « = ^(V G -V T ) 2 . (8) This is the square-law relationship of the saturated drain current to the effective gate voltage (V G — V T ). The transconductance in the saturation region is given by 9m = —7— (V(. ■ c -w) = (^/ D ,„) 1/2 (9) 572 Thin-Film Devices 4 - - / %t*=r — i 1 1 1 1 1 1 — i V D (VOLTS) (a) DEPLETION TYPE (V T = -I VOLT) + 1.0 +0.8 +0.6 + 0.4 +0.2 -0.2 -0.6 -1.0 4 - 2 - + 2.8 + 2.6 + 2.4 + 2.2 CO n o > + 2.0 > u + 1.8 + 1.6 + 1.4 + 1.2 V D ( VOLTS) (b) ENHANCEMENT TYPE (V T £+IV0LT) Fig. 4 Experimental output characteristics for depletion-type (V T < 0) and enhancement- type (V T > 0) TFT. (After Weimer, Ref. 1.) In a depletion-type TFT the saturated drain current at zero gate bias is 1 nn — Zn„ C t V T 2 Z\i n 2L 2LC t (qhn ) 2 (10) It is noted that I DO can be small even for very high carrier density n , provided that the semiconductor thickness h is small and the insulator capacitance is large. 2 Insulated-Gate Thin-Film Transistors (TFT) 573 A figure of merit which characterizes the high-frequency performance of TFT is the gain-bandwidth product which is equivalent to the maximum operating frequency defined for IGFET : /= 9m . (11) Jm InCiLZ v ' We obtain from Eqs. (6) and (7) for V D < (V G - V T ), and / m -^i (Ha) f m ^ti n (V G -V T )l2nL 2 (lib) at or above the knee. (2) Effects of Traps and Surface States From the discussions of the last section it is clear that the electrical charac- teristics of a TFT are basically identical to those of an IGFET. The detailed transport processes in a TFT, however, are more complicated. The major complication arises from the fact that the semiconductor layer is formed by vacuum deposition, and a deposited layer, in general, contains many more defects and crystalline imperfections than the corresponding single-crystal semiconductor. Thus the trapping centers in the semiconductor layer will have profound effect on the device characteristics. In addition, the trapping centers in the deposited insulator layer, the surface states and surface charges near or at the semiconductor-insulator interface, and the metal contacts to the semi- conductor will also influence the device performance. Unlike the diffused source and drain contacts in an IGFET, the metal electrode of a TFT may give rise to nonohmic contacts resulting from the formation of Schottky-type barriers (see Chapter 8). The failure to achieve a good ohmic contact at the source electrode will give a low transconductance (and in some cases the "crowded" characteristics 2 ) which, instead of con- tinuing to increase with increasing gate bias, levels off and decreases toward zero as the family of I D versus V D curves crowd together at a maximum value of/„. The existence of large densities of traps and states can cause a reduction of the channel mobility and can affect the reliability, reproducibility, and perfor- mance of the TFT. In this section we shall consider the influences of these traps and states on the device characteristics. The effect of the trapping centers in the semiconductor layer can be studied by a combination of optical and field-effect techniques. 8 The experimental 574 Thin-Film Devices result of a CdSe thin-film transistor is shown in Fig. 5(a). When illuminated, the device shows a significantly higher saturation current and transconductance than the same device measured in the dark. The transconductance is particu- larly affected by photons with energy slightly less than that necessary for band-to-band transitions. The energy band model for the illumination effect •WITH LIGHT 0.14 - DARK 12 16 20 V D (VOLTS) (a) CONDUCTION BAND (b) Fig. 5 (a) Experimental result of a CdSe TFT. (b) Energy band model for the illumination effect where (A) shows the deep levels, (B) shows both the deep and the shallow levels in dark specimen, and (C) shows the en- hancement of field effect by illumination. (After Poehler and Abraham, Ref. 8.) 2 Insulated-Gate Thin-Film Transistors (TFT) 575 is shown in Fig. 5(b) where (A) shows the deep levels, (B) shows both the deep and the shallow levels in the dark specimen, and (C) shows the enhancement of the field effect by illumination. The incoming photon excites additional electrons to shallow levels, from which they are subsequently field-excited to the conduction band. The field, S, required for excitation from such levels, can be found from the tunneling probability derived previously in Chapter 4. T t ^ exp 4 x /2m*(AE) 3/2 3 qhS (12) The calculated probability for carriers excited from a single level (AE = 0.04 eV) below the conduction band edge is shown in Fig. 6 (dotted line); also shown is the experimental result (solid line) of the drain current as a function of applied gate voltage. Since the number of carriers and hence the current should be proportional to this probability, the agreement between the probability-field curve and the current-voltage curve is indicative of the importance of the traps in the semiconductor layer. 0.6 In VS V, 10 15 20 V G ( VOLTS) 2 3 4 5 6 FIELD STRENGTH, £ (l0 5 V/cm) Fig. 6 Calculated tunneling probability for carriers excited from a single level A£ =0.04 eV and the experimental drain current of the CdSe TFT versus the applied gate voltage. (After Poehler and Abraham, Ref. 8.) 576 Thin-Film Devices We next consider the effect of the surface traps which are located at the semiconductor-insulator interface. The traps are assumed to have effective density N t , a capture cross section a n , and an ionization energy E t measured from conduction band edge. If the average velocity of mobile carriers is v, then in one second a carrier traces out a volume va n of possible recombination. If the density of filled traps is n t , then the density of empty traps is (N t — n t ). The rate at which conduction carriers recombine with traps is va„(N t — n t )n c where n c is the density of conduction carriers. The interaction of trapping centers and crystal lattice releases carriers in the traps at a rate proportional to their number. The rate of release is vo n n t n x , where n 1 is the available density of sites to be refilled by the released electrons; in other words n 1 is the density of carriers which would be present in the semiconductor if the Fermi level were at the trap level, and is given by n x =N c tM-E t lkT) (13) where N c is the effective density of states in the conduction band. The differ- ence in these rates produces the net rate of change of trapped carriers, 9 dn — - = va„(N t - n t )n c -va n n t n^. (14) ot At equilibrium the rate of change of trapped carriers must be zero and there- fore n c {N t -n t ) = n i n t . (15) The total charge per unit area induced which results from the applied gate voltage is given by q(An c + An,) = q[_(n c + n,) - (n co + n t J] = — V G (16) or q(n c + n t ) = ^(V G -V T ) (17) where h is assumed to be equal to the effective inversion depth and V T is the threshold voltage : V T =-^(n co + n t0 ), (18) and n co and n t0 are the initial densities of conduction carriers and trapped carriers respectively. Substituting n t from Eq. (15) into Eq. (17), we obtain 10 2 Insulated-Gate Thin-Film Transistors (TFT) qn c h 577 V. ' = c, mv G -v T )-(v t + v^ + mv G - V T ) - (V t + V,)-] 2 + 4V t (V G - V T )} 1 ' 2 (19) where V t = qhNJCi and V x = qhnJCt . The source-drain conductance at zero source-drain voltage is given by 3d (20) The above expression reduces to the single result derived previously, Eq. (6), when V 1 is small and (V G — V T ) > (K x + V t ), i.e., in the case of small trap densities and large trap ionization energy. Figure 7 shows the theoretical fitting of the experimental conductance characteristics of an evaporated silicon TFT. 10 From the result, we obtained the following device parameters: N t = 4.6 x 10 17 cm" 3 , n co = 9 x 10 16 cm -3 , and n x = 1.5 x 10 15 cm -3 . *!■ Fig. 7 Experimental conductance characteristic of an evaporated Si TFT. (After Salama and Young, Ref. 10.) 578 Thin- Film Devices From Eq. (14) we can calculate the variation of the total charge density, n { = n c + n t = total charge density), resulting from the dc and ac parts of the applied gate voltage. 11 We seek solutions of Eq. (14) of the form n c = n cD + n cA exp(jcot) (21a) n t = n tD + n tA exp(jcot). (21b) Jf the ac parts of the quantities are treated as small signals, we find 11 dn c co, + jco dn co x + co 2 + jco dn t co 2 dn a>! + co 2 + jco (22a) (22b) where co x and co 2 are characteristic of the traps and of the existing dc bias conditions : co, = N c exp(-E t lkT)<T n vl(l - ^ (23a) 0)2 = N t a n v(\-^y (23b) If we assume that a change in gate voltage results in changes of both the carrier concentration and carrier mobility, the conductivity in Eq. (2) should be amended to read Act = qAn c n„ + qn c Aji n (24) where n c is the density of conduction electrons. The transconductance in the saturation region is then given by Z4t^Vo-Vr) (dn c dn\ 9 -= — z — Ur-^j (2) where H n \dn t ) n t the density of trapped electrons, and n the density of total electrons. The first term in Eq. (25) is the direct result of electron density changes in the channel. For dnjdn = 1 (no trapping) this result is identical with Eq. (9). The second term in Eq. (25) expresses the effect of mobility variation on the trans- conductance. 2 Insulated-Gate Thin-Film Transistors (TFT) 579 The small-signal ac transconductance resulting from Eqs. (22) and (25) is now given by 11 ((CO, + PCQ 2 ) 2 + CD 2 \ 1/2 where , N Uco, + pa 2 y + coy { (co, + oo 2 ) + CO ) g = Z^n^CJL (26a) coco 2 (l - /?) (co 1 + co 2 )(coi + poo 2 ) + co 2 tan = , ; — —^ — 7- — 2 ■ (26b) From the above equations, we obtain for the two limiting cases : g m (co -> 0) = g \ \ a?! + co 2 J and g m (eo -+co)=g . (27) If the carrier mobility is constant, fi = 0, then |^ m (co)| is always an increasing function of frequency and tan 6 > 0. When /? > 1, \g„,(co)\ is a decreasing function of frequency and tan 6 < 0. Typical curves are shown in Fig. 8(a) for [1 = 0, 1, and 2. Useful information concerning the trap or impurity level may thus be derived from the frequency dependence discussed above. It is convenient to introduce the peak frequency, co m and to rewrite Eq. (26b) as follows \V>mJ tan0 (28) tan 1 + Equation (28) is plotted in Fig. 8(b) (solid curve). The peak frequency co m will shift with dc bias and with temperature. For /? = 0, we have ^m ^ V <Bi(a)! + co 2 ) (29) so that co m will increase with increasing gate voltage, since n tD decreases with increasing gate voltage. From Eqs. (23) and (29) the activation energy derived from a plot of co m versus \jT should vary from E t (the trap ionization energy) at high temperature to EJ2 at lower temperature. This is observed experi- mentally on CdS TFTs. The experimental phase data obtained at different temperatures are also plotted in Fig. 8(b). The agreement with theory is 580 Thin-Film Devices i.o 0.8 0.6 0.4 0.2 0.01 1 <• — .^1 I - - P-- \f ; 2 - /8 - 1 - 1 1 CU/OJ| la) Fig. 8 (a) Small signal dc transconductance versus frequency. jS Hi ( d f Xn \ fi n \ dn tJ 100 where n c is the density of the conduction electrons, n t the density of the trapped electrons, and [x„ is the electron mobility. /3 = for constant mobility. (After Haering, Ref. 11.) (b) Experimental phase data versus frequency of a CdS TFT. (After Miksic et al., Ref. 12.) reasonably good. 12 The variation of transconductance with temperature is shown in Fig. 9 for a CdS TFT. The behavior is the result of traps as well as of mobility variations. It is obvious that more than one trap level plays a role in these data. The trapping centers in the insulator can cause additional effects of drift and instability in TFT. The kinetics of carrier transfer are still given by the 2 Insulated-Gate Thin-Film Transistors (TFT) 581 1000 10 - 1 1 1 I 1 Vn\. 0l4eV \A \V" 0l5ev \ \ ViX*. 0052 ^ 0.i7ev-V-*\ x >Qno6iev ____^K)l4eV — H \, ^cl_ ~~~~^— II.5V ^^^□0019 ev — 0.24ev\ N, .083eV ~^0 8.2V -— ^ooisev *--4.9V \o.090 ev 1 1 1 0.016 ev Ov G = l.6V 1 1 4.00 5.00 6.00 7.00 8.00 l/Tx I0 3 (°K-') Fig. 9 Variation of transconductance with temperature of a CdS TFT. (After Miksic et a!., Ref. 12.) same expression as in Eq. (14) where N t and n t are the total density of traps and filled traps in the insulator. The density n y is now given by 13 n l = N c exp E cs - E(x) kT (30) where E sc , as shown in Fig. 10(a), is the energy difference between the con- duction band and the Fermi level at the interface, and E(x) is the energy 582 Thin-Film Devices (b) Fig. 10 (a) Energy band diagram of a CdSe-AI 2 3 interface. (b) The trap distribution in the insulator as a function of distance. (After Koelmans and DeGraaff, Ref. 13.) difference between the trap level and the Fermi level in the semiconductor: E(x) = El(x -x)/x 2 (31) where E s is the energy difference at x — 0. E(x) is negative for x > x . It is predominantly the traps at x > x which will be filled during the drift process. If the transport mechanism of carriers to the traps is due to tunneling, then the capture cross section o n has the following form : o n {x) = <7„(0)exp(-ax). (32) cr„(0) is the capture cross section at the interface. The constant "a" depends 2 Insulated-Gate Thin-Film Transistors (TFT) 583 on the height of the barrier and the effective mass of the carriers. Substitution of Eqs. (30), (31), and (32) into Eq. (14) and integration with respect to t yield the concentration of filled traps at time t and distance x: 13 n N n t (x, t) = c * {1 - exp[-f<7„(0)t;(n c + n^expC-ax)]} n c + n l n N c ' -{1 — exp[— exp(ax oc — ax)]} n c + n x where x oc = - ln[ff B (0)u(n c + n^Q. a The distribution represented by the above equation is sketched in Fig. 10(b). At x = x the concentration of filled traps quickly rises to N t because of the x dependence of n x . At x = x oc , n t quickly drops to zero. We can now approxi- mate the actual distribution of Eq. (33) by the rectangular one shaded in Fig. 10(b), and obtain for the total number, N e , of carriers per cm 3 trans- ferred into the insulator at time t: N e ~ N t (x co - x ) c N t Qln[<7„(0)tm c t] -N t x . (34) When N e is measured between the time t and t, we obtain N e (t ^t)^N t -\n(tlt ). (35) a As the variations of the conductivity, Act, are relatively small, Act is about proportional to N e . It is thus expected that, at a given V G and V D , the drain current should decay, and the time dependence of this decay is logarithmic. The experimental results 1 3 of CdSe TFT are in good agreement with the above model in which tunneling of carriers from the channel to traps in the insulator is assumed. In the experiment it is found that \ja ~ 3 A, and x < 60 A which are reasonable for the tunneling model. From the above discussion it is clear that because of the large densities of traps which exist in the semiconductor, in the insulator, and at the interface, the detailed transport processes in a TFT are very complicated. It is necessary to reduce the trap densities in order to improve device reliability, reproduci- bility, and performance. 584 Thin-Film Devices (3) Power Limitations 14 Power dissipation constitutes one of the important device limitations. In order to obtain a more realistic expression for the gain-bandwidth product, power dissipation will be introduced into the basic theoretical characteristics. The power dissipation per unit area at the knee of the I D versus V D plot is r> -'Dsat "Dsat si/-\ p = -^r~ (36) where lDsat = ^2Ld (VDsat)2 (3?a) and V Dsat =V G -V T . (37b) Combination of Eqs. (36) and (37) yields /2LdP\ 113 V Dsat =( • (38) The gain-bandwidth product at the knee is then [from Eq. (11a)] ti V„ 1 /2d\ 1/3 /u \ 2/3 Thus the gain-bandwidth product increases as the cube root of the permitted power dissipation per unit area and as the factor (nJL 2 ) 2/3 . This is in contrast to the factor (nJL 2 ) when power dissipation is neglected. The heat flow pattern in a TFT is shown in Fig. 11(a). Heat is generated in the active region of the device which is in the form of a long narrow strip on the surface of the substrate. The heat can be removed by conduction through the substrate, conduction through the electrodes, and by radiation. The heat flow through an element distance r from the center of the heated region is given by /It H l = -tivkZ— (40) dr where k is the thermal conductivity of the insulating substrate. Integration of this expression yields the heat flow: tzkZ(T, — T 2 ) h,= ;/.. . 2} . 4i) m{bja) 2 Insulated-Gate Thin-Film Transistors (TFT) 585 SUBSTRATE ACTIVE REGION OF DEVICE L= 12 ^.m Z = 150 /j.m b = 500/U.m -APPROXIMATE ROOM TEMPERATURE ISOTHERMAL, T 2 = 1000 A ■■ 1000 A 1000 A (a) ; 1 1 1 ' ' y / TEMPERATURE - RISE — LU l35"C/y / c - < , , co cc CO |_ _J CD - O 3 1 ^ //lyz Ll a : < ■ ~ 1/ □ n . i- . to " < : m u CO - s° ' o - o , . , 1 , , . 1 SUBSTRATE THERMAL CONDUCTIVITY (cal/sec- cm ■ °C) (b) Fig. 11 (a) Heat flow pattern in a TFT. (b) Theoretical and experimental power dissipation for a TFT with device geometry given in (a). (After Page, Ref. 14.) Heat will also be conducted away from the active region through the source and drain electrodes and is given by H 2t'ZK'(T x - T 2 ) (42) where /' is the electrode thickness and k' the electrode thermal conductivity. The heat loss by radiation is given by H 3 = 2.74 x KT^E^V - T 2 4 )ZL (43) 586 Thin- Film Devices where E x — emissivity ~ 5 to 70 depending on metal and surface. The total power dissipation is then given by P(max) = (H x + H 2 + H 3 )/ZL. (44) For practical values of device geometries and solid state materials the most important heat loss is due to the substrate conduction. The theoretical power dissipation (solid lines) for a TFT with device geometry given in Fig. 11(a) is shown in Fig. 11(b) as a function of the substrate thermal conductivity. Also shown are the experimental points for glass substrate and sapphire substrate. We note that, for a temperature rise of 75°C, the maximum power dissipation is about 300 W/cm 2 on glass substrate and 1 x 10 4 W/cm 2 on sapphire sub- strate. The theoretical characteristics of a TFT with geometry outlined in Fig. 11(a) is shown in Fig. 12. The electron mobility is assumed to be 300 cm 2 /V-sec. Superimposed on this figure are the locus of V Dsat and the constant power-dissipation lines. For the device to operate in the saturation region and not exceed the power dissipation limitation, operation must be confined to the right of the locus and below the power curve, e.g., the angle ABC of Fig. 12 for a device on glass. /x = 300cm VV- sec. 100 V n (VOLTS) Fig. 12 Theoretical output characteristics at the constant-power dissipation lines. (After Page, Ref. 14.) 3 Hot-Electron Transistors 587 3 HOT-ELECTRON TRANSISTORS (1) Hot Electrons in Metals As defined previously, a useful solid-state device is one which can be used in electronic applications or can be used to study the fundamental physical parameters. All the hot electron transistors, at the present time, belong to the latter category. We shall consider first the hot-electron lifetime in metals. By hot electron we mean an electron having an energy more than a few kT above the Fermi energy, where k and T are Boltzmann's constant and lattice tem- perature respectively, and thus the electron is not in thermal equilibrium with the lattice. The simplest approach which gives the dependence of the hot-electron life- time on energy is illustrated in Fig. 13. Because of the Pauli Exclusion Principle, the excited electrons with energy (E — E F ) above the Fermi level can only interact with the conduction electrons in the energy range —(E — E F ) relative to the Fermi energy (the shaded area). The lifetime, t, of a hot electron in its excited state is inversely proportional to the number of con- duction electrons it can excite, ~N(E F )(E — E F )> and also is inversely propor- tional to the number of states available for it to go to after excitation, likewise N(E F ) N(E) Fig. 13 Electron energy distribution based on a free electron model. 588 Thin-Film Devices ~ N(E F )(E — E F ). The functional form of the lifetime for low-energy excitation is thus given by T~(E-E F y 2 (45) which means that the larger the excitation energy above the Fermi energy, the shorter the hot-electron lifetime. More detailed calculation based on the free electron model using self- consistent dielectric constant approach 15 gives the following expression for the lifetime of hot electrons with initial energy close to the Fermi energy: 1 _ 1 q 2 1 r _ l x 32na B h(y r J4) 3 < 2 r n M 2(yr s ) + 1/2- \2 (E - E F Y K F) (46) (yr s ) 1/2 4 + yr s \ EP 2 E 1/2 x ~ rl'\E - E F y 2 E^ 2 E 1/2 (47) where a B is the Bohr radius (0.53 A), r s the electron spacing measured in the Bohr radius such that §n(r s a B ) 3 = l/n, n the electron density, and y = 0.656. The values of r s and conductivity data for fifteen common metals are listed in Table 11.1, where l p is the electron-phonon mean free path, and v F is the electron velocity at the Fermi level. 16 Figure 14 shows the lifetime as a function of r s and the excitation energy from the bottom of the conduction band to twice the Fermi energy. 15 ' 17 For E < E F , the lifetime is that for hot holes. For a hot hole whose initial energy is very close to the Fermi energy, the lifetime is identical to that for the hot electron given by Eq. (46). For \(E — E F )/E F \ w 1, i.e., for holes close to the bottom of the conduction band or for electrons at twice the Fermi energy, the lifetime has been obtained by numerical computation. The electron-electron mean free path is given by the product of the lifetime and the electron velocity iv~yfE): l e =xv~ (r s E F y\E - E F y 2 E. (48) For higher electron energies such that E > {E F + ha> p ), we must consider the creation of plasmons which are the collective modes of vibration of the electron gas, where co p is the plasma frequency defined by co p = Jnq 2 lme . (49) The lifetime for a plasmon is given by 15 a By /2mE [* (Je f + co p - S /E i K .... , . J F 1 X = h(» p L K^-jE-tuo, (50) 3 Hot-Electron Transistors 589 u 2 ° £ Z ui O J u £ z 8 u X 1 O X o o 00 o 00 ©' on ©" © VO ts en © en r- en on en S 00 3 8 en /^ © vo o © en © © en ' © © © en en © >/n VO © © en © 5? 1 o 00 ON © VO en >/n CO en </n CvJ en en © en © en ON VO © c4 -3 © en oo r4 VO c4 ci ON oo oq I-; VO VO V~) Tt - tff </-> oq ci oo en" 00 en •>*' t- vn vo </-> </->' >n r-' r-. 3 6 5 2 - < - - - ©■ - - vn ©" VO ©" ~ VO ©■ *— i - ©' - en c o o *■* w « a in oo O en r- en r- # c4 en 00 en © 00 vn 00 OS VO 00* oo' 3 05 o ol u Oh £ 3 % 60 < 3 < O u 3 U < 590 Thin-Film Devices HOT HOLES HOT ELECTRONS , n - 17 1 i i i i mi . , i I i i nun l l 1 1 lllll -to -o.i r aoi o.oi o.i To (E-E F )/E F i iim iiiii i ,, i i i i nun i i 1 1 iiiii (5 OS 099 LOI Hj 2:0 E/Ec Fig. 14 Hot-electron and hot-hole lifetimes as a function of r s and the excitation energy where r s is the electron spacing measured in Bohr radius such that exactly one electron is contained in a sphere with radius r s . (After Matizuki and Sparks, Ref. 17.) The hot-electron lifetimes in gold (r s = 3.0) and aluminum (r s — 2.0) are shown in Fig. 15(a) and 15(b) respectively. We note that the lifetime is a monotonically decreasing function of energy, and an abrupt decrease is expected at the plasma frequency. The values of the plasma frequencies are listed in Table 11.2. Since the plasmon created must take up the momentum k p as well as the energy, the modified frequencies Hco p (k p ), which are also listed in Table 1 1 .2, are about 1 5 % to 20 % larger than the corresponding Hco p . We conclude that, from the above approaches based on the free-electron model, the lifetime is strongly dependent on the initial energy and is expected to decrease with increasing excitation energy. The experimental results of the hot-electron lifetime and electron-electron mean free path are obtained by the use of hot-electron transistors and other related thin film devices to be considered next. It will be shown later that there is general agreement between the experimental results and the theoretical predictions. 3 Hot-Electron Transistors 591 TABLE 11.2 PLASMON ENERGIES (FREE-ELECTRON MODEL) Metal r s 10 16 rad/sec hoi p (eV) fico p (k p ) (eV) Cs 5.8 0.54 3.52 4.2 Rb 5.2 0.59 3.92 4.6 K 4.9 0.66 4.36 5.2 Fe 4.2 0.83 5.4 6.4 Na 4.0 0.88 5.8 6.8 Ba 3.6 1.03 6.8 8.0 Pd 3.5 1.1 7.2 8.5 Pt 3.4 1.13 7.4 8.7 Li 3.25 1.21 8.0 9.4 Ni 3.2 1.30 8.5 10.0 Ag 3.0 1.37 9.0 10.5 Au 3.0 1.38 9.0 10.5 Co 2.9 1.40 9.1 10.7 Cu 2.6 1.64 10.8 12.7 AI 2.0 2.4 15.8 18.7 (2) Comparison of Hot-Electron Transistors In the past decade many transistor-like three-terminal structures have been proposed which basically consist of alternating layers of metal and insulator or semiconductor. The first of these structures, a metal-insulator-metal- insulator-metal structure (MIMIM), in which current flow through the insulator layer occurs by tunneling, Fig. 16, was made by Mead 3 in 1960. Spratt et al. 18 pointed out that the current gain of such structures could be greatly improved by replacing the collector insulator by a Schottky barrier semiconductor layer, Fig. 17(b). Rose, 19 Attala and Kahng, 20 and Geppert 21 continued the process of development by suggesting that the tunnel emitter be replaced by a Schottky barrier emitter, Fig. 17(c). Wright 22 in 1962 suggested 592 Thin-Film Devices Fig. IS (a) Hot-electron lifetimes in gold (r s = 3.0). a transistor structure using a space-charge-limited emitter, Fig. 17(d). The hot-electron transport and electron tunneling in various thin-film structures have been reviewed recently by Crowell and Sze. 23 In this section we shall compare these transistors with the junction tran- sistor based on their high-frequency performance. In the next two sections we shall consider the basic physical parameters which can be obtained from these transistor structures. The main difference in these transistors shown in Fig. 17 is the method by which the electrons are injected into the base. 24 For the tunnel transistor the electrons are injected by tunneling through the thin insulator layer. For the space-charge-limited transistor (SCLT) the electrons travel from the emitter 3 Hot-Electron Transistors 593 i i i i i 1 1 i i i i i i i ii TlCDn(kp) \ il I Vl I I III I 10 (E-E F ) (ev) (b) 100 Fig. 15 (b) Hot-electron lifetimes in aluminum (r, = 2.0). (After Quinn, Ref. 15.) by a space-charge-limited process. For the semiconductor-metal-semiconduc- tor transistor (SMST) the electrons are emitted by the Schottky-type thermionic emission process. Once the electrons are injected into the metal base, the transit time through the thin metal film is very short (e.g., for a 100 A film, the time is about 10" 14 sec). Thus during this time interval the electrons are not in thermal equilibrium with the lattice — hence the name hot- electron transistor. (A) Emitter Conductance and Emitter Charging Time. Since all the hot-electron transistors differ only in their emitter structure, we shall 594 Thin-Film Devices EMITTER \ BASE COLLECTOR \ N y yy ^^ 1 M Fig. 16 Band diagram of the first proposed hot-electron device — a metal-insuiator-metal structure. (After Mead, Ref. 3.) compare the emitter characteristics such as the current-voltage relationship, the capacitance-voltage relationship, the emitter conductance, and the emitter charging time. The results are listed in Table 1 1 .3 for the four transistors shown in Fig. 17. The assumptions and notations used are as follows: 24,25 (a) For the n-p-n junction transistor the emitter junction is a step n + p junction of unity injection efficiency. The base width is W B and concentration N B . A unity base-transport factor is assumed. V D is the diffusion potential, and V EB the applied emitter-base voltage. D n is the diffusion coefficient of electrons in the base. We shall use N B = 10 17 cm -3 and W B = 1 /mi as the parameters for a typical high-frequency transistor. (b) For the semiconductor-metal-semiconductor transistor, the emitter efficiency is unity (i.e., no minority carriers are injected). The emitter is uniformly doped to a concentration N E , the emitter barrier height is 4> B , and A** is the effective Richardson constant (defined in Chapter 8). Typical parameters of an SMST are (f> B = 0.8 V, N E = 10 16 cm -3 , and W B = 100 A. (c) For the tunnel transistor the current flow is assumed to obey the Fowler-Nordheim relation of field emission similar to that derived for tunnel diodes. The thickness and the permittivity of the insulator are W E and e e respectively, the metal -insulator barrier height is 4> B . Typical parameters to be considered are <f) B = 1 V, W E = 20 A, and sje = 4. (d) For the space-charge-limited transistor, it is assumed that the emitter region W E is free of fixed charges or traps with only one type of carrier present, and that throughout the region the carrier velocity equals \i$ where \jl and S are the carrier mobility and electric field respectively. 3 Hot-Electron Transistors 595 (a) JUNCTION TRANSISTOR (b) TUNNEL TRANSISTOR W B V (c) SEMICONDUCTOR- METAL - SEMICONDUCTOR - TRANSISTOR CdS Au (d) SPACE-CHARGE- LIMITED TRANSISTOR Fig. 17 Band diagrams of three hot-electron transistors along with that of the bipolar transistor. (After Moll, Ref. 24.) Based on the relations listed in Table 11.3, the emitter conductance g e = dJ E jdV EB is calculated and is shown in Fig. 18(a). It is seen that the bipolar transistor and SMST have the highest emitter conductances due to their strong exponential dependence of emitter current on voltage. The space-charge-limited transistor has the lowest conductance due to its weak current- voltage dependence {J E ~ K| B ). 596 Thin-Film Devices 10° 10" J E (AMP/cm 2 ) (a) J E (AMP/cm') (b) Fig. 18 (a) Theoretical emitter conductances as a function of emitter current density for the four transistors as shown in Fig. 17. (b) Theoretical emitter figures of merit as a function of emitter current density, for the four transistors. (After Atalla and Soshea, Ref. 25.) 3 Hot-Electron Transistors 597 Figure 18(b) shows the calculated emitter figure of merit, 25 gJC e , which is the reciprocal of the emitter charging time x e . It is to be noted that here the SMST and the junction transistor have essentially the same emitter perfor- mance, both having the highest figures of merit. They are followed by the SCLT and finally the tunnel transistor which exhibits the most serious emitter limitation. (B) Maximum Oscillation Frequency (f max ). To compare the fre- quency performance of the hot-electron transistors, we shall use the maximum- oscillation frequency as a figure of merit. For simplicity we shall use a stripe geometry shown in Fig. 19, with an emitter stripe width S, spaced 5/2 from the base stripes. 26 The base resistance due to the metal film is r b -mm- and the collector capacitance is C c = 2SL e c /x c where L is the stripe length, 8 C the collector semiconductor permittivity, x c the collector depletion-layer width, and p m is the resistivity of the metal base. The maximum oscillation frequency (/ max ) is given by 27 1/2 /max An Tt, C-„ A n X„ (51) where a is the common-base current gain, and x ec is the emitter-to-collector signal delay time. It will be shown in the next section that the common-base current gain, a, in a hot-electron transistor can be expressed as a = a* exp(— W B jL B ) (52) where a* is the value of a extrapolated to zero film thickness, and L B is the ballistic mean free path, i.e., the mean distance an electron can travel in the BASE CONTACTS EMITTER STRIPE BASE COLLECTOR Fig. 19 Transistor geometry with an emitter stripe width S spaced S/2 from the base stripes. (After Early, Ref. 26.) 598 Thin-Film Devices metal base without undergoing any scattering event. For the hot-electron transistors considered, the base transit time is small and can be neglected, hence Cjg e + 2v sl (53) where x c is the collector depletion-layer width and v sl is the carrier scattering- limited velocity. When we substitute Eqs. (52) and (53) into (51), and maximize the/ max with respect to the metal film thickness, we obtain L l 4^S a*(3L B /2ep m e c ) 11/2 ljv sl ,+ 2CJg e x c _ (54) A comparison of/ max versus emitter current density for the hot-electron tran- sistors is shown in Fig. 20. It is clear that the highest-frequency performance should be obtainable by the SMST, followed by SCLT, and finally by the tunnel transistor; and that the only hot-electron transistor which has the potential to give high-frequency performance superior to that of the junction transistor is the SMST. In the next section we shall consider in more detail the limitations and the usefulness of the SMST. 100 : S = IO/im : SMST >-" . SCLT y TUNNEL 1 : / - JUNCTION / - 1 III Mil 1 1 1 III TRANSISTOR^ i i i i i i i i 10" |<3* J c (AMP/cm 2 ) Fig 20 Maximum oscillation frequency versus emitter current density for the hot-electron transistors. (After Sze and Gummel, Ref. 27.) 3 Hot-Electron Transistors 599 (3) Semiconductor-Metal-Semiconductor Transistor Although the SMST has the potential to give a superior high-frequency performance, the small current gain a of an SMST severely limits its applica- tion in practical microwave circuits. The basic reasons that give rise to the low current gain are as follows: (1) the base transport loss due to electron-electron and electron-phonon scatterings, (2) the electron-phonon interaction in the emitter and collector semiconductors, and (3) the quantum-mechanical reflection at the metal-collector-semiconductor interface. The base transport factor is given by exp(— W B /L B ) as in Eq. (52). The ballistic mean free path, L B , is given by 28 \jL B = 1//, + \jl e + \lh (55) where l p is the electron mean free path for phonon scattering, l e the electron- electron mean free path, and / ; the electron mean free path for impurity and defect scattering. To improve the base transport, we must use a metal with a long ballistic mean free path. In gold film it has been found that L B ~ 220 A for 1-eV electrons at room temperature. The collection efficiency a c , due to electron-phonon interaction in the collector semiconductor can be given, to a first approximation, as the probability that an electron can reach the potential energy maximum x m (refer to Chapter 8, x m is measured from the metal- semiconductor interface) without being scattered by optical phonons with mean free path X; and a c is given by 29 cc c = exp(-xJX). (56) From the dependence of x m on electric field $ due to the Schottky effect and the dependence of X on temperature due to emission and absorption of phonons, we can write a c as follows : a c = exp{-^/(167ce S (f)/[A tanh(E p /2kT)l}. (57) It is clear from this equation that in order to improve the collection efficiency, we must apply a large field, and use a semiconductor with a long phonon mean free path (X ) and a large phonon energy (E p ). The third limitation, quantum-mechanical reflection at the collector, comes about because of the sudden change in potential as an electron travels from the metal to the semiconductor. 30 The above effects are summarized 27 in Fig. 21 . Curve (1) is for the quantum- mechanical transmission (QMT) which increases with increasing incoming 600 Thin-Film Devices O I Q "" Z uj o a i- ii N B S :*« O ^~£ 51 1 i o 1 Mn^, © o i O b S ° © rt w u -c 2 3 X X X c-1 X <u o o s rt •* ■* ■* O X o X © X © U ^ 2 Tt Tf "* ^ H ^ w <0 o a so I to 1 1 El] Jh ft) 2 O >«— ■ rs «s S w b] 1 "I ^k </] ct o !2~s CQ t« -e- "C ?s< <u ^■^ o 1 * £ *c 03 /— s in <3< u 1 1 ! > cr> > I m "5 <u CO a. a\ loo m e £ s 5S- II 21 II II II II *? ^ ^ ^ *? ^ 1 -1— lH U o o o Ih So «t-i o y y Uj O ■" 3 3 rt « "55 >> S3 * e .o t> a C3 G o . o .o «g _o £ u B ++ 1 |b a c 8S S 4> 5 C« S E > in ~ o II 8 > II © II II o s a. '^ S s? O > 3 Hot-Electron Transistors 601 90 80 - 50 THEORETICAL QUANTUM- MECHANICAL TRANSMISSION COEFFICIENT (OMT) ^ << ^— y (2) PRODUCT OF QMT AND COLLECTOR EFFICIENCY A ^ — "Til o GaP ss^ s r i f GaAs ■ ^-— — T"" (4) i Ge ^ t/^ i 1 1 , 1 1 0.2 0.4 0.6 0.8 ENERGY IN EXCESS OF COLLECTOR BARRIER (eV) Fig. 21 Curve (1) isfor quantum-mechanical transmission (QMT). Curve (2) combines QMT and the collector efficiency due to phonon effects. Curve (3) further incorporates the effect due to electron-phonon scattering in the emitter semiconductor. Curve (4) is the final result of the common-base current transfer ratio. (After Sze and Gummel, Ref. 27.) electron energy. The second curve is the combined result due to QMT and the collector efficiency. Curve (3) further incorporates the effect due to the electron-phonon scattering in the emitter semiconductor. The final result for the common-base current gain is given in the bottom curve, which includes the base transport loss through a 100 A gold film. Also shown in Fig. 21 are some experimental results which are in reasonable agreement with the theoretical prediction. We note that the current gain is only of the order of 0.3. Because of this low value of a, the SMST shows current loss and can 602 Thin-Film Devices COARSE SPACING ADJUSTMENT FINE SPACING ADJUSTMENT METAL- FILM (BASE) CONTACT COLLECTOR CONTACT SEMICONDUCTOR COLLECTOR Fig. 22 Schematic diagram for the experimental setup of a semiconductor-metal-semi- conductor transistor. (After Sze et al., Ref. 31.) attain power gain only by means of impedance gain. The SMST with low a is also expected to have large partition noise. For a = 0.3, the minimum noise figure is found 27 to be 7.9 dB [refer to Eq. (56) of Ch. 6]. In addition to the above drawbacks, we have the unsolved technological problem of deposition of device quality semiconductor materials on thin metal films. It is thus unlikely that the junction transistor can be replaced by any of the proposed hot-electron transistors. The hot-electron transistors are never- theless useful devices in the sense that they can be used to study fundamental physical parameters such as the hot-electron lifetime and the transport properties through thin films. A schematic diagram 31 is shown in Fig. 22 for the experimental setup of SMST. The cantilever beam is used as a stable micromanipulator capable of incremental adjustments of the order of 10 A to make a nondestructive con- tact between a smoothly pointed and freshly cleaned semiconductor needle and a thin metal film evaporated on polished semiconductor substrates. The 3 Hot-Electron Transistors 603 substrate served as the collector semiconductor, the metal film as the base, and the needle as the emitter semiconductor. The collector current versus voltage is then measured with the emitter current as a parameter. 31 A typical collector characteristic is shown in Fig. 23. The emitter-collector incremental current gains (a = dI c /dI E ) are then obtained. Figure 24 shows the current gain as a function of gold film thick- ness for a GaP emitter point on Au-Ge, -Si, -GaAs, -CdSe, and -CdS collector barriers. As expected from Eq. (52), there is a linear relationship between Ina and W B . The slope can be used to determine the ballistic mean free path, L B . We note that even when W B = 0, a < 1, and the slopes are essentially independent of the collector semiconductors. These results are in agreement with the previous discussions ; because of the phonon scattering and quantum-mechanical reflection at the collector barrier, the overall collec- tion efficiency is reduced. Among the five collector semiconductors, Ge gives the highest a at any given metal thickness. This is because Ge has a very large optical-phonon mean free path (~65 A), and the energy difference between the emitter (Au-GaP) and collector (Au-Ge) barrier height is large enough (~0.7 eV) that the quantum-mechanical reflection is small. 0.2 0.1 - Si-Au-Ge ^oeroo^ W B =90A , • .5 l£-- — ■ 1 1 -.4 '.3 .2 '.1 1 1 -0 12 3 4 COLLECTOR -BASE VOLTAGE, V C 8 (VOLTS) Fig. 23 Collector characteristics of a Si-Au-Ge SMST with 90 A Au film. (Ref. 31.) 604 Thin-Film Devices Figure 25 shows similar results obtained at 105°K and 298°K for a Si point emitter in contact with Au-Si and Au-Ge Schottky diodes with varying metal film thicknesses. 28 The measured L B is 300 A + 10 A at 298°K and 370 A ± 30 A at 105°K. The temperature dependence of L B is mainly due to l p , the electron mean free path of phonon scattering. If we assume that l p has its bulk values (406 A at 298°K and 1150 A at 105°K), the predicted L B at 105°K is 360 A ± 20 A and is in good agreement with the experimental result. Another interesting result in Fig. 25 is that the values of a* (at W B = 0) increase with decreasing temperature. This is mainly due to the increase of the optical phonon mean free paths in the emitter and collector semiconductors at lower temperatures. To study the energy dependence of L B , we shall briefly discuss the electron- phonon and electron-impurity scattering processes. For free electrons an electron-phonon mean free path proportional to the square of the electron 5 0. 0.01 GaP-Au- SEMICONDUCTOR COLLECTOR-Ge 100 200 300 400 FILM THICKNESS, W B U) 600 Fig. 24 Current gain versus the gold film thickness for a GaP emitter point on Au-Ge, — Si, — GaAs, — CdSe, — CdS collector barriers. 3 Hot-Electron Transistors 605 kinetic energy has been predicted by Wilson. 32 In most of the metal films there are, however, additional scattering mechanisms such as the electron- defect and electron-impurity interactions which are found by Mott 33 to have an energy dependence similar to that of the electron-phonon interaction. Thus when carriers in a single parabolic band are involved, one can combine Wilson's and Mott's results to relate the hot-electron mean free path for lattice-related scattering mechanisms, l c , to the electron mean free path for electrical conductivity, l„. Then l c = l a (E/E F y (58) where the electron energy E is measured from the bottom of the conduction band. It can be shown from Eqs. (48), (55), and (58) that the following relationship between the ballistic mean free path L B and the electron energy is expected 23 i.o Si-Au-Si QOI 200 300 400 FILM THICKNESS, W B (A) 500 600 Fig. 25 Current gains versus the gold film thickness for Si-Au-Ge and Si-Au-Si structures. (After Crowell and Sze, Ref. 28.) 606 Thin-Film Devices or 1/L B = l// c + l// e = (E F /E) 2 /l a + -(E- E F ) 2 (E F /E) (59) (E/E F ) 2 /L B = l/l a + -(E- E F )\E/E F ) (60) where £ is a constant of proportionality which includes parameters such as r s . From Eq. (60) a plot of (E/E F ) 2 /L B versus (E - E F ) 2 /(E/E F ) should yield a straight line. Figure 26 shows the mean free paths reported for GaP, GaAs, 22.0 20.0 18.0 16.0 - 14.0 - 12.0 - ~ m 10.0 - (E/Ep) (E-E F r (evr Fig 26 Ballistic mean free paths versus electron energy in Au, Ag, and Pd. (After Crowell and Sze, Ref. 23.) 3 Hot-Electron Transistors 607 Si, and Ge point emitters on Au films and GaP, Si, and Ge point emitters on Ag and Pd films. 31 These results are in reasonable agreement with Eq. (60). The L B values and the lifetimes deduced from the parameters of best fit for electrons 1 eV above the Fermi level are listed in Table 11.4. The quantity l a which is obtained from Fig. 26 for (E - E F ) = are comparable to the mean free path determined from the electrical conductivity measurement. The measured hot-electron lifetimes are also in reasonable agreement with the predicted values. It is clear from the above discussions that the SMST is a useful device for studying the hot-electron transport in thin metal films. In addition it can give qualitative results concerning the electron-phonon interactions in the semi- conductors and the quantum-mechanical reflection at the metal-semiconductor interface. TABLE 11.4 ELECTRON MEAN FREE PATHS AND LIFETIMES (E-E F )=le\ E=E F Metal Lb(A) T(10- 14 sec) /.(A) /p(A) Ag 265 6.8 310 570 Au 220 7.0 220 406 Pd 87 3.9 88 110 (4) Tunnel Emission Devices If the collector insulator-metal assembly as shown in Fig. 16 is replaced by a vacuum, we have a simplified metal-insulator-metal tunnel-emission diode structure. Its band diagram is shown in Fig. 27(a). This structure has been used extensively to study the transport mechanisms of hot electrons in both the thin metal films and the thin insulating films. A schematic experimental setup is shown in Fig. 27(b). A metal (e.g., Al) is first deposited on a glass substrate. Next, an insulating film (e.g., A1 2 3 ) of the order of 50 A is formed or deposited on the metal. The " base " metal overlayer film (e.g., Au) with a thickness of the order of 100 A is then deposited onto the insulator. When a voltage, V a , larger than the metal-vacuum work function (0 M ) is applied between the metals, electron emission into the vacuum can occur, Fig. 27(a). Figure 28 shows a typical experimental result of Al — A1 2 3 — Au struc- tures. 34 The current ratio I y l(I x + I 2 ) is plotted against the Au film thickness for an applied bias of 6 volts where I t is the emitted current which is collected 608 Thin-Film Devices COLLECTOR I M VACUUM (a) THIN INSULATOR I i— METAL FILM COLLECTION PLATE lb) Fig. 27 (a) Energy band diagram of a metal-insulator-metal tunnel emission structure. (b) Schematic experimental setup. by the collection plate and I 2 is the diode current. We note that typically less than 1 % of the electrons which reach the metal base escape into the vacuum. We also note the strong increase in emission current when a monolayer of barium is deposited on the gold surface to lower the surface work function from 4.8 volts to about 2.7 volts. From Fig. 28 the hot-electron ballistic mean free path is obtained to be about 50 A for electrons in gold with an energy of 6 eV. To study the effect of the work function and the transport losses in the 3 Hot-Electron Transistors 609 insulator and the metal films, we shall use a more detailed schematic energy band diagram under emitting condition as shown in Fig. 29. Consider first the energy spectrum of the electrons injected into the conduction band of the insulator. The applied voltage necessary to produce emission over the surface potential barriers (</>„,) of the gold film is larger than the internal barriers <f> x and (f> 2 by an amount sufficient to permit use of the simple Fowler-Nordheim equation for the tunneling process. 343 Using this approximation, the half- width S(%) of the total energy distribution N t (E) at 0°K is given by 35 m) = 10"Vln2 (eV) (61) -., io - 200 400 AU THICKNESS (A) 800 Fig. 28 Experimental results of Al-Al 2 3 -Au structures. The current ratio /i(/i + / 2 ) is plotted against the Au film thickness. (After Kanter, Ref. 34.) 610 Thin-Film Devices METAL I Fig. 29 Schematic energy diagram of the tunnel emission structure under emitting con- dition. Superimposed on the diagram are the electron energy distributions. (After Handy, Ref. 35.) where i is the field in V/cm, and fa is the barrier height. A typical operating field is in the range of 10 6 to 10 7 V/cm, which gives for t = 2 V, a half- width range of S(%) = 0.005 to 0.08 eV. At higher temperatures the half-width will be widened, e.g., at 10 7 V/cm and 300°K, 8($) ~ 0.15 eV. Thus after tunneling into the conduction band of the insulator, the electron energy distribution is very narrow and can be effectively described by a delta function. This distribu- tion is shown schematically in Fig. 29. Once electrons have tunneled to the conduction band in the insulator, the generation of optical phonons occurs as the electrons gain kinetic energy from the electric field. As shown in Fig. 29, the electron energy distribution spreads as electrons traverse the insulator, and becomes N 2 {E) at the insulator-metal interface. Since the hot-electron transport in the second metal film is essentially ballistic, i.e., any scattering event will remove the electron permanently, the electron distribution N 2 (E) at the metal-vacuum interface is given by N 3 (E) =s JV 2 (£)exp(- W B jL B ). (62) 3 Hot-Electron Transistors 611 The electrons that can be emitted into the vacuum are those with energies above the metal work function (0 m ) : h ~ f iV 2 (E)exp(- W B /L B ) dE = exp(- W B /L B ) N 2 (E) dE. J q<t> m l^m (63) From Eqs. (62) and (63) we note that the measured energy distribution of the emitter electrons actually corresponds to the distribution at the insulator- metal interface apart from a constant factor, exp(— W B /L B ). The experimental results of the normal energy distributions for Al — A1 2 3 — Au structures are shown in Fig. 30 for four different oxide thicknesses. 36 It is obvious that the peak energy of the energy distribution falls well below the peak energy of the injected distributions, and that the half-widths are larger than <5(|), Eq. (61), by roughly an order of magnitude. This indicates the strong scattering effect in the insulator. The dependence of the peak energy on the insulator thickness is plotted in Fig. 31 for similar gold film thicknesses and electric fields. The slope is about 0.03 eV/A in A1 2 3 . Since the Debye temperature of aluminum oxide 37 is 1200 to 1500°K, the optical-phonon energy should be ~0.1 eV. - 1 1 1 I 1 A^Oj THICKNESS 1 1 1 1 _ o 75 A i _ • 100 A 9 A 125 A / / \ •/ V /I - d 150 A r \ - i i i i # I I I i^ 10 -9 -8 -7 -6 -5 -4 -3 -2 -I NORMAL ELECTRON ENERGY MEASURED FROM E F (eV) Fig. 30 Experimental results of the normal energy distributions for Al-Al 2 3 -Au structures for four different oxide thicknesses. (After Kanter and Feibelman, Ref. 36.) 612 Thin-Film Devices Ep,= S -i.o -1.5 < -2.0 \ \ \ \ SLOPE -0.03 eV/A '8 x 10 , 270A \ \ ' v/cm\ ^. A AU J -"A 7 x IO%/cm\\ j 225A Au J ^1 \ '6.5 x 10 V/cm , 320A Au \ W \ ^6.7 x io 6 V/cm v, 320A Au \ )\ 25 50 75 100 OXIDE THICKNESS (A) 150 Fig. 31 Dependence of the peak energy on the insulator thickness of Al-Al 2 3 -Au struc- tures with similar gold film thicknesses and electric fields. (After Handy, Ref. 35.) Consequently the hot-electron mean free path in A1 2 3 is about 3 A [0.1 eV/(0.03 eV/A)]. This value is in reasonable agreement with the result obtained from a transistor structure of Al— A1 2 3 — Al— A1 2 3 — Al films 38 (Fig. 16). The scatterings in the insulator thus cause a rapid degradation of energy in the electron distribution and tend to randomize the electron momentum distribution before the electrons are injected into the metal base. This makes it very difficult for electron emission to occur with appreciable efficiency. And this is the main reason that the emitted electrons from such structures are typically 1 % of the electrons which reach the metal base. 3 Hot-Electron Transistors 613 A comparison 23 of the theoretical hot-electron lifetime in gold and the experimental results is shown in Fig. 32. The experimental data are obtained from the transport measurements in SMST, tunnel emission structures, and Schottky barriers. 39_39c TheresultsshowninFig. 32 indicate that there is general agreement between the lifetimes deduced from the measurements of various hot-electron structures. Over the energy range 0.1 to 10 eV the measurements are also in general agreement with the theoretical expectations, but the theoretical results cannot be expected to reflect the details of the band struc- ture far from the Fermi level. When the c/-band shielding effect 40 and the exchange effect 41 due to the antisymmetry of the wave functions are included, the lifetime is expected to be longer. This will bring closer the theoretical predictions and the experimental results. Fig. 32 Comparison of theoretical (solid line) and experimental lifetimes in gold. (After Crowed and Sze, Ref. 23.) 614 Thin-Film Devices 4 METAL-INSULATOR-METAL STRUCTURE Another related thin-film device is the metal-insulator-metal (MIM) structure in which the electrons from the first metal can tunnel 42 and/or thermionically emit 43 ' 44 into the insulator film and can be collected by the second metal. The MIM structure is different from the tunnel emission devices discussed previously in that the second metal of the MIM is very thick and we are not concerned with the hot-electron transport in the second metal. In this section we shall be mainly concerned with the tunnel effect. The basic energy band diagrams of MIM with similar metal electrodes are shown in Fig. 33 under three biasing conditions. If the barrier height (f) is large enough and the insulator thickness d is small enough, the dominant mechanism of current transport is tunneling. The tunneling probability is given by the WKB approximation : T t (E x ) = exp{ - ~ f^2mlqV(x) - EJ dx} (64) where E x = mv x 2 /2 and is the energy component of the incident electron in the normal direction. The number N t of electrons tunneling from electrode 1 to electrode 2 is given by 42 d-jrfn 2 r Em i* 00 N t = —3- I T t (E x ) dE x I F(E) dE r (65) n J o J o where E m is the maximum energy of the electrons in the electrode, F(E) is the Fermi-Dirac function, and E r is the energy associated with the transverse velocities or E r = m(v 2 + v z 2 )/2. The number N 2 of electrons tunneling from electrode 2 to electrode 1 is given by an expression similar to Eq. (65) except that the function F(E) is replaced by F(E + qV) where V is the applied voltage. The net flow of current through the barrier is then r Em (4nm 2 r°° \ J~qN = q(N t -N 2 ) = q ^ T t {E x ) dEj^- £ [F(E) - F(E + qV)-] dE r \. (66) At 0°K, for an arbitrary barrier, the above equation is simplified to 42 J = J [$ exp( - Ay/4) -(<f> + F)exp( - Aj$ + V)~\ (66a) where J = q 2 l[2nh(Ad) 2 ] A = 4n(Ad)y/2mq/h 4 Metal-lnsulator-Metal Structure 615 and $ is the mean barrier height above the Fermi level as shown in Fig. 34(a). Equation (66a) can be interpreted as a current density / $»exp(— A^/lfi) flowing from electrode 1 to electrode 2 and a current density Jo(<l> + ^)exp( — Asjif) + V) flowing from electrode 2 to electrode 1. We now apply Eq. (66a) to the ideal symmetrical MIM structure as shown in Fig. 33. By ideal we mean that the temperature effect, the image-force // // ^ Jqv V/VA V// #; (b) v < Fig. 33 Energy band diagrams of metal-insulator-metal structures with similar metal electrodes. 616 Thin-Film Devices --. \ /q</>(X) //A fqv 1 2 (a) Fig. 34 (a) General barrier of a metal-insulator-metal structure (MIM). effect, and the field-penetration effect in metal electrodes are neglected. For < V < 4> , Ad = d, and <j> = <j> — V/2, the current density is given by J = JoiWo ~ *72)exp( - Aj^o^Vji) - (4> + K/2)exp( - A J fa + V/2)} (67) For larger voltage, V > <f) , we have Ad = d(f> /V, and $ = o /2. The current density is then 42 ,2/2 / = 4nh(f) {exp(-* /') - (1 + 2F/0 o )exp(-^ o yi + 2^ /^)} (68) where $ = V/d is the field in the insulator and S = %yjnq((f> ) 3/2 . For very high voltage such that V > {<f) + E F /g), the second term in Eq. (68) can be neglected, and we have the well-known Fowler-Nordheim equation. The computed results for the tunnel resistance {J IV) are shown in Fig. 34(b) where various barrier heights and insulator thicknesses are used. We note the tunnel resistance decreases rapidly with increasing applied voltage. For an ideal asymmetrical MIM structure (shown in Fig. 35) in the low- voltage range < V < 4> t , the quantities Ad = d, and $ = (^ + </> 2 — V)/2 are independent of the polarities. Thus the J-V characteristics are also independent of the polarity. At higher voltages, Vxj> 2 , the energy diagram 4 Metal-Insulator-Metal Structure 617 SYMMETRICAL MIM 4> -- 2 VOLTS (b) Fig. 34 (b) Computed results for the tunnel resistance of a symmetrical MIM structure. (After Simmons, Ref. 42.) for the " reverse-biased " condition is shown in 35(a) and $ = <f>J2, Ad = d4>J(V— $! — (f} 2 ). For the "forward-biased" condition, <j) = (j) 2 /2 and Ad = d(f) 2 f(V — 4>i — </> 2 ). Thus the currents for different polarities are differ- ent. It follows then that the current shows rectifying characteristics in the range V > <j) 2 • Figure 35(c) illustrates the tunnel resistance as a function of V for d = 20, 30, and 40 A, 4> 2 = 2 volts, and (f>i = I volt. The reverse and forward directions are depicted by the full and chain-dotted curves respec- tively. Initially the resistance is smaller in the forward direction; at higher 618 Thin-Film Devices REVERSE DIRECTION FORWARD DIRECTION Fig. 35 (a) Energy diagram of a reverse-biased MIM. (b) Energy diagram of a forward-biased MIM. voltages, however, the forward and reverse characteristics cross over. A comparison of the theory with experimental results is shown in Fig. 36. The functional dependence of J on V shows excellent agreement over nine decades of current. 45 The effective area used for the experimental data in Fig. 35 is approximately 1 % of the electrode area. This small tunneling area can be explained by the statistical nature in the formation of the insulating film. 46 Only the thinnest portion in the film is responsible for the tunneling current. Because of this statistical fluctuation of the thickness, the capacitance of the MIM structure is always larger than that calculated based on an average thickness of the insulator film. 46 ' 47 Another 4 Metal-Insulator-Metal Structure 619 2 3 V n (VOLTS) Fig. 35 (c) Theoretical tunnel resistance as a function of the applied voltage for an asymmetrical MIM structure. (After Simmons, Ref. 42.) 620 Thin-Film Devices „ 4 in 5 3 J, THEORETICAL __jd--30A J 2 THEORETICAL L^/V* o J 2 EXPERIMENTAL 77°K D J. EXPERIMENTAL • J, EXPERIMENTAL -J300°K <#>!= 1.6 V A<£--0.9V io" 9 id" 8 io" 7 io -6 id" 5 id" 4 id 3 io" £ id I0 U I0 T j (A/cm ) Fig. 36 Comparison of theory and experimental results of AI-AI 2 3 -AI structures. (After Pollack and Morris, Ref. 45.) X INSULATOR METAL '1 FERMI LEVEL Fig. 37 Penetration of electric field into the metal in an MIM structure. (After Ku and Ullman, Ref. 48.) References 621 factor which can also affect the capacitance value is the contribution from the potential distribution in the metal electrodes. Because of the penetration of the electric field into the metal as shown in Fig. 37, the total capacitance is effectively equal to two capacitances in series: 48 l/C-d/e i + 23XJe m (69) where e t and e m are the permittivities of the insulator and the metal respectively and X m is the characteristic penetration length in the metal (~0.5 A for the noble metals). From Eq. (69) we note that the capacitance due to the second term is of the order of 10 6 pf/cm 2 . The total capacitance per unit area will be much smaller than the value ejd when d approaches a value of the order of 5 A. REFERENCES 1. P. K. Weimer, "An Evaporated Thin-Film Triode," IRE-AIEE Solid State Device Research Conference, Stanford, California (July 1961), and also "The TFT — A New Thin-Film Transistor," Proc. IRE, 50, 1462 (1962). 2. P. K. Weimer, "The Insulated-Gate Thin-Film Transistor," a chapter of Physics of Thin Films, Vol. 2 edited by G. Hass and R. E. Thun, Academic Press (1964). 3. C. A. Mead, "Tunnel-Emission Amplifiers," Proc. IRE, 48, 359 (1960). 4. N. F. Foster, "Piezoelectric and Piezoresistive Properties of Films," a chapter of Handbook of Thin Film Technology, McGraw-Hill Co., New York (1968). 5. P. E. Bode, "Lead Salt Detectors," a chapter of Physics of Thin Films, Vol. 3, edited by G. Hass and R. E. Thun, Academic Press (1966). 6. H. Borkan and P. K. Weimer, "An Analysis of the Characteristics of Insulated-Gate Thin-Film Transistors," RCA Review, 24, 153 (1963). 6a. H. K. J. Ihantola and J. L. Moll, "Design Theory of a Surface Field-Effect Transistor," Solid State Electron., 7, 423 (1964). « 7. J. F. Skalski, "A PbTe Single-Crystal Thin-Film Transistor," Proc. IEEE, 53, 1792 (1965). 7a. P. K. Weimer, "A p-Type Tellurium Thin-Film Transistor," Proc. IEEE, 52, 608 (1964). 7b. T. P. Brody and H. E. Kunig, "A High-Gain InAs Thin-Film Transistor," Appl. Phys. Letters, 9, 259 (1966). 7c. W. B. Pennebaker, "PbS Thin-Film Transistors," Solid State Electron, 8, 509 (1965). 7d. F. V. Shallcross, "Cadmium Selenide Thin-Film Transistors," Proc. IEEE, 51, 851 (1963). 7e. D. Darmagna and J. Reynand, "A GaAs Thin-Film Transistor," Proc. IEEE, 54, 2020 (1966). 7f. V. L. Frantz, "Indium Antimonide Thin-Film Transistors," Proc. IEEE, 53, 760 (1965). 622 Thin-Film Devices 8. T. O. Poehler and D. Abraham, "Electric Field Excitation of Electrons from Shallow Traps in CdSe Thin-Film Triodes," J. Appl. Phys., 35, 2452 (1964). 9. T. J. O'Reilly, "Effect of Surface Traps on Characteristics of Insulated-Gate Field- Effect Transistors," Solid State Electron., 8, 267 (1965). 10. C. A. T. Salama and L. Young, "Evaporated Silicon Thin-Film Transistors," Solid State Electron., 10, 473 (1967). 11. R. R. Haering, "Theory of Thin-Film Transistor Operation," Solid State Electron., 7, 31 (1964). 12. M. G. Miksic, E. S. Schlig, and R. R. Haering, "Behavior of CdS Thin-Film Transis- tors," Solid State Electron., 7, 39 (1964). 13. H. Koelmans and H. C. DeGraaff, "Drift Phenomena in CdSe Thin Film FET's," Solid State Electron., 10, 997 (1967). 14. D. J. Page, "Thermal Limitations of the Thin Film Transistor," Solid State Electron., 11, 87 (1968). 15. J. J. Quinn, "Range of Excited Electrons in Metals," Phys. Rev., 126, 1453 (1962). 16. N. F. Mott and H. Jones, The Theory of the Properties of Metals and Alloys, Dover Publication, New York (1958). 17. K. Matizuki and M. Sparks, "Range of Excited Electrons and Holes in Metals and Semiconductors," J. Phys. Society of Japan, 19, 486 (1964). 18. J. P. Spratt, R. F. Schwartz, and W. M. Kane, "Hot Electrons in Metal Films: In- jection and Collection," Phys. Rev. Letters, 6, 341 (1961). 19. A. Rose, "Interim Rept.," No. 6A RCA (June 1960); Govt. Contract Rept. No. bsr 77523. Supported in part by the U.S. Navy, September 1960. 20. M. M. Atalla and D. Kahng, "A New Hot Electron Triode Structure with Semicon- ductor-Metal Emitter," IRE-AIEE Solid State Device Research Conference, Univer- sity of New Hampshire (July 1962). 21. D. V. Geppert, "A Metal-Base Transistor," Proc. IRE, 50, 1527 (1962). 22. G. T. Wright, "The Space-Charge-Limited Dielectric Triode," Solid State Electron., 5, 117 (1962). 23. C. R. Crowcll and S. M. Sze, "Hot Electron Transport and Electron Tunneling in Thin-Film Structures," a chapter of Physics of Thin Films, Vol. 4, edited by G. Hass and R. E. Thun, Academic Press (1967). 24. J. L. Moll, "Comparison of Hot Electrons and Related Amplifiers," IEEE Trans. Electron Devices, 10, 299 (1963). 25. M. M. Atalla and R. W. Soshea, "Hot-Carrier Triodes with Thin-Film Metal Base," Solid State Electron., 6, 245 (1963). 26. J. M. Early, "Structure Determined Gain-Band Product of Junction Triode Transis- tors," Proc. IRE, 46, 1924 (1958). 27. S. M. Sze and H. K. Gummel, "Appraisal of Semiconductor-Metal-Semiconductor Transistor," Solid State Electron., 9, 751 (1966). 28. C. R. Crowell and S. M. Sze, "Ballistic Mean Free Path Measurements of Hot Electrons in Au Films," Phys. Rev. Letters, 15, 659 (1965). References *23 29. C. R. Crowell and S. M. Sze, "Electron-Optical-Phonon Scattering in the Emitter and Collector Barriers of Semiconductor-Metal-Semiconductor Structures," Solid State Electron., 8, 979 (1965). 30. C. R. Crowell and S. M. Sze, "Quantum-Mechanical Reflection at Metal-Semicon- ductor Barrier," J. Appl. Phys., 37, 2683 (1966). 31. S. M. Sze, C. R. Crowell, G. P. Carey, and E. E. Labate, "Hot-Electron Transport in Semiconductor-Metal-Semiconductor Structures," J. Appl. Phys., 37, 2690 (1966). 32. A. H. Wilson, Theory of Metals, p. 264, Cambridge Univ. Press, London and New York (1955). 33. N. F. Mott, Proc. Cambridge Phil. Soc., 32, 281 (1936). Also N. F. Mott and H. Jones, Ref. 16. 34. H. Kanter, "Slow Electron Transfer Through Evaporated Au Films," J. Appl. Phys. 34, 3629 (1963). 34a. R. H. Fowler and L. Nordheim, "Electron Emission in Intense Electric Fields," Proc. Roy. Soc., 119, 173 (1928). 35. R. M. Handy, "Hot Electron Energy Loss in Tunnel Cathode Structures," J. Appl. Phys., 37, 4260 (1966). 36. H. Kanter and W. A. Feibelman, "Electron Emission for Thin Al-Al 2 3 -Au Struc- tures," J. Appl. Phys., 33, 3580 (1962). 37. A. Goldsmith, T. Waterman, and H. Hirshorn, Handbook of Thermophysical Properties of Solid Materials, Vol. Ill, p. 35, Macmillan Co., New York (1961). 38. O. L. Nelson and D. E. Anderson, "Hot-Electron Transfer Through Thin-Film A1-A1 2 3 Triodes," J. Appl. Phys., 37, 66 (1965). 39. R. W. Soshea and R. C. Lucas, "Attenuation Length of Hot Electrons in Gold," Phys. Rev., 138, A1182 (1965). 39a. R. Stuart, F. Wooten, and W. E. Spicer, "Monte Carlo Calculations Pertaining to the Transport of Hot Electrons in Metals," Phys. Rev., 135, A495 (1964). 39b. C. R. Crowell, W. G. Spitzer, L. E. Howarth, and E. E. Labate, "Attenuation Length Measurements of Hot Electrons in Metal Films," Phys. Rev., 137, 2006 (1962). 39c. S. M. Sze, J. L. Moll, and T. Sugano, "Range-Energy Relation of Hot Electrons in Gold," Solid State Electron., 7, 509 (1964). 40. J. J. Quinn, "The Range of Hot Electrons and Holes in Metals," Appl. Phys. Letters, 2, 167 (1963). 41 . R. H. Ritchie and J. C. Ashley, " The Interaction of Hot Electrons with a Free Electron Gas," J. Phys. Chem. Solids, 26, 1689 (1965). 42. J. G. Simmons, "Generalized Formula for the Electric Tunnel Effect between Similar Electrodes Separated by a Thin Insulating Film," J. Appl. Phys., 34, 1793 (1963). 43. J. G. Simmons, "Potential Barriers and Emission-Limited Current Flow between Closely Spaced Parallel Metal Electrodes," J. Appl. Phys., 35, 2472 (1964). 44. S. M. Sze, "Current Transport and Maximum Dielectric Strength of Silicon Nitride Films," J. Appl. Phys., 38, 2951 (1967). 624 Thin-Film Devices 45. S. R. Pollack and C. E. Morris, "Tunneling through Gaseous Oxidized Films of AI2O3," Trans. AIME, 233, 497 (1965). 46. Z. Hurych, " Influence of Nonuniform Thickness of Dielectric Layers on Capacitance and Tunnel Currents," Solid State Electron., 9, 967 (1966). 47. J. Pochobradsky, "On the Capacitance of Metal-Insulator-Metal Structures with Nonuniform Thickness," Solid State Electron., 10, 973 (1967). 48. H. Y. Ku and F. G. Ullman, "Capacitance of Thin Dielectric Structures," J. Appl. Phys., 35, 265 (1964). PART IV OPTOELECTRONIC DEVICES ■ Optoelectronic Devices ■ Semiconductor Lasers ■ INTRODUCTION ■ ELECTROLUMINESCENT DEVICES ■ SOLAR CELL ■ PHOTODETECTORS 12 Optoelectronic Devices I INTRODUCTION Optoelectronic devices include those which convert electrical energy into optical radiation, or vice versa, and those which detect optical signals through electronic processes. One of the most important optoelectronic devices is the semiconductor laser. Because of its importance and its involved lasing phenom- enon, we shall devote Chapter 13 entirely to the physics of lasers. In this chapter we shall first consider electroluminescent devices which emit incoherent optical radiation when a current or voltage is applied.The emitted light is due to spontaneous emission with a wide spectral line- width (typically ~ 100 A) in contrast to the narrow linewidth of a laser output ( ~ 0. 1 A). These devices can be used as tools to study impurity or other energy levels in semiconductor band gaps. However their practical applications are mainly in optical coupling, optical display, and illumination. We next consider photovoltaic devices which convert optical radiation to electrical energy. The most important photovoltaic device is the solar cell. At the present time the solar-cell power plant furnishes the most important long- duration power supply for satellites and space vehicles. In Section 3 we shall consider the characteristics of solar cells, especially the radiation effect due to electron and proton bombardments. In Section 4 we shall discuss three classes of photodetectors : photoconduc- tors which are mainly used for infrared detection, depletion-layer photo- diodes which are useful for high-speed coherent and incoherent detection, and avalanche photodiodes which are promising solid-state detectors because of their internal current gain. 625 626 Optoelectronic Devices 2 ELECTROLUMINESCENT DEVICES Luminescence is the emission of optical radiation (ultraviolet, visible, or infrared) as a result of electronic excitation of a material, excluding any radiation which is the result purely of the temperature of the material (in- candescence). Figure 1 is a chart of the electromagnetic spectrum. 1 Although radiation of different wavelengths must be excited by different methods all are alike as far as fundamentals are concerned. The visual range of the human eye extends only from about 0.4 /mi to 0.7 /mi. The infrared region extends from 0.7 /im to about 200 /im; and the ultraviolet region includes wave- lengths from 0.4 /im to about 0.002 /im (20 A). In this and the subsequent chapter, we are primarily interested in the wavelength range from near infrared (~1 /mi) to near ultraviolet (~0.1 /mi). Types of luminescence may be distinguished in accordance with the source of the input energy: 23 (1) photoluminescence involving excitation by optical radiation, (2) cathodoluminescence by electron beams or cathode ray, (3) radioluminescence by other fast particles or high-energy radiation, and (4) electroluminescence by electric field or current. We shall in this section be mainly concerned with the physics of electro- luminescence and of semiconductor electroluminescent devices such as the GaAs infrared source, useful for optical coupling; and the GaP diode lamp, useful for applications where the human eye is the detector. (1) Radiative Transitions The electronic transitions which follow the excitation and which result in luminescent emission are generally the same for the various types of excita- tions. Figure 2 shows a schematic diagram of the basic transitions in a semi- conductor or insulator. These may be classified as follows: 3 A. Transitions involving chemical impurities or physical defects (lattice vacancies, etc.) : (a) conduction band to acceptor, (b) donor to valence band, and (c) donor to acceptor (pair emission). B. Interband transitions: (a) intrinsic or edge emission corresponding very closely in energy to the band gap, where phonons and/or excitons may be involved, and (b) higher energy emission involving energetic or hot carriers, sometimes related to avalanche emission. C. Intraband transitions involving hot carriers, sometimes called decelera- tion emission. It should be pointed out that not all the transitions can occur in the same material or under the same conditions. Nor are all electronic transitions radiative. An efficient luminescent material is one in which radiative transi- 2 Electroluminescent Devices 627 FREQUENCY (Hz) GAMMA RAY- WAVELENGTH {pm) -I0" 9 ■I0" 8 L-IO- 7 — -IO" 6 ULTRAVIOLET - -10 10 '8^ >/jr////z r, visible >/ ////////, -INFRARED — -10" - 10" -10° -I0 1 —SHORT RADIO WAVES — BROADCAST ^ <y/, BAND — LONG RADIO WAVES - -5 10-= I0 3 I0 4 l-IO 5 I0 6 I0 7 -I0 8 -I0 9 hio 10 10" I0 12 I0 13 l-IO 14 I km Fig. 1 Chart of electromagnetic spectrum. (After Sears and Zemansky, Ref. 1.) tions predominate over nonradiative ones (such as Auger nonradiative recombination) . 2b (2) Emission Spectra When electron-hole pairs are generated by external excitations, radiative transitions resulting from the hole-electron recombination may occur. The 628 Optoelectronic Devices 'WIJIIIIfMfrmiwllllli iiiiiiiiih. MM (°) 4- (b) (c) \ Ob) \ WW/ 777777777777777/ /VALENCE BAND/, mm j \_ m 8 8 1 \—l B C • ELECTRON O HOLE Fig. 2 Basic transitions in a semiconductor. (After Ivey, Ref. 3.) radiative transitions in which the sum of electron and photon wave vectors is conserved are called direct transitions as against indirect transitions which in- volve other scattering agents such as phonons. A. Intrinsic Transitions (Band-to-Band). The emission spectrum for intrinsic emission by direct transition of hole-electron recombination is given by 4 I(hv) ~ v\M> 2 F c (E)F v (E)p(hv) (1) where <M> is the transition matrix element, F C (E) and F V (E) are, respec- tively, the electron and hole Fermi-Dirac distribution functions, and p(hv) is the density of states per unit range of transition energy hv. For energy bands with constant effective masses p(hv) ~ (hv — E g ) 1/2 . If <M> 2 is approximately a constant, and the distribution functions approximated by classical (Boltz- mann) distribution, we get I(hv) - v 2 (hv - E g ) 1/2 exp f ihv-l L kT ~E a ) (2) From Eq. (2) it can be shown that the peak intensity occurs near E g and the width of the spectrum (at half value of peak intensity) is proportional to kT. 2 Electroluminescent Devices 629 If the electron distribution is highly degenerate and the hole distribution non- degenerate as in most of the experiments, we get for the intrinsic emission by direct transition : 4 I(hv) ~ v\hv - E g ) l/2 exp + m h * (^)l ^b^^-^-^HH' (3) where m* and m h * are, respectively, the electron and hole effective masses, and E pn is the quasi Fermi level of electrons or the electron imref. The emission spectrum for intrinsic emission due to indirect transition [corresponding to the conditions for Eq. (2)] is given by I(hv) ~ v\hv - E g f exp[- ^P] • (4) B. Extrinsic Transitions. Transitions of carriers from one energy band to impurity levels near the opposite band give rise to emission with hv smaller than E g . The emission spectrum for electron transitions from the conduction band to acceptor levels near the valence band is given by I(hv) ~ v\hv -E g + £ a ) 1/2 jexp ■(*v-* f + E.-lWl + i p kT where E a is the impurity ionization energy. This expression resembles Eq. (3) with a shift of hv by E a . In this case the peak intensity occurs near (E g — E a ), and the width of the spectrum is proportional to kT Figure 3(a) shows the luminescent emission spectrum 4 for an intrinsic (band-to-band) transition in an n-type InSb sample at 4.2°K. We note there is good agreement between the experimental result and the theoretical calculation. 4 Figure 3(b) shows the emission spectrum of a similar sample. The peak at 0.234 eV corresponds to the intrinsic emission. The peak at 0.228 eV is the main impurity emission from the conduction band to the Zn acceptor levels corresponding to an impurity ionization energy of 0.006 eV. The peak at 0.212 eV is due to a photon-assisted band-to-band transition. (3) Luminescent Efficiency For a given input excitation energy, the radiative recombination process is in direct competition with the nonradiative processes. Luminescent efficiency is defined as the ratio of the energy associated with the radiative process to the total input energy. To derive the efficiency we shall use a simple model 5 ' 6 as 630 Optoelectronic Devices T = 4.2°K • •• • THEORY 7 - >- 1- (/> z UJ 1- z 6 5 UJ > 1- 4 - t-»||«- RESOLUTION UJ 3 2 1 1 1 1*1 1 1 1 1 1 1^.1 0.232 0.234 0.236 0.238 PHOTON ENERGY (eV) (a) 0.210 0.220 0230 PHOTON ENERGY (eV) (b) 0.240 Fig. 3 (a) Luminescent emission spectrum for a band-to-band transition in a pure n-type InSb (n — 5 x 10 13 cm -3 ). Experimental result (solid line), theory (points). (b) Emission spectrum of the same sample. The peak at 0.234 eV is the band-to-band emission. The peak at 0.228 eV (multiplied by 8) is the main impurity emission. The peak at 0.212 eV (multiplied by 200) is due to phonon-assisted band-to-band transitions. (After Mooradian and Fan, Ref. 4.) 2 Electroluminescent Devices 631 shown in Fig. 4 where we assume that there is one trapping level with energy E t below the bottom of conduction band with a trapping density N t and a captured electron density n t . We shall also assume that there is one lumines- cent level with energy E t above the valence band edge with density N t . In Fig. 4, G is the hole-electron generation rate and the other symbols represent the time rates of one kind or another associated with the following processes : /?: radiative recombination through capture of an electron by an empty luminescent center a : nonradiative recombination through capture of a hole from the valence band by the electron trap oc t : electron capture by the trap a 2 : production of empty luminescent center by capture of a hole (or release of an electron) ?! : thermal release of trapped electron y 2 '• thermal filling of an empty luminescent center by capture of a valence electron (or release of a captured hole). The rate equations for the densities of the free electrons («) and captured electrons (n t ) under steady-state condition are dn — = = G - OL^niNt - n t ) - pnp l + y l n t1 dn t dt = = a^OV, - n t ) -cc n t p- y^n t (6a) (6b) where p t is the captured hole density in the luminescent level. Similar Fig. 4 Simple band model for derivation of luminescent efficiency. (After Ivey, Ref. 5.) 632 Optoelectronic Devices expressions can be written for the rate equations of the densities of free holes (p) and captured holes (p t ). A combination of Eqs. (6a) and (6b) yields G = finp l + ct n t p. (7) The first term on the right-hand side, /to/?, , is associated with the radiative recombination process, while the second term is for the nonradiative process. Therefore the luminescence efficiency is given by I fin Pl J For low levels of excitation it can be assumed that the condition of thermal equilibrium prevails between the electron traps and the conduction band, and between the luminescent centers and the valence band. Then y t n t ^ a ± n(N, - n t ) (9) y 2 Pi^a 2 p(N l -p l ). In addition, the Fermi level is assumed to be located between E t and E t ; thus N t -n t c* N t (10a) Ni-pt^Nt (10b) and J-ISM-^- The efficiency becomes [\ N t oc p / E t -Ei\l (10c) (11) The efficiency will be high if JV, > N t , and E t - E t P kT, i.e., the luminescent centers should be shallow and abundant in number. Equation (1 1) also indi- cates that as the temperature increases, the exponential term also increases resulting in a decrease of efficiency with temperature. (4) Methods of Excitation Electroluminescence may be excited in a variety of ways including intrinsic, injection, avalanche, and tunneling processes which we now briefly discuss. 2 Electroluminescent Devices 633 A. Intrinsic. When a powder of a semiconductor (e.g., ZnS) is embed- ded in a dielectric (plastic or glass) and submitted to an alternating electric field, usually at frequencies in the audio range, electroluminescence may occur. Generally the efficiency is low (~1 %) and such materials are used only in display devices. The mechanism is mainly due to impact ionization by accelerated electrons and/or field emission of electrons from trapping centers. 3 B. Injection. Under forward-bias conditions the injection of minority carriers in a p-n junction can give rise to radiative recombination. The energy band diagram for a Cd-doped GaP p-n junction is shown 7 in Fig. 5(a). Several (a) 2 w >- 5 - T=298°K 2 I0 2 -/ ^ 5 2 10 - 5 INFRARED RED GREEN 2 - 1 1 1 1 1 1 1 1 1 1 1 1 1.2 1.3 1.4 1.5 I .6 1.7 1.8 1.9 2.0 2.1 PHOTON ENERGY ( eV ) 2.2 2.3 2.4 (b) Fig. 5 (a) Energy band diagram for a Cd-doped GaP p-n junction Cd-O is the cadmium-oxygen complex. Transitions between the exciton level of the Cd-O complex to the acceptor level of Cd give rise to the red light emission. Transitions between the donor level (S) and acceptor level (Cd) give rise to the green light emission. (After Henry et al., Ref. 7.) (b) Measured emission spectrum from a GaP diode. (After Gershenzon, Ref. 7a.) 634 Optoelectronic Devices different transitions for electron-hole recombination are indicated. The transition between the exciton energy level of the cadmium-oxygen complex and the Cd acceptor level is mainly responsible for the red band (~ 1.8 eV) as shown 78 in Fig. 5(b). The green band (~2.2 eV) is due to the transition between the donor level (sulfur) and the Cd acceptor level. Similar results have been obtained for Zn-doped GaP p-n junctions. The relative intensity of the red and the green bands can be varied by varying the impurity concentrations. The brightness of the red-light or the green-light emission from the GaP p-n junction at room temperature is sufficiently high to merit electroluminescent applications. C. Avalanche. When a p-n junction or a metal-semiconductor contact is reverse-biased into avalanche breakdown, 8 Fig. 6, the hole-electron pairs generated by impact ionization may result in emission of either interband (avalanche emission) or intraband (deceleration emission) transitions respec- tively. D. Tunneling. Electroluminescence can result from tunneling into both forward-biased and reverse-biased junctions. In addition, light emission 9 can V. EXTRACTION CURRENT OF MINORITY ELECTRONS HOLE IMPACT WITH LATTICE; PAIR PRODUCTION P-TYPE MATERIAL ELECTRON IMPACT WITH LATTICE-, PAIR PRODUCTION SPACE CHARGE REGION EXTRACTION CURRENT OF MINORITY HOLES MATERIAL Fig. 6 Energy band diagram for reverse-biased p-n junction. (After Henisch, Ref. 8.) 2 Electroluminescent Devices 635 occur in a reverse-biased metal-semiconductor contact (p-type degenerate) as shown in Fig. 7. Figure 7(a) corresponds to the equilibrium condition. When a sufficiently large reverse bias is applied, Fig. 7(b), holes at the metal Fermi level can tunnel into the valence band and subsequently recombine with the electrons which have tunneled from the valence band to the conduction band. METAL- SEMICONDUCTOR METAL- Fig. 7 Energy band diagram for a metal-semiconductor contact (degenerate p type): (a) equilibrium condition, (b) under reverse bias. (After Eastman et al., Ref. 9.) 636 Optoelectronic Devices (5) GaAs Infrared Source At the present time, the highest electroluminescent efficiency has been obtained experimentally in forward-biased GaAs diodes. 10 This is expected because (1) the forward-bias injection is a very efficient method, since electric energy can be converted directly into photons; (2) GaAs is a direct-gap semi- conductor, thus the radiative recombination process is a first-order transition process (no phonons involved); 11 and (3) GaAs has the most advanced mate- rial technology of all the direct-gap semiconductors. The cross-sectional views of three EL diodes are shown in Fig. 8 for (1) rectangular, (2) hemispherical, 12 and (3) parabolic geometries. 13 For a fixed internal efficiency, r] , the external efficiency, rj, depends upon two main factors (1) total internal reflection and (2) internal absorption. The critical angle 6 C at which total internal reflection occurs, is 9 C = sin _1 (l/n) where n is the refractive index. For GaAs with n = 3.6, the critical angle is about 16°. The internal absorption can be expressed as exp[ — a{X)x\ where a(X) is the absorption coefficient at wavelength A and x is the distance from the radiative recombination center. For the rectangular geometry, Fig. 8(a), ray A originating from the recom- bination center is attenuated by bulk absorption and is only partially reflected at the air interface. Other rays (B) which strike the semiconductor-air interface at an angle > 8 C are internally reflected. The total efficiency for electrical-to-optical conversion is given by 12 4 _ fo(/lXl + ^ie" 2aiWx 0e" a2(A)X2 ^ "" = l(iTi7 (1 - C0SflJ JZZT. (12) O(A) dA where P is the power input, 4n/(n + l) 2 is the transmission coefficient of light from the bulk semiconductor to air, (1 - cos 6 C ) is the solid cone, O(A) is the photon generation rate in units of photon/sec-cm 2 , R x is the reflection coefficient at the back contact, and a(2) and x are the absorption coefficient and thickness of the respective p- and «-type regions of the device. Similar expressions of efficiency can be written for the hemispherical (rj H ) and parabolic (ri P ) sources. The main difference, however, is that the solid cone is unity. Thus the ratio is given by n H ti P 1 1 _ — or — « = ~ 2n 2 for n > 1. 1r n R 1 ~ cos 6 C i _ yi _ 1/^2 (13) This means that for GaAs with n = 3.6, an increase in efficiency by an order of magnitude is expected for the hemispherical or parabolic source. 2 Electroluminescent Devices 637 Z \ f / X\\\N k\\\\^ 2 e c~"" A b p 1 \ n \\\\\\\\\\\\\\\\\\\\\\\\^ ^JUNCTION \ OHMIC CONTACT (a) JUNCTION (c) Fig. 8 Cross-sectional views of three electroluminescent (EL) diodes: (a) rectangular, (b) hemispherical. (After Carr and Pittman, Ref. 12.) (c) parabolic geometry. (After Galginaitis, Ref. 13.) The typical radiation patterns 13 for the geometries shown in Fig. 8 are illustrated in Fig. 9(a). It is apparent that one can design the geometry of the device to give a desired radiation pattern. The cross-sectional view of a typical arrangement 10 used for efficiency measurement is shown in the insert of Fig. 9(b). The emission is measured directly as the short-circuit current of the solar cell. The measured external efficiency for the hemispherical source is 638 Optoelectronic Devices W20- 1 1 1 1 1 I '- GaAs - ^""""-v J=375A/CM 2 - GaAs ~ SOURCE "REFLECTOR SOLAR CELL ^fc 1 1 I 1 i i 100 200 TEMPERATURE (°K) (b) 300 Fig. 9 (a) Radiation patterns of the EL diodes shown in Fig. 8, (1) rectangular, (2) hemispherical, and (3) parabolic geometry. (After Galginaitis, Ref. 13.) (b) External efficiency as a function of temperature for a GaAs infrared source. Insert: cross-sectional view of arrangement used for efficiency measurement. (After Carr, Ref. 10.) shown in Fig. 9(b) as a function of temperature. 10 The efficiency, as expected, decreases with increasing temperature, and has a value of 40, 32, or 7 % at 20, 77, or 300°K respectively. Figure 10(a) shows the emission spectra 10 observed at 77°K and 300°K. The peak photon energy decreases with increasing temperature mainly 2 Electroluminescent Devices 639 10,000 10° WAVELENGTH (A) 9500 9000 >icr $10" -,-3 -1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 L 1.50 | | | | i | | | i i 1 / \ 0l8eVs/ I ~ 0.036 eV- *~ ~ - - 1.48 - 1.46 : "^\\ - - — ^\\ _ _ - > 1.44 - - 295° K / 77°K |l.42 LjJ - z \ \ \ UJ z 1.40 o : - - O £ 138 \ \ \ \ \\ \ \ - — J \ \ - _ J 1.36 - NflAXIMUM \ ~ - RESOLUTION -Wh- \ HALF -"POWER \ LEVEL ; 1 1 1 1 1 1 1 1 1 1 1 1 1.34 132 1 1 1 1 1 1 1.24 1.28 1.32 136 140 144 PHOTON ENERGY (eV) (a) 1.48 1.52 100 200 300 TEMPERTURE (°K) (b) Fig. 10 (a) GaAs diode emission spectra observed at 300°K and 77°K. (b) Dependence of the emission peak and half-power width as a function of temperature. (After Carr, Ref. 10.) because of the decrease of band gap with temperature. A more detailed plot is shown in Fig. 10(b) for the peak photon energy and the half-power points from the diode emission spectrum as a function of temperature. The slight increase of the width of the half-power points with temperature is expected from the discussion of the emission spectra, Eqs. (2) through (5). The optical response time of the light sources, i.e., the time required for light output after a current pulse is applied, is determined by the spontaneous radiative lifetime required for recombination of the injected carriers. In most direct-gap semi- conductors, because of their short lifetime, the response time is of the order of 1 ns or less. The GaAs infrared sources as well as other electroluminescent (EL) diodes have major application in areas where decoupling between the input signal, or control signal, and the output is of special importance. Figure 1 1 shows two typical photocoupled isolators using a GaAs diode as the light source and a p-i-n diode as the photodetector. When an input electrical signal is applied to the GaAs diode, an infrared light is generated and subsequently detected by 640 Optoelectronic Devices GaAs INFRARED SOURCE ^ r x i INPUT \%- SIGNAL PHOTODETECTOR O ISOLATED OUTPUT SIGNAL (a) PHOTOCOUPLED ISOLATOR GaAs INFRARED SOURCE INPUT I X- SIGNAL I PHOTODETECTOR 3 , O ISOLATED OUTPUT TRANSISTOR ^ R L SIGNAL lb) HIGH -GAIN PHOTOCOUPLED ISOLATOR Fig. 11 (a) Photocoupled isolator using a GaAs diode as infrared source and a p-i-n diode as the photodetector. (b) High-gain photocoupled isolator where the signal is amplified by a junction transistor. the photodetector. The light is then converted back to electrical signal as a current which can flow through a load resistor as shown in Fig. 11(a) with a current ratio, I 2 fh> of the order of 10" 3 ; or be amplified as in Fig. 1 1(b) with a current ratio of the order of 0.1. They are called photocoupled isolators because there is no feedback from the output to the input and the signal is transmitted at the speed of light. In addition to a single electroluminescent diode unit, integrated arrays of electroluminescent diodes can be made using the planar and beam-lead technology. 14 The diode array can be used to optically trigger matching arrays of photosensitive devices, such as the Si p-n-p-n, and in memory applications. 3 SOLAR CELL The reciprocal effect to electroluminescence which converts electrical energy to radiation is the photovoltaic effect. The most important photovoltaic 3 Solar Cell 641 device is the solar cell which is basically a p-n junction with a large surface area and which can convert solar radiation directly into electrical energy with high overall efficiency (of the order of 10% or more). The high-efficiency solar cell was first developed 15 by Chapin, Fuller, and Pearson in 1954 using a diffused silicon/;-/? junction. A schematic diagram of a typical solar cell is shown in Fig. 12(a). To date, solar cells have been made in many other semiconductors such as the diffused GaAs cell, 16 the Cu 2 S-CdS cell, 17 the Se-CdS cell, 18 and thin film GaAs and CdS cells. 19 ' 20 Solar cells now are the most important long-duration power supply for satellites and space vehicles. The photovoltaic power conversion may best be defined by considering the case of an ideal p-n junction with a constant-current source in parallel with the junction, Fig. 12(b). The constant-current source results from the excitation FRONT CONTACT STRIPE AND FINGERS (TOP VIEW) 0.5mm lii-cm p-TYPE SI (a) p-n JUNCTION S S S S S S / JUNCTI (SIDE VIEW) BACK "CONTACT tls(e« WkT -1) V >Rl (b) Fig. 12 (a) Typical schematic representation of a solar cell. (b) The idealized equivalent circuit of a solar cell. 642 Optoelectronic Devices -120 (d) Fig. 12 (c) Current-voltage characteristics of a solar cell under illumination. The photocurrent is 100 mA. (d) Inversion of (a) about the voltage axis. (After Prince, Ref. 21.) 3 Solar Cell 643 of excess carriers by solar radiation. Actually the nature of the source need not concern us in the subsequent analysis; it may be a photon source (solar energy, y radiation, incandescent lamp, x-ray, etc.), a high-energy particle source (electron gun, jS-radioactive elements, a particles, protons, neutrons, etc.), or any other means of creating electron-hole pairs without changing the properties of the ideal junction appreciably. The following discussion is con- cerned only with the solar cell. However, the results are also applicable (with minor modifications) to other particle detectors. (1) Basic Characteristics The solar cell as shown in Fig. 12(a) consists of a shallow p-n junction formed on the surface (e.g., by diffusion), a front ohmic contact stripe and fingers, and a back ohmic contact which covers the entire back surface.The simplest equivalent circuit of the solar cell under radiation is shown in Fig. 1 2(b) where I L is the strength of constant current source due to the incident light, and I s is the saturation current. The I- V characteristics of such a device are given by I=I s {e qy l kT -\)-I L (14) and A plot 21 of Eq. (14) is given in Fig. 12(c) for/ L = 0.1 amp,/ s = 10 -9 amp, and T = 300°K. It is seen that the curve passes through the fourth quadrant and therefore that power can be extracted from the device. By properly choosing a load, it is possible to extract close to 80 % of the product I sc x V oc where I sc is the short-circuit current and V oc is the open-circuit voltage of the cell, as indicated by the maximum power rectangle. The 7- V curve is more generally represented by Fig. 12(d) which is simply an inversion of Fig. 12(c) about the voltage axis. We also define in Fig. 12(d) the quantities I mp and V mp which correspond, respectively, to the current and voltage for the maximum power output P mp ( = I mp x V mp ). From Eq. (14) we obtain for the open-circuit voltage -WH Voc =V max = -\n\-f+l) (15) where p = qjkT. The output power is given by P = IV = I s V(e pv -\)-I L V. (16) 644 Optoelectronic Devices The condition for maximum power can be obtained when dPfd V = 0, or (l+f$V mp )exp(pV mp )=(l+ I -fj, I mp = \I s (e^ v ^-l)-I L \ = IJV mp e^ v -"\ The efficiency of solar energy conversion is given then by maximum power output I mp V mp jcm 2 n = power input PJcm hPV* (1 + fiV mp )A V+IJPJcn* (17) (18) (19) where A is the exposed front area of the solar cell and P in /cm 2 is the solar power density outside the atmosphere. The predicted efficiency for various semiconductors is plotted in Fig. 13 as a function of energy band gap and Fig. 13 Conversion efficiency as a function of energy gap for ideal current-voltage cha- racteristics. (After Wysocki and Rappaport, Ref. 22.) 3 Solar Cell 645 for different lattice temperatures. 22 The generated current I L is determined by solar conditions outside the atmosphere where the solar power density is 135 mW/cm 2 . The number of photons effective in creating electron-hole pairs is taken from the published values. The collection efficiency is assumed to be unity, and losses due to reflection, leakage conductance, and series resistance are neglected. Under the above idealized conditions and for the idealized current-voltage characteristics, Eq. (14), it is predicted that the material with optimum efficiency at room temperature is GaAs. The optimum shifts to higher band-gap materials as the temperature is increased. The efficiency has also been calculated using the method of detailed balance limit, 23 and the result is essentially the same as the " semiempirical approach" shown in Fig. 13. For a practical^ of GaAs solar cell at room temperature, the efficiency is approximately a factor of two smaller than the predicted value (10 to 15% instead of 22 to 28 %). This is mainly due to the reflection loss, the leakage conductance loss, and the effect of series resistance to be discussed later. (2) Spectral Response The spectral response of a solar cell is defined as the short-circuit current as .a function of the wavelength of the incident light. To derive the spectral response, we shall use the simple one-dimensional geometry shown in Fig. 14(a) where d is the junction depth, and L n and L p are the minority diffusion lengths in the/? side and n side respectively. We shall assume that the depletion width of the junction is much smaller than L„ or L p . For incident photons with energies in excess of the energy gap (hv > E g ), the density of photons in the semiconductor varies as O = <D exp(-oar) where O is in the units of photon/sec-cm 2 and a is the absorption coefficient which is a function of wavelength. The hole-electron generation rate by photons is given by G(x) = ® oie- ax . (20) In the n side the minority carriers (holes) created at a distance x will have a fraction proportional to exp \_ — {d — x)/L p ~] diffuse to the junction. The total number of minority carriers reaching the junction due to creation of hole- electron pairs in the n side is given by f d , x T \d-x\\ J JV ~ O a exp(-ax)exp — ax = ~^- [exp(- d/L p ) - exp(-arf)]. (21) 646 Optoelectronic Devices JUNCTION SURFACE (a) 1.0 THEORY O EXPERIMENT [ \ 0.5 \ < / °\ l \ \ \ : 0.5 10 WAVELENGTH OF INCIDENT LIGHT (urn) (b) Fig. 14 (a) One-dimensional geometry of a solar cell with junction depth d and minority carrier diffusion lengths L n and L p for the p side and n side, respectively. (b) Typical comparison between measured and calculated response curves for p-on-n solar cell with etched surface. Data points are measured results for d = 2.0 jum. Solid curve is calculated response for d = 2.0 /xm, L„ = 0.5 jiim and L p = 10.0 fxm. (After Terman, Ref. 24.) Similarly, the number of minority carriers (electrons) reaching the junction as a result of the creation of hole-electron pairs in the /^-region is the integral of Eq. (21) from jc = d to x = oo with L p replaced by L„ . Thus the total number 3 Solar Cell M7 of carriers crossing the p-n junction is 24 <D a r , Jlr . , ,._ , O aexp(-a<j) iV r 2__ [ eX p( - d/L p ) - exp( - ad)] + — — — . (22) a -r p ( a+ rJ In the steady state the current through the cell is a constant, hence it is proportional to N T . For an equal-energy spectrum, the photon density is proportional to the wavelength of the incident light, since the energy of an individual photon is proportional to frequency. Therefore <D itself is propor- tional to wavelength for an equal-energy spectrum. The short-circuit current per unit wavelength is then given from Eq. (22) : MscW ,{ l p r , a\ t Air Yi . A,exp(-orf) iC aA — [exp(- ad) - exp(- d/L p )] + dX \\ - ocL p L 1 + <*L n (23) Under the conditions that ocL n , <xL p <\, and d(L p > 1, this equation reduces to disci*) dX aX(L n + L p )exp( - ad). (23a) The above equations are for n-on-p solar cells. For p-on-n solar cells we have only to replace the quantity L p with L n . Figure 14(b) indicates the good agree- ment that is obtained between the measured and calculated response curves. 24 The points are the measured values of a silicon solar cell with an etched surface and 2-/xm/7-type diffusion, and the solid line is the theoretical curve calculated from Eq. (23) for d = 2.0 /mi, L„ = 0.5 /xm, L p = 10 jim, and using published values of a(A). From Eq. (23) it can be shown that in order to increase the short-wavelength response the junction should be made closer to the surface since 1/a is small for short wavelength; while in order to increase the long- wavelength response the junction must be made comparatively deep below the surface. If the surface recombination velocity is high .(such as a lapped surface), the lifetime near the surface is reduced, thus reducing the response to short wavelengths of incident light. (3) Recombination Current and Series Resistance If the forward current is dominated by the recombination current within the depletion region, the efficiency is generally reduced in comparison with that of an ideal diode discussed previously. For single-level centers, the recom- bination current can be expressed as 25 '— = / «'[ eXP (S _1 ] (24) 648 Optoelectronic Devices with /.' = qn t W 4' T„T„ where W is the depletion width and x p and t„ are the lifetimes of holes and electrons respectively. The energy conversion equation could again be put into closed form yielding equations similar to Eqs. (17) through (19) with the exception that I s is replaced by I J and the exponential factor is divided by 2. Figure 15 shows the efficiency for the case of recombination current. 22 Although the optimum band gap is roughly the same as for the ideal current case, the efficiency is much less for the present case. The results of some experimental measurements 22 are plotted in Fig. 16 together with theoretical curves for the ideal case and the case with the recombination current at a doping level of 10 17 cm -3 . Figure 16(a) is a plot of V max versus T in silicon. The experimental points fall between the theoretical 32 24 RECOMBINATION CURRENT N B =IO | 7 C m -3 GaAs jcdTe A£Sb Y(70% GaAs-30%GoP) - n^^i J Z(50%GaAs |\ 50%GaP) \ ,Cds \ /\t = 20°C Fig. 15 Conversion efficiency as a function of band gap for solar cells with recombination currents. (After Wysocki and Rappaport, Ref. 22.) 3 Solar Cell 649 700 600 > 400 E 300 200 100 -0 0.6 0.2 IDEAL CASE RECOMBINATION - CURRENT RECOMBINATION' CURRENT 100 TCC) (a) 200 300 100 200 T(°C) (b) Fig. 16 (a) Measured open-circuit voltage. V max versus temperature and (b) measured ratio of maximum power output to saturation current, P mp //«, versus tem- perature for a silicon solar cell. The solid lines are theoretical calculations for an ideal- current case and a recombination-current case. (After Wysocki and Rappaport, Ref. 22.) curves, and the rate of decrease agrees well with the theoretical prediction. Similar agreement is found in Fig. 16(b) where (P mp /I s ) is plotted versus T. For solar cells containing many defects, the forward current may show an exponential dependence 26 on the forward voltage as exp(qV/nkT) with n ~ 3. These defects cause a further reduction of the efficiency. The series resistance imposes another limitation on the maximum attainable efficiency of solar energy conversion. The equivalent circuit containing both a shunt and a series resistance is shown in the insert of Fig. 17. It can be shown that the 7- V characteristic is given by 21 In (L±ii_L^ + 1 ) = X (F _« s) . ( 25) 650 Optoelectronic Devices .2 .4 V (VOLTS) Fig. 17 Theoretical l-V characteristics for various solar cells that include series and shunt resistances. The insert shows the equivalent circuit. The parameters are identical to that used in Fig. 12(c). (After Prince, Ref. 21 .) Plots of this equation, with combinations of R s = 0, 5 ohms and R sh = oo, 100 ohms, are given in Fig. 17 with the same parameters I s , I L , and T as in Fig. 12(c). It can be seen that a shunt resistance even as low as 100 ohms does not appreciably change the power output of a unit, whereas a series resistance of only 5 ohms reduces the available power to less than 30 % of the optimum power with R s = 0. We can thus neglect the effect of R sh . The output current and output power are : P = \IV\ = /[^ln(i±^ + l) + IRs]. (27) 3 Solar Cell 651 The relative maximum available power is 1, 0.77, 0.57, 0.27, or 0.14 for R s of 0, 1,2, 5, or 10 ohms respectively. The series resistance of a solar cell depends on the junction depth, impurity concentrations of /Kype and n-type regions, and the arrangement of the front surface ohmic contacts. For a typical Si solar cell with the geometry shown in Fig. 12(a), the series resistance is about 0.7 ohm for n-on-p cells and about 0.4 ohm for p-on-n cells. 27 The difference in resistance is mainly the result of lower resistivity in n-type substrates. (4) Radiation Effect The most important application of solar cells is in satellite and space vehicles. The high-energy particle radiation in outer space produces defects in semi- conductors which cause a reduction in solar cell power output. It is important to assess the expected useful life of the solar cell power plant. Its lifetime is the length of time the power plant is capable of delivering the electrical power necessary for successful operation of the satellite. From the expression of short-circuit current, Eq. (23), we note that the current will decrease with decreasing diffusion length L„ and/or L p . If the lifetime t of the excess minority carriers at any point in the bombardment is given by 28 - = - + K'$> (28) where x is the initial lifetime, AT' is a constant, and O is the bombardment flux. The above expression states that the recombination rate of the minority carriers is proportional to the initial number of recombination centers present plus the number introduced during bombardment, the latter being propor- tional to the flux. Since the diffusion length is equal to -JDx and D is a slowly varying function with bombardment (or doping concentration), Eq. (28) can be expressed as J___l L 2 ~L„ + XO (29 ) where L is the initial diffusion length, and K= K'fD. Figure 18 shows the measured substrate diffusion length as a function of a 1-MeV electron flux for three different silicon solar cells. The blue-sensitive n-on-p cell is one with w-type diffusion and with antireflection coating. The diffusion depth is adjusted to give a large spectral response near blue light (0.45 to 0.5 /mi) which cor- responds to the maximum of the solar energy distribution. The blue-sensitive p-on-n cell is similar to the n-on-p cell except that the roles of p-type and «-type are interchanged. We see that the experimental results can indeed be reasonably fitted by Eq. (29). The curve passing through the points for the 652 Optoelectronic Devices I MeV ELECTRON FLUX (CM d ) Fig. 18 Diffusion length versus 1-MeV electron flux. (After Rosenzweig et al., Ref. 28.) n-on-p cell is computed using Eq. (29) with L = 119 /mi and K= 1.7 x 10 -10 The data points for the blue-sensitive p-on-n and normal p-on-n cells can be approximately fitted by Eq. (29) with L = 146 nm and K = 1.22 x 10 -8 . It is apparent from Fig. 1 8 that the radiation resistance of n-on-p cells is higher than that of p-on-n cells. The short-circuit current per unit wavelength for an n-on-p cell at a given wavelength X, Eq. (23), can be written as dk 1 1 — exp( — ad) + exp( — ad) 1+ \/A + KO (30) where the diffusion length L„ has been replaced by the expression of Eq. (29). In Eq. (30) it is also assumed that djL p <^ 1 and aL p > 1. Figure 19 shows the measured contributions (data points) to the total short-circuit current for outer space sunlight falling into the indicated wavelength intervals as a function of bombardment flux. 28 The solid curves are the theoretical calcula- tions based on Eq. (30) and the values of L and K obtained from Fig. 18. The 4 Photodetectors 653 INITIAL VALUE I0 12 I0 13 I0 14 I0 15 IMev ELECTRON FLUX(CM -2 ) Fig. 19 Contribution to outer space short-circuit current by sunlight in various wave- length intervals for Si n-on-p solar cells as a function of 1-MeV electron flux. (After Rosenzweig et al., Ref. 28.) agreement between the theory and experiment points is noted to be good. Similar effects have been observed on solar cells treated with proton bombard- ment. 29 ' 30 4 PHOTODETECTORS The extension of coherent and incoherent light sources into the far infrared region on one hand and the ultraviolet region on the other has increased the 654 Optoelectronic Devices need for high-speed as well as sensitive photodetectors. 31 For a general photo- detector there are basically three processes: (1) carrier generation by incident light (2) carrier transport and/or multiplication by whatever current-gain mechanism may be present, and (3) interaction of current with external cir- cuitry to provide the output signal. To describe the performance of a photodetector under specified operating conditions, certain figures of merit are defined. 32 ' 323 One of the important figures of merit is the signal-to-noise ratio. Since all photodetectors are ultimately limited by noise, it is important to have a large signal-to-noise ratio. Another commonly used figure of merit is the noise equivalent power (NEP) which is defined as the root mean square value of the sinusoidally modulated radiant power falling upon a photodetector which will give rise to an rms signal voltage equal to the rms noise voltage from the detector. For infrared detectors the most used figure of merit is the detectivity D* which is defined as ^1/2d1/2 D* EE ±-f— (31) NEP v ' where A is the area of the photodetector, and B is the bandwidth. In order to remove any ambiguity in D*, one must state whether the radiation is from a black-body source or a monochromatic source and at what modulation frequency. It is recommended that D* be expressed as D*(A,f, 1) or D*(T,f, 1) where X is the wavelength in /mi, /is the frequency of modulation in Hz, T is the black-body temperature in °K, and the reference bandwidth is always 1 Hz. In this section we shall consider three important classes of photodetectors : the photoconductor, the depletion-layer photodiode, and the avalanche photodiode. (1) Photoconductor A photoconductor is a device consisting simply of a slab of semiconductor (in bulk or thin-film form) with ohmic contacts affixed to opposite ends, Fig. 20. When incident light falls on the surface of the photoconductor, carriers are generated either by band-to-band transitions (intrinsic) or by transitions involving forbidden-gap energy levels (extrinsic), resulting in an increase of the conductivity. For the intrinsic photoconductor, the conduc- tivity is given by a = q(n„ n + n p p), and the increase of conductivity under illumination is mainly due to the increase in the number of carriers. The long- wavelength limit for this case is given by he 1.24 K = — = ^7—, 0*m) (32) c E g £ 9 (eV) ^ ' V } 4 Photodetectors 655 OHMIC CONTACT PHOTOCONDUCTOR Fig. 20 Schematic diagram of a photoconductor which consists of a slab of semiconductor and two ohmic contacts at the ends. where X c is the wavelength corresponding to the semiconductor band gap E g . For wavelengths shorter than X c , the incident radiation is absorbed by the semiconductor, and hole-electron pairs are generated. For the extrinsic case, photoexcitation may occur between a band edge and an energy level in the energy gap. Photoconductivity can take place by the absorption of photons of energy equal to or greater than the energy separation of the band-gap levels and the conduction or valence band. The performance of a photodetector in general and a photoconductor in particular is measured in terms of two parameters : the photoconductivity gain and the response time of the detector. 33 The photoconductivity gain is defined as the number of charge carriers which pass between the contact electrodes per second for each photon absorbed per second. Gain A/ <lG pair (33) where AI is the photocurrent in amperes and G pair is the total number of electron-hole pairs created in the photoconductor per second by the absorp- tion of light. The gain may also be expressed as the ratio of the lifetime of a free carrier to the transit time for that carrier, i.e., the time required for the 656 Optoelectronic Devices carrier to move between the electrodes. For a semiconductor in which one- carrier conductivity dominates, TUV Gain = - = , t, L 2 (33a) where t is the lifetime of a free carrier, t r the transit time for this carrier, ft the mobility, Fthe applied voltage, and L the electrode spacing as shown in Fig. 20. The gain is thus dependent upon the lifetime of the free carriers as a critical parameter. For long-lifetime sample with short electrode spacing the gain can be substantially greater than unity. Some typical values 33 of gain and response time are given in Table 12.1. TABLE 12.1 Typical Values of Gain and Response Time Photodetector Gain Response Time (sec) Photoconductor p-n Junction p-i-n Junction Junction Transistor Avalanche Photodiode Metal-Semiconductor Diode Field-Effect Transistor 10 5 1 1 10 2 10 4 1 10 2 10" 3 io- 11 1O-10 10" 8 10 -io io- 11 IO" 7 For sensitive infrared detection, the photoconductor must be cooled in order to reduce thermal effects (which causes thermal ionization and depletes the energy levels) and to increase the gain and detection efficiency. However, carrier lifetimes are correspondingly increased with a resulting long response time. For a background-limited photoconductor, the ideal D* for unit quantum efficiency is given by 32a D*(X, f, 1) = c exp(C) iJnhkT v 2 (l + 2£ + 2£ 2 ) 1/2 cm(Hz) 1/2 /watt (34) where c is the velocity of light, T the background temperature in °K, and £ = hv/kT. The ideal D* is plotted in Fig. 21 (dotted curve) for a background temperature of 300°K. Also shown are some typical D* values for available photoconductors such as CdS, PbS, gold-doped /?-type germanium (Ge:Au), and mercury-doped germanium (Ge:Hg) detectors 34 (refer to Fig. 12 of Chapter 2 for impurity energy levels). We note that, for example, in order to detect blue-green light near 0.5 (im, a CdS photoconductor gives the highest sensitivity, while at 2 /mi, a PbS photoconductor is the best choice. 4 Photodetectors 657 CdSe _ (300°K) InSb(77°K) Ge:Hg 300°K) BLACK BODY (500°K)- J L 0.2 0.4 0.6 0.8 1.0 2.0 4.0 6.0 8.0 100 WAVELENGTH (MICRONS) Fig. 21 Detectivity D* as a function of wavelength for various photoconductors operated at various temperatures. The dotted curve is the theoretical ideal D* at 300°K viewing an angle of 2tt steradians. (After Kruse et al., Ref. 32a.) For high-speed photodetection, especially for detection of coherent light waves, we must consider the available power and the signal-to-noise perform- ance. The generation of dc photocurrent, when a photon flux density O in units of photons/sec-cm 2 is incident on the device (assuming total uniform absorption), is given by 35 I o = r\q<& A- '■r (35) where r\ is the quantum efficiency, A is the area, and x and t r are defined in Eq. (33a). For ac detection we assume that the incident photon flux density <X> is time dependent and can be expressed as O = O + ^e j<ot (36) where to/2n is the frequency (generally in the microwave region). Equation (36) applies directly when the incident light is intensity modulated, in which case m = Oj/Oo is the modulation index. If the incident light is composed instead of two optical signals at frequencies cojln and cojln whose differe